Commit graph

8 commits

Author SHA1 Message Date
Doug Evans
496cf06b76 * Makefile.in (SIM_OBJS): Add traps.o 1998-06-11 01:06:05 +00:00
Doug Evans
177dedfb88 * Makefile.in (m32r.o,mloop.o,cpu.o,model.o): Add decode.h dependency.
(m32rx.o,mloopx.o,cpux.o,modelx.o): Add decodex.h dependency.
	* decode.c,decode.h: Regenerate, introduces IDESC table.
	* mloop.in (extract16,extract32): Add IDESC support.
	Update names of semantic handler member names.
	(execute): Ditto.  Delete call to PROFILE_COUNT_INSN.
	* decodex.c,decodex.h: Regenerate, introduces IDESC table.
	* mloopx.in: Add IDESC support.
	Update names of semantic handler member names.
	Delete call to PROFILE_COUNT_INSN.
1998-05-06 22:37:14 +00:00
Doug Evans
599bae2187 * Makefile.in (SIM_EXTRA_DEPS): Add cpu-opc.h.
(arch.o): Delete cpu-opc.h dependency.
	(decode.o,model.o): Likewise.
	(decodex.o,modelx.o): Likewise.
1998-03-04 21:22:09 +00:00
Andrew Cagney
0e701ac37b Add generic sim-info.c:sim_info() function using module mechanism.
Clean up compile probs in mips/vr5400.
1998-02-28 02:51:06 +00:00
Doug Evans
b8a9943dd4 * Makefile.in (m32r.o): Depend on cpu.h
(extract.o): Pass -DSCACHE_P.
	* mloop.in (extract{16,32}): Update call to m32r_decode.
	* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
	* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
	* sim-main.h: #include "ansidecl.h".
	Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
	* Makefile.in (M32RX_OBJS): Build m32rx support now.
	(m32rx.o): New rule.
	* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
	* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
	(m32rx_h_accums_get): New function.
	* mloopx.in: Update call to m32rx_decode.  Rewrite exec loop.
	* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
1998-02-05 21:01:06 +00:00
Doug Evans
8e42015266 * Makefile.in: Add m32rx objs, and rules to build them.
* cpux.h, decodex.h, decodex.c, readx.c, semx.c, modelx.c: New files.
	* m32rx.c, mloopx.in: New files.
1998-01-20 10:43:16 +00:00
Doug Evans
369fba3089 * arch.c, arch.h, cpuall.h: New files.
* arch-defs.h: Deleted.
	* mloop.in: Renamed from mainloop.in.
	* sem.c: Renamed from semantics.c.
	* Makefile.in: Update.
	* sem-ops.h: Deleted.
	* mem-ops.h: Deleted.
start-sanitize-cygnus
	Add cgen support for generating files.
end-sanitize-cygnus
	(arch): Renamed from CPU.
	* decode.c: Redone.
	* decode.h: Redone.
	* extract.c: Redone.
	* model.c: Redone.
	* sem-switch.c: Redone.
	* sem.c: Renamed from semantics.c, and redone.
	* m32r-sim.h (PROFILE_COUNT_FILLNOPS): Update.
	(GETTWI,SETTWI,BRANCH_NEW_PC): Define.
	* m32r.c (WANT_CPU,WANT_CPU_M32R): Define.
	(m32r_{fetch,store}_register): New functions.
	(model_mark_{get,set}_h_gr): Prefix with m32r_.
	(m32r_model_mark_{busy,unbusy}_reg): Prefix with m32r_.
	(h_cr_{get,set}): Prefix with m32r_.
	(do_trap): Fetch state from current_cpu, not current_state.
	Call sim_engine_halt instead of engine_halt.
	* sim-if.c (alloc_cpu): New function.
	(free_state): New function.
	(sim_open): Call sim_state_alloc, and malloc space for selected cpu
	type.  Call sim_analyze_program.
	(sim_create_inferior): Handle selected cpu type when setting PC.
start-sanitize-m32rx
	(sim_resume): Handle m32rx.
end-sanitize-m32rx
	(sim_stop_reason): Deleted.
	(print_m32r_misc_cpu): Update.
start-sanitize-m32rx
	(sim_{fetch,store}_register): Handle m32rx.
end-sanitize-m32rx
	(sim_{read,write}): Deleted.
	(sim_engine_illegal_insn): New function.
	* sim-main.h: Don't include arch-defs.h,sim-core.h,sim-events.h.
	Include arch.h,cpuall.h.  Include cpu.h,decode.h if m32r.
start-sanitize-m32rx
	Include cpux.h,decodex.h if m32rx.
end-sanitize-m32rx
	(_sim_cpu): Include member appropriate cpu_data member for the cpu.
	(M32R_MISC_PROFILE): Renamed from M32R_PROFILE.
	(sim_state): Delete members core,events,halt_jmp_buf.
	Change `cpu' member to be a pointer to the cpu's struct, rather than
	record inside the state struct.
	* tconfig.in (WITH_DEVICES): Define here.
	(WITH_FAST,WITH_SEM_SWITCH_{FULL,FAST}): Define for the cpu.
1998-01-20 06:17:32 +00:00
Andrew Cagney
fafce69ab1 Add ABFD argument to sim_create_inferior. Document.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
1997-08-27 04:44:41 +00:00