darkkirb/old-cross-binutils
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Author SHA1 Message Date
Jeff Law
4da06098ff * mn10300-opc.c (IMM32_HIGH8_MEM): New operand type. 
(mn10300_opcodes): Reorder so as to try and select opcodes from
        the core chip when multiple alternatives exist.  Change several
        am33 instructions to use IMM32_HIGH8_MEM.  Fix typos in "mac" and
        "macbu" instructions.  Fix typos in a couple DSP instructions too.
 1998-06-24 15:56:40 +00:00
Jeff Law
8b727aa4d3 * m10300-opc.c: Support one operand "asr", "lsr" and "asl" 
instructions.  Support (sp) addressing mode by expanding it into
        (0,sp).
 1998-06-23 17:01:44 +00:00
Jeff Law
c5a6e18b2e * m10300-opc.c: Support 4 byte DSP instructions. 1998-06-22 19:38:35 +00:00
Jeff Law
b17af7f6ef * m10300-opc.c: Support for 3 byte and 4 byte extended instructions 
found on the mn10300.
 1998-06-19 15:45:13 +00:00
Jeff Law
9eb61c7c61 start-sanitize-am33 
* m10300-opc.c (USP, SSP, MSP, PC, IMM4, EPSW, RN0, RM1): New
        operands for the am33.
        (mn10300_opcodes): Add new instructions from the am33.
end-sanitize-am33
        * m10300-opc.c (mn10300_opcodes): Change opcode for "syscall".

Snapshot current work.
 1998-06-17 23:54:25 +00:00