Commit graph

12 commits

Author SHA1 Message Date
Mike Frysinger
af9f7da78b sim: add sim_complete_command stubs for non-common-using ports
For the ports that don't use the common/ subdir, we need to add stub funcs
to them to avoid build failures with gdb and command completion.  These do
not implement the actual completion functionality ... any port that wants
that can either convert to the common/ subdir, or fill out the function on
their own time.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-16 18:16:36 +00:00
Andrew Burgess
dae477fed8 http://sourceware.org/ml/gdb-patches/2010-11/msg00112.html
gdb/ChangeLog
	* remote-sim.c (gdbsim_store_register): Update API to
	sim_store_register to check more error conditions.
include/gdb/ChangeLog
	* remote-sim.h (sim_store_register): Update the API
	documentation for this function.
sim/erc32/ChangeLog
sim/h8300/ChangeLog
sim/m32c/ChangeLog
sim/mn10300/ChangeLog
sim/ppc/ChangeLog
sim/rx/ChangeLog
sim/v850/ChangeLog
	* ???.c (sim_store_register): Update return value to
	match new API.
2011-01-11 14:19:34 +00:00
Joel Brobecker
7b6bb8daac run copyright.sh for 2011. 2011-01-01 15:34:07 +00:00
Kevin Buettner
8d794149aa * fpu.c, gdb-if.c, load.c, misc.c, syscalls.c (config.h): Include. 2010-09-23 23:05:28 +00:00
DJ Delorie
f9c7014e9c [include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.

[opcodes]

* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.

[sim/rx]

* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New.  We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache.  Save
decoded opcode information and re-use.  Call DO_RETURN instead of
return throughout.  Remove ediv and edivu.
* mem.c (ptdc): New.  Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here.  Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
Kevin Buettner
a1669f9a28 * gdb-if.c (sim_store_register): Add case for sim_rx_acc_regnum. 2010-07-07 23:22:43 +00:00
Kevin Buettner
fd60dc691f Add "acc" register. Revise register order and names. 2010-06-24 20:38:05 +00:00
Kevin Buettner
c91e8ecef5 Revert accidentally committed changes that aren't ready yet. 2010-05-28 17:21:40 +00:00
Kevin Buettner
12cb73884e * gdb-if.c (sim_do_command): Add a "sim verbose noisy" command. 2010-05-28 17:10:32 +00:00
Mike Frysinger
5558e7e691 sim: constify sim_write source buffer (part 2)
As pointed out by Sandra Loosemore, a bunch of targets define sim_write
themselves instead of using the common/ code.  So constify them too.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-04-14 07:38:06 +00:00
Joel Brobecker
dc3cf14f35 Update copyright notices to add year 2010. 2010-01-01 10:03:36 +00:00
DJ Delorie
4f8d4a3861 [sim]
* rx: New directory.
	* configure.ac: Add entry for Renesas RX.
	* configure: Regenerate.

[include/gdb]
	* sim-rx.h: New.
2009-11-24 19:22:45 +00:00