* infptrace.c (child_xfer_memory): Likewise.
* monitor.c (monitor_xfer_memory): Likewise.
* remote-adapt.c (adapt_xfer_inferior_memory): Likewise.
* remote-array.c (array_xfer_memory): Likewise.
* remote-bug.c (bug_xfer_memory): Likewise.
* remote-e7000.c (e7000_xfer_inferior_memory): Likewise.
* remote-eb.c (eb_xfer_inferior_memory): Likewise.
* remote-es.c (es1800_xfer_inferior_memory): Likewise.
* remote-mips.c (mips_xfer_memory): Likewise.
* remote-mm.c (mm_xfer_inferior_memory): Likewise.
* remote-nindy.c (nindy_xfer_inferior_memory): Likewise.
* remote-os9k.c (rombug_xfer_inferior_memory): Likewise.
* remote-rdi.c (arm_rdi_xfer_memory): Likewise.
* remote-rdp.c (remote_rdp_xfer_inferior_memory): Likewise.
* remote-sds.c (sds_xfer_memory): Likewise.
* remote-sim.c (gdbsim_xfer_inferior_memory): Likewise.
* remote-st.c (st2000_xfer_inferior_memory): Likewise.
* remote-udi.c (udi_xfer_inferior_memory): Likewise.
* remote-vx.c (vx_xfer_memory): Likewise.
* remote.c (remote_xfer_memory): Likewise.
* target.c (debug_to_xfer_memory, do_xfer_memory): Likewise.
* target.h (child_xfer_memory, do_xfer_memory, xfer_memory): Likewise.
* target.h (#include "memattr.h"): Added.
(target_ops.to_xfer_memory): Add attrib argument.
* wince.c (_initialize_inftarg): Removed call to set_dcache_state.
* dcache.h (set_dcache_state): Removed declaration.
* dcache.c (set_dcache_state): Removed definition
* dcache.c: Update module comment, as dcache is now enabled and
disabled with memory region attributes instead of by the global
variable "remotecache". Add comment describing the interaction
between dcache and memory region attributes.
(dcache_xfer_memory): Add comment describing benefits of moving
cache writeback to a higher level.
(dcache_struct): Removed cache_has_stuff field. This was used to
record whether the cache had been accessed in order to invalidate
it when it was disabled. However, this is not needed because the
cache is write through and the code that enables, disables, and
deletes memory regions invalidate the cache. Add comment which
suggests that we could be more selective and only invalidate those
cache lines containing data from those memory regions.
(dcache_invalidate): Updated.
(dcache_xfer_memory): Updated.
(dcache_alloc): Don't abort() if dcache_enabled_p is clear.
(dcache_xfer_memory): Removed code that called do_xfer_memory() to
perform a uncached transfer if dcache_enabled_p was clear. This
function is now only called if caching is enabled for the memory
region.
(dcache_info): Always print cache info.
* target.c (do_xfer_memory): Add attrib argument.
(target_xfer_memory, target_xfer_memory_partial): Break transfer
into chunks defined by memory regions, pass region attributes to
do_xfer_memory().
* dcache.c (dcache_read_line, dcache_write_line): Likewise.
* Makefile.in (SFILES): Add memattr.c.
(COMMON_OBS): Add memattr.o.
(dcache.o): Add target.h to dependencies.
* memattr.c: New file.
* memattr.h: Likewise.
Re-do TARGET_PRINT_INSN_INFO, TARGET_PRINT_INSN, TARGET_ARCHITECTURE,
TARGET_ARCHITECTURE_AUTO, TARGET_BYTE_ORDER_SELECTABLE_P,
TARGET_BYTE_ORDER so that they can all be overriden.
Document.
Convert mn10300 and PPC targets.
* blockframe.c(find_pc_sect_partial_function): look for min syms in
the same section when trying to guess the end of a function.
* symfile.c(list_overlays_command): use print_address_numeric
* remote-sim.c: export simulator_command
* tm-r5900.h: add COP0 registers
* txvu-tdep.c: printvector and printvector-order commands
* tm-txvu.h: add COP0 registers
* mips-tdep.c: use NUM_CORE_REGS
In dwarf2read.c, if the ABI is 32 bit and 64 bit addresses are encountered
discard the most significant 32 bits.
Use CORE_ADDR for address variables instead of long.
Add more explicit tx49 configur target.
Check/use sigaction/SA_RESTART in remote-sim.c
(mips16_heuristic_proc_desc): Calculate offsets of registers
saved by entry pseudo-op after rest of prologue has been read.
Use set_reg_offset to ignore all but the first save of a given
register.
(mips32_heuristic_proc_desc): Initialize frame adjustment value.
* remote-sim.c (gdbsim_store_register): Don't update registers
that have a null or empty name.
* findvar.c (read_register_bytes): Don't fetch registers
that have a null or empty name.
member for storing offset of MIPS16 frame pointer from SP.
* mips-tdep.c: Use RA_REGNUM instead of hardcoded 31 throughout.
(PROC_FRAME_ADJUST): Define.
(mips16_heuristic_proc_desc): Store frame pointer adjustment value.
(get_frame_pointer): Use frame pointer adjustment value when
calculating frame address.
* remote-sim.c (gdbsim_fetch_register): Don't fetch registers
that have a null or empty name.
start-sanitize-tx19
* config/mips/tm-tx19.h (MIPS_DEFAULT_FPU_TYPE): Define.
(REGISTER_NAMES): Redefine to eliminate FP registers.
* config/mips/tm-tx19l.h: Ditto.
end-sanitize-tx19
source files.
* breakpoint.c (resolve_sal_pc): Prevent crash when pc isn't
associated with a function.
* buildsym.c (record_line start_symtab end_symtab): Don't delete
symtabs which only have line numbers (but no other debug symbols).
* dbxread.c (read_dbx_symtab end_psymtab): Ditto.
* remote-sim.c: New functions gdbsim_insert/remove_breakpoint. Use
intrinsic simulator breakpoints if available, otherwise do it the
hard way.
* configure.tgt: Add d30v.
* d30v-tdep.c: New file.
* config/d30v/d30v.mt, config/d30v/tm-d30v.h: New files.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
that image properties such as endianness can be checked.
More strongly document the expected behavour of each of the sim_*
interfaces.
Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN. Use in sim_config.
