Commit graph

219 commits

Author SHA1 Message Date
Thiemo Seufer
b7c7d6c193 * config/tc-mips.c (ADDRESS_ADD_INSN,ADDRESS_ADDI_INSN): Remove
special handling for n32 ABI.
	(macro): Likewise.
	* gas/mips/elf-rel-got-n32.d: Remove special handling for n32 ABI.
	* gas/mips/elf-rel-xgot-n32.d: Likewise.
	* gas/mips/jal-newabi.d: Likewise.
	* ld-mips-elf/elf-rel-got-n32.d: Remove special handling for n32 ABI.
	* ld-mips-elf/elf-rel-xgot-n32.d: Likewise.
2003-06-21 21:38:04 +00:00
Thiemo Seufer
815ddb5051 Revert 2003-06-11 change. 2003-06-19 16:43:38 +00:00
Thiemo Seufer
f899b4b82a * config/tc-mips.c (ADDRESS_ADD_INSN,ADDRESS_ADDI_INSN,
ADDRESS_LOAD_INSN,ADDRESS_STORE_INSN): New macros.
	(macro_build_ldst_constoffset,load_address,macro,s_cpsetup,
	s_cprestore,s_cpadd): Use them.
2003-06-16 12:13:10 +00:00
Richard Sandiford
34ce925ee0 * config/tc-mips.c (append_insn): In a compound relocation, take the
field width from the final (outermost) operator.
2003-06-12 05:45:50 +00:00
Thiemo Seufer
8c1a34cd5c * config/tc-mips.c (s_cpsetup): Use mips_frame_reg instead of SP.
(s_cprestore): Likewise.
	(s_cpreturn): Likewise.
2003-06-11 20:59:09 +00:00
Thiemo Seufer
4b0cff4e36 * config/tc-mips.c (tc_gen_reloc): Initialize retval amd reloc
with zeros.
2003-06-11 20:53:32 +00:00
Thiemo Seufer
a7ebbfdf67 * elf32-mips.c (mips_elf_generic_reloc): New Function.
(elf_mips_howto_table_rel): Use it.
	(gprel32_with_gp): Move prototype.
	(mips_elf_hi16_reloc): Check for ! BSF_LOCAL instead of zero addend.
	Use mips_elf_generic_reloc.
	(mips_elf_got16_reloc): Check for ! BSF_LOCAL instead of zero addend.
	Code cleanup.
	(_bfd_mips_elf32_gprel16_reloc): Check for ! BSF_LOCAL instead of
	zero addend.
	(mips_elf_gprel32_reloc): Likewise. Use the same GP assignment logic
	as in the other *_gprel*_reloc functions.
	(gprel32_with_gp): Handle partial_inplace properly.
	(mips32_64bit_reloc): Use mips_elf_generic_reloc.
	(mips16_gprel_reloc): Check for ! BSF_LOCAL instead of zero addend.
	Do addend handling directly instead of calling
	_bfd_mips_elf_gprel16_with_gp. Handle partial_inplace properly.
	* elf64-mips.c (mips_elf64_hi16_reloc): Check for ! BSF_LOCAL instead
	of zero addend. Handle partial_inplace properly.
	(mips_elf64_got16_reloc): Check for ! BSF_LOCAL instead of zero
	addend.
	(mips_elf64_gprel16_reloc): Likewise.
	(mips_elf64_literal_reloc): Likewise.
	(mips_elf64_gprel32_reloc): Likewise. Use the same GP assignment
	logic as in the other *_gprel*_reloc functions. Handle
	partial_inplace properly.
	(mips_elf64_shift6_reloc): Check for ! BSF_LOCAL instead of zero
	addend. Handle partial_inplace properly.
	(mips16_gprel_reloc): Likewise. Do addend handling directly instead
	of calling _bfd_mips_elf_gprel16_with_gp.
	* elfn32-mips.c (mips_elf_got16_reloc): Check for BSF_LOCAL.
	(mips_elf_gprel32_reloc): Check for ! BSF_LOCAL instead
	of zero addend.
	(mips_elf_shift6_reloc): Handle partial_inplace properly.
	(mips16_gprel_reloc): Likewise. Do addend handling directly instead
	of calling _bfd_mips_elf_gprel16_with_gp.
	* elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp): Handle
	partial_inplace properly. Fix wrong addend handling. Fix overflow
	check.
	(_bfd_mips_elf_sign_extend): Renamed from mips_elf_sign_extend and
	exported.
	(mips_elf_calculate_relocation): Use _bfd_mips_elf_sign_extend.
	(_bfd_mips_elf_relocate_section): Likewise.
	(mips_elf_create_dynamic_relocation): Update sec_info_type access.
	* elfxx-mips.h (_bfd_mips_relax_section): Fix prototype declaration.
	(_bfd_mips_elf_sign_extend): New prototype.
	* config/tc-mips.c (md_pcrel_from): Return actual pcrel address.
	(md_apply_fix3): Ignore non-special relocations. Remove superfluous
	exceptions from size assert. Remove most of the addend fixup
	specialcasing. Remove value, use valP directly. simplify fx_addnumber
	handling. Remove zero addend specialcases.
	(tc_gen_reloc): Use appropriate value for reloc2 addend. Remove
	the addend fixup specialcase.
	* config/tc-mips.h (MD_APPLY_SYM_VALUE): Define as 0.
2003-06-11 16:22:26 +00:00
Chris Demetriou
f9b4148d9e 2003-06-03 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c: (OPTION_ARCH_BASE, OPTION_ASE_BASE)
        (OPTION_COMPAT_ARCH_BASE, OPTION_FIX_BASE)
        (OPTION_MISC_BASE): New defines.
        (OPTION_BREAK, OPTION_CONSTRUCT_FLOATS, OPTION_EB, OPTION_EL)
        (OPTION_ELF_BASE, OPTION_FIX_VR4122, OPTION_FP32, OPTION_FP64)
        (OPTION_GP32, OPTION_GP64, OPTION_M3900, OPTION_M4010, OPTION_M4100)
        (OPTION_M4650, OPTION_M7000_HILO_FIX, OPTION_MARCH, OPTION_MDMX)
        (OPTION_MEMBEDDED_PIC, OPTION_MIPS1, OPTION_MIPS16, OPTION_MIPS2)
        (OPTION_MIPS3, OPTION_MIPS32, OPTION_MIPS32R2, OPTION_MIPS3D)
        (OPTION_MIPS4, OPTION_MIPS5, OPTION_MIPS64)
        (OPTION_MNO_7000_HILO_FIX, OPTION_MTUNE, OPTION_NO_CONSTRUCT_FLOATS)
        (OPTION_NO_FIX_VR4122, OPTION_NO_M3900, OPTION_NO_M4010)
        (OPTION_NO_M4100, OPTION_NO_M4650, OPTION_NO_MDMX, OPTION_NO_MIPS16)
        (OPTION_NO_MIPS3D, OPTION_NO_RELAX_BRANCH, OPTION_RELAX_BRANCH)
        (OPTION_TRAP): Redefine in terms of new defines.
        (md_longopts): Reorder entries.
2003-06-04 06:38:38 +00:00
Eric Christopher
36ede617d2 2003-05-23 Eric Christopher <echristo@redhat.com>
* config/tc-mips.c (macro_build_jalr): Warning patrol.
2003-05-23 22:26:20 +00:00
Thiemo Seufer
a105a3009c * config/tc-mips.c (append_insn): Use actual relocation size for new
fixp's.	Don't relax overflow checking for partial_inplace relocations.
	Use the actual relocation type in combined relocs, not just the type
	of the first one.
	(macro_build_jalr): Use actual relocation size for new fix.
	(s_cpsetup, s_gpdword): Likewise.
2003-05-22 09:19:33 +00:00
Thiemo Seufer
dc9461f6ad * config/tc-mips.c (macro): Don't use uninitialized tempreg. 2003-05-22 09:15:12 +00:00
Eric Christopher
143d77c5e9 2003-05-07 Eric Christopher <echristo@redhat.com>
Alexandre Oliva   <aoliva@redhat.com>

	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Adjust
	pic tests, change to warning.
	(_bfd_mips_elf_final_link): Remove EF_MIPS_CPIC flag setting.

2003-05-07  Eric Christopher  <echristo@redhat.com>

        * config/tc-mips.c (mips_abicalls): New variable.
        (md_parse_option): Use.
        (s_option): Ditto.
        (s_abicalls): Ditto.
        (mips_elf_final_processing): Set EF_MIPS_PIC and
        EF_MIPS_CPIC dependent on above.
2003-05-21 21:53:33 +00:00
Alexandre Oliva
cac012d6d3 * configure.in (MIPS_DEFAULT_ABI): AC_DEFINE.
* config/tc-mips.c (mips_after_parse_args): Set mips_abi to it.
* config.in, configure: Rebuilt.
2003-05-07 05:10:45 +00:00
H.J. Lu
d8dbbec1ca 2003-05-05 H.J. Lu <hjl@gnu.org>
* config/tc-mips.c (tc_gen_reloc): Add addend just once if
	howto->partial_inplace is false.
2003-05-06 00:28:25 +00:00
Daniel Jacobowitz
9204e615fb * config/tc-mips.c (mips_need_elf_addend_fixup): Remove
symbol_used_in_reloc_p check.
	(md_apply_fix3): Remove check for howto->pcrel_offset.
2003-05-06 00:16:12 +00:00
Eric Christopher
684022eae4 2003-04-24 Eric Christopher <echristo@redhat.com>
* config/tc-mips.c (nopic_need_relax): Revert previous
        change.
2003-04-25 04:40:09 +00:00
Alexandre Oliva
f5040a92c5 * config/tc-mips.h (tc_frag_data_type, TC_FRAG_TYPE): New.
* config/tc-mips.c: Use signed add for n32 address arithmetic.
(append_insn): When filling delay slots with instructions
that have fixups that tc_gen_reloc might consider modifyable
in variant frags, start a new frag.
(load_address): Generate GOT_DISP with of without offset
depending on whether symbol is local.  For -xgot, use
GOT_PAGE/GOT_OFST or GOT_HI16/GOT_LO16.
(macro) <M_DLA_AB, M_LA_AB>: Likewise.
<M_JAL_A>: In NewABI, use CALL16 or GOT_DISP for small got,
CALL_HI16/CALL_LO16 or GOT_PAGE/GOT_OFST for big got.
<ld_st>: In NewABI with small got, always use
GOT_PAGE/GOT_OFST, with the latter in the load/store
instruction.  With big got, use GOT_HI16/GOT_LO16 or
GOT_PAGE/GOT_OFST.
(tc_gen_reloc): Adjust variant frags with GOT_DISP in NewABI.
Add tc_frag_data.tc_fr_offset to addends.  Decay CALL16,
GOT_OFST and GOT_DISP to GOT_DISP in NewABI.
(md_convert_frag): Use memmove for safe copying of overlapping
regions.
2003-04-11 01:56:50 +00:00
Alexandre Oliva
9214dd3be3 * config/tc-mips.c (macro): Add comments explaining the rationale
for Chris' change.
2003-04-09 03:09:12 +00:00
Alexandre Oliva
eb0a7d52bd * config/tc-mips.c (macro): Put back `+ 0x8000' in test for 64-bit
constant address that Alexandre took out by accident.  Reject
64-bit addresses that are not sign extensions of 32 bits only if
we don't support 64-bit address constants.
2003-04-09 03:07:48 +00:00
Alexandre Oliva
5a7a0b7bf9 * config/tc-mips.c (HAVE_64BIT_ADDRESS_CONSTANTS): New.
(macro): Use new macro to decide whether to emit constant address
as 32 or 64 bits if addresses are 32-bit wide but registers are
64-bit wide.
2003-04-06 03:16:20 +00:00
Chris Demetriou
af22f5b24a [ gas/ChangeLog ]
2003-04-02  Chris Demetriou  <cgd@broadcom.com>

        * config/tc-mips.c (macro2): Adjust implementation of
        M_ULH, M_ULHU, M_ULW, and M_ULD so that they work properly
        in the case where the source and destination registers
        are the same.

[ gas/testsuite/ChangeLog ]
2003-04-02  Chris Demetriou  <cgd@broadcom.com>

        * gas/mips/ulh.d: Adjust for ulh and ulhu macro assembly changes.

        * gas/mips/mips.exp: Define new "gpr_ilocks" architecture
        property, and add it to mips2 (and later) chips and r3900.
        * gas/mips/uld2.s: New test source file.
        * gas/mips/ulh2.s: Likewise.
        * gas/mips/ulw2.s: Likewise.
        * gas/mips/uld2.l: New test stderr listing.
        * gas/mips/ulh2.l: Likewise.
        * gas/mips/ulw2.l: Likewise.
        * gas/mips/uld2-eb.d: New test.
        * gas/mips/uld2-el.d: Likewise.
        * gas/mips/ulh2-eb.d: Likewise.
        * gas/mips/ulh2-el.d: Likewise.
        * gas/mips/ulw2-eb-ilocks.d: Likewise.
        * gas/mips/ulw2-eb.d: Likewise.
        * gas/mips/ulw2-el-ilocks.d: Likewise.
        * gas/mips/ulw2-el.d: Likewise.
        * gas/mips/mips.exp: Run new tests for appropriate architectures.
2003-04-02 18:43:16 +00:00
Eric Christopher
97bbfa382c 2003-03-26 Eric Christopher <echristo@redhat.com>
* config/tc-mips.c (nopic_need_relax): Check for
        S_IS_EXTERN.
2003-03-26 23:32:06 +00:00
Alexandre Oliva
45f8dfe8f6 * config/tc-mips.c (mips_validate_fix): New function.
* config/tc-mips.h (TC_VALIDATE_FIX): Define.
(mips_validate_fix): Declare.
2003-03-12 23:07:38 +00:00
Alexandre Oliva
0b25d3e680 * Reverted 2003-03-02's patch. 2003-03-12 23:06:08 +00:00
Thiemo Seufer
149495708c * config/tc-mips.c (s_mips_end): Remove !BFD_ASSEMBLER case.
(s_mips_ent): Likewise.
2003-03-09 16:16:31 +00:00
Thiemo Seufer
7c2be35cae * elf32-mips.c (elf_mips_howto_table_rel): Change definition of
R_MIPS_PC16 to rightshift 2.
	(elf_reloc_map mips_reloc_map): Map to rightshifted BFD reloc.
	(bfd_elf32_bfd_reloc_type_lookup): Support
	BFD_RELOC_MIPSEMB_16_PCREL_S2.
	* elf64-mips.c (mips_elf64_howto_table_rel): Change definition of
	R_MIPS_PC16 to rightshift 2.
	(mips_elf64_howto_table_rela): Likewise.
	(mips_reloc_map): Map to rightshifted BFD reloc.
	* elfn32-mips.c: The same as in elf64-mips.c.
	* elfxx-mips.c (mips_elf_got_for_ibfd): Typo in comment.
	(mips_elf_calculate_relocation): Handle rightshifted addends for
	R_MIPS_PC16.
	* reloc.c (BFD_RELOC_MIPSEMB_16_PCREL_S2): New BFD relocation for
	MIPS Embedded PIC. Remove superfluous empty COMMENT.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
	* config/tc-mips.c (append_insn): Add handling of
	BFD_RELOC_MIPSEMB_16_PCREL_S2. Avoid emitting unneeded
	BFD_RELOC_16_PCREL_S2 relocs and add earlier warnings about
	misaligned address and reange overflow.
	(macro_build): Add handling of BFD_RELOC_MIPSEMB_16_PCREL_S2. Add
	earlier warnings about misaligned address and reange overflow.
	(mips_ip): Add handling of BFD_RELOC_MIPSEMB_16_PCREL_S2.
	(md_apply_fix): Likewise. Fix warning output.
	(tc_gen_reloc): Add handling of BFD_RELOC_MIPSEMB_16_PCREL_S2.
	Allow BFD_RELOC_16_PCREL_S2 for all ABIs.
	(md_convert_frag): Add handling of BFD_RELOC_MIPSEMB_16_PCREL_S2.
	* gas/mips/bge.d: Reactivate external branch tests.
	* gas/mips/bge.s: Likewise.
	* gas/mips/bgeu.d: Likewise.
	* gas/mips/bgeu.s: Likewise.
	* gas/mips/blt.d: Likewise.
	* gas/mips/blt.s: Likewise.
	* gas/mips/bltu.d: Likewise.
	* gas/mips/bltu.s: Likewise.
	* gas/mips/branch-misc-2.d: New File.
	* gas/mips/branch-misc-2.l: Remove.
	* gas/mips/mips.exp: Adjust branch-misc-2 test.
2003-03-02 21:30:15 +00:00
Richard Sandiford
64bdfcaf0d * config/tc-mips.c (prev_reloc_op_frag): New variable.
(macro): Check it to decide whether a new frag is needed.
	(my_getSmallExpression): Set it.
2003-02-21 10:28:27 +00:00
Richard Sandiford
5919d0127e gas/
* config/tc-mips.c (reloc_needs_lo_p): New function.
	(fixup_has_matching_lo_p): New function.
	(append_insn): Use reloc_needs_lo_p to check whether a relocation
	might need a matching %lo().  Reuse the head of mips_hi_fixup_list
	if that fixup already has a matching %lo().  Don't call frag_wane here.
	(macro): Call frag_wane here if the last unmatched hi was in the
	current frag.
	(pic_need_relax): New function, split out from...
	(md_estimate_size_before_relax): ...here.
	(mips_frob_file): Use reloc_needs_lo_p.  Use pic_need_relax to test
	whether BFD_RELOC_MIPS_GOT16 fixups refer to global symbols.

gas/testsuite/
	* gas/mips/rel12.[sd], gas/mips/rel13.[sd]: New tests.
	* gas/mips/mips.exp: Run them.
2003-02-08 17:05:55 +00:00
Richard Sandiford
09b8f35ab2 * config/tc-mips.c (my_getSmallExpression): Rework bracket handling.
testsuite/
	* gas/mips/expr1.[sd]: New test.
	* gas/mips/mips.exp: Run it.
2003-02-07 15:06:33 +00:00
Richard Sandiford
5e0116d519 gas/
* config/tc-mips.c (enum small_ex_type): Remove.
	(imm_unmatched_hi): Remove.
	(md_assemble): Remove use of imm_unmatched_hi.  Remove the last
	argument from calls to append_insn.
	(append_insn): Remove unmatched_hi parameter; check reloc_type[0]
	instead.
	(macro_build): Update append_insn calls.
	(mips16_macro_build, macro_build_lui): Likewise.
	(mips_ip): Rework handling of small expressions.  Move explicit
	relocation handling into my_getSmallExpression.  Assume that the
	value of 'o' operands is zero if there is only one bracketed
	expression left.
	(percent_op): Make constant.  Record the BFD relocation code
	associated with each operator.
	(my_getSmallParser, my_getPercentOp): Remove.
	(parse_relocation): New function.
	(my_getSamllExpression): Rework.  Fill in relocations here
	rather than in mips_ip.

gas/testsuite
	* gas/mips/elf-rel8.[sd], gas/mips/elf-rel9.[sd],
	gas/mips/elf-rel10.[sd], gas/mips/elf-rel11.[sd]: New tests.
	* gas/mips/mips.exp: Run elf-rel8 and elf-rel9 for all elf
	targets.  Run elf-rel10 and elf-rel11 for NewABI targets.
2003-02-02 19:37:20 +00:00
Alexandre Oliva
1de5b6a1a2 * configure.in (em): Set to irix on all Irix systems.
* configure: Rebuilt.
* config/te-irix.h: New file.
* config/tc-mips.c (mips_dwarf2_format): Use TE_IRIX to decide
whether to use Irix-specific 64-bit format.
2003-01-27 22:45:58 +00:00
Alan Modra
ae6063d440 * symbols.c (S_FORCE_RELOC): Add "strict" param.
* symbols.h (S_FORCE_RELOC): Likewise.
	* config/obj-aout.h (S_FORCE_RELOC): Likewise.
	* config/obj-bout.h (S_FORCE_RELOC): Likewise.
	* config/obj-coff.h (S_FORCE_RELOC): Likewise.
	* config/obj-ieee.h (S_FORCE_RELOC): Likewise.
	* config/obj-vms.h (S_FORCE_RELOC): Likewise.
	* write.c (generic_force_reloc): New function.
	(TC_FORCE_RELOCATION): Use it here instead of S_FORCE_RELOC.
	(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
	(adjust_reloc_syms): Adjust S_FORCE_RELOC call.
	* as.h (generic_force_reloc): Declare.
	* doc/internals.texi (S_FORCE_RELOC): Update.
	(TC_FORCE_RELOCATION_SUB_SAME): Update.

	* config/tc-alpha.c (alpha_force_relocation): Adjust to use
	generic_force_reloc.
	(alpha_fix_adjustable): Likewise.
	* config/tc-arm.c (arm_force_relocation): Likewise.
	* config/tc-cris.c (md_cris_force_relocation): Likewise.
	* config/tc-frv.c (frv_force_relocation): Likewise.
	* config/tc-i386.c (md_apply_fix3): Likewise.
	* config/tc-ia64.c (ia64_force_relocation): Likewise.
	* config/tc-ip2k.c (ip2k_force_relocation): Likewise.
	* config/tc-m32r.c (m32r_force_relocation): Likewise.
	* config/tc-m68hc11.c (tc_m68hc11_force_relocation): Likewise.
	* config/tc-mcore.c (mcore_force_relocation): Likewise.
	* config/tc-mips.c (mips_force_relocation): Likewise.
	* config/tc-mmix.c (mmix_force_relocation): Likewise.
	* config/tc-ppc.c (ppc_force_relocation): Likewise.
	* config/tc-s390.c (tc_s390_force_relocation): Likewise.
	* config/tc-sh.c (sh_force_relocation): Likewise.
	(md_pcrel_from_section): Likewise.
	* config/tc-sparc.c (tc_gen_reloc): Likewise.
	* config/tc-v850.c (v850_force_relocation): Likewise.
	* config/tc-xstormy16.c (xstormy16_force_relocation): Likewise.
	* config/tc-i386.h (TC_FORCE_RELOCATION): Likewise.
	* config/tc-mcore.h (TC_FORCE_RELOCATION): Likewise.
	* config/tc-sparc.h (tc_fix_adjustable): Likewise.

	* config/tc-d10v.c (d10v_force_relocation): Delete.
	* config/tc-d10v.h (TC_FORCE_RELOCATION): Don't define.
	* config/tc-dlx.c (md_dlx_force_relocation): Delete.
	* config/tc-dlx.h (TC_FORCE_RELOCATION): Don't define.
	* config/tc-fr30.c (fr30_force_relocation): Delete.
	* config/tc-fr30.h (TC_FORCE_RELOCATION): Don't define.
	* config/tc-mn10300.c (mn10300_force_relocation): Delete.
	* config/tc-mn10300.h (TC_FORCE_RELOCATION): Don't define.
	(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
	* config/tc-i960.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
	* config/tc-hppa.c (hppa_force_relocation): Adjust S_FORCE_RELOC call.
	* config/tc-mips.c (RELAX_BRANCH_TOOFAR): Warning fix.
	* config/tc-mips.h (TC_FORCE_RELOCATION_SUB_SAME): Don't define.
	* config/tc-openrisc.c (openrisc_force_relocation): Delete.
	* config/tc-openrisc.h (TC_FORCE_RELOCATION): Don't define.
	* config/tc-sparc.c (elf32_sparc_force_relocation): Delete.
	* config/tc-sparc.h (TC_FORCE_RELOCATION): Don't define for ELF.
	* config/tc-i386.c (i386_force_relocation): Delete.
	* config/tc-i386.h (TC_FORCE_RELOCATION): Don't define for
	BFD_ASSEMBLER.
	(EXTERN_FORCE_RELOC): Fix TE_PE and STRICT_PE_FORMAT nesting.
	* config/tc-m68k.h (TC_FORCE_RELOCATION): Don't define.
	* config/tc-pj.h (TC_FORCE_RELOCATION): Don't define.
	* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_ABS): Don't call
	S_FORCE_RELOC.
	(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
	* config/tc-sh64.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
2003-01-23 12:51:05 +00:00
Chris Demetriou
071742cf97 [ gas/ChangeLog ]
2003-01-02  Chris Demetriou  <cgd@broadcom.com>

        * config/tc-mips.c: Update copyright years to include 2003.
        (mips_ip): Fix indentation of "+A", "+B", and "+C" handling.
        Additionally, clean up their code slightly and clean up their
        comments some more.


        * doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation.

[ gas/testsuite/ChangeLog ]
2003-01-02  Chris Demetriou  <cgd@broadcom.com>

        * gas/mips/elf_arch_mips32r2.d: Fix file description comment.

[ include/opcode/ChangeLog ]
2003-01-02  Chris Demetriou  <cgd@broadcom.com>

        * mips.h: Update copyright years to include 2002 (which had
        been missed previously) and 2003.  Make comments about "+A",
        "+B", and "+C" operand types more descriptive.
2003-01-02 20:03:09 +00:00
Chris Demetriou
bbcc08074f [ gas/ChangeLog ]
2002-12-31  Chris Demetriou  <cgd@broadcom.com>

	* config/tc-mips.c (validate_mips_insn, mips_ip): Recognize
	the "+D" operand, which will be used only by the disassembler.

[ gas/testsuite/ChangeLog ]
2002-12-31  Chris Demetriou  <cgd@broadcom.com>

	* gas/mips/cp0sel-names-mips32.d: New test.
	* gas/mips/cp0sel-names-mips32r2.d: New test.
	* gas/mips/cp0sel-names-mips64.d: New test.
	* gas/mips/cp0sel-names-numeric.d: New test.
	* gas/mips/cp0sel-names-sb1.d: New test.
	* gas/mips/cp0sel-names.s: New test source file.
	* gas/mips/mips.exp: Run new tests.

[ include/opcode/ChangeLog ]
2002-12-31  Chris Demetriou  <cgd@broadcom.com>

	* mips.h: Note that the "+D" operand type name is now used.

[ opcodes/ChangeLog ]
2002-12-31  Chris Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_cp0sel_name): New structure.
	(mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2)
	(mips_cp0sel_names_sb1): New arrays.
	(mips_arch_choice): New structure members "cp0sel_names" and
	"cp0sel_names_len".
	(mips_arch_choices): Add references to new cp0sel_names arrays
	as appropriate, and make all existing entries reference
	appropriate mips_XXX_names_numeric arrays rather than simply
	using NULL.
	(mips_cp0sel_names, mips_cp0sel_names_len): New variables.
	(lookup_mips_cp0sel_name): New function.
	(set_default_mips_dis_options): Set mips_cp0sel_names and
	mips_cp0sel_names_len as appropriate.  Remove now-unnecessary
	checks for NULL register name arrays.
	(parse_mips_dis_option): Likewise.
	(print_insn_arg): Handle "+D" operand type.
	* mips-opc.c (mips_builtin_opcodes): Add new "+D" variants
	of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register
	names symbolically.
2002-12-31 08:11:18 +00:00
Chris Demetriou
af7ee8bfa9 [ bfd/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
	* archures.c (bfd_mach_mipsisa32r2): New define.
	* bfd-in2.h: Regenerate.
	* cpu-mips.c (I_mipsisa32r2): New enum value.
	(arch_info_struct): Add entry for I_mipsisa32r2.
	* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
	(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
	(_bfd_mips_elf_final_write_processing): Add
	bfd_mach_mipsisa32r2 case.
	(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
	binaries marked as using MIPS32 Release 2.

[ binutils/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
	changes in MIPS -M options.

[ gas/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
	CPU variants.
	* configure: Regenerate.
	* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
	(macro_build): Handle "K" operand.
	(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
	CPU_HAS_DROR and CPU_HAS_ROR are currently used.
	(mips_ip): New variable "lastpos", and implement "+A", "+B",
	and "+C" operands for MIPS32 Release 2 ins/ext instructions.
	Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
	(validate_mips_insn): Implement "+" as a way to extend the
	allowed operands, and implement "K", "+A", "+B", and "+C"
	operands.
	(OPTION_MIPS32R2): New define.
	(md_longopts): Add entry for OPTION_MIPS32R2.
	(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
	(md_parse_option): Handle OPTION_MIPS32R2.
	(s_mipsset): Reimplement handling of ".set mipsN" options
	and add support for ".set mips32r2".
	(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
	(md_show_usage): Document "-mips32r2" option.
	* doc/as.texinfo: Document "-mips32r2" option.
	* doc/c-mips.texi: Likewise.

[ gas/testsuite/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* gas/mips/cp0-names-mips32r2.d: New test.
	* gas/mips/hwr-names-mips32r2.d: New test.
	* gas/mips/hwr-names-numeric.d: New test.
	* gas/mips/hwr-names.s: New test source file.
	* gas/mips/mips32r2.d: New test.
	* gas/mips/mips32r2.s: New test source file.
	* gas/mips/mips32r2-ill.l: New test.
	* gas/mips/mips32r2-ill.s: New test source file.
	* gas/mips/mips.exp: Add mips32r2 architecture data array
	entry.  Run new tests mentioned above.

[ include/elf/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h (E_MIPS_ARCH_32R2): New define.

[ include/opcode/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h: Document "+" as the start of two-character operand
	type names, and add new "K", "+A", "+B", and "+C" operand types.
	(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
	(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
	defines.

[ opcodes/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
	(mips_hwr_names_mips3264r2): New arrays.
	(mips_arch_choice): New "hwr_names" member.
	(mips_arch_choices): Adjust for structure change, and add a new
	entry for "mips32r2" ISA.
	(mips_hwr_names): New variable.
	(set_default_mips_dis_options): Set mips_hwr_names.
	(parse_mips_dis_option): New "hwr-names" option which sets
	mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
	(print_insn_arg): Change return type to "int"
	and use that to indicate number of characters consumed.
	Add support for "+" operand extension character, "+A", "+B",
	"+C", and "K" operands.
	(print_insn_mips): Adjust for changes to print_insn_arg.
	(print_mips_disassembler_options): Adjust for "hwr-names"
	addition and "reg-names" change.
	* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
	(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
	forms of "sll".  Add new MIPS32 Release 2 instructions: ehb,
	di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
	rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
	Note that hardware rotate instructions (ror, rorv) can be
	used on MIPS32 Release 2, and add the official mnemonics
	for them (rotr, rotrv) and the similar "rotl" mnemonic for
	left-rotate.
2002-12-31 07:29:29 +00:00
Chris Demetriou
82dd009716 [ opcodes/ChangeLog ]
2002-12-18  Chris Demetriou  <cgd@broadcom.com>

	* mips-opc.c (mips_builtin_opcodes): Remove one "ror" and two
	"dror" entries, and reorder the remaining "dror" and "ror" entries.

[ gas/ChangeLog ]
2002-12-18  Chris Demetriou  <cgd@broadcom.com>

	* config/tc-mips.c (macro): In M_DROL, M_DROR, M_ROL, and M_ROR,
	use hardware rotate ops as appropriate.  In M_DROL_I, M_DROR_I,
	M_ROL_I, and M_ROR_I, simplify code, clean up warnings, and
	arrange not to issue warnings about use of AT when AT is not
	actually used.

[ gas/testsuite/ChangeLog ]
2002-12-18  Chris Demetriou  <cgd@broadcom.com>

	* gas/mips/rol.s: Add ".set noat" and some new instructions to test.
	* gas/mips/rol64.s: Likewise.
	* gas/mips/rol.l: New file.
	* gas/mips/rol.d: Adjust to use rol.l and for rol.s changes.
	* gas/mips/rol64.l: New file.
	* gas/mips/rol64.d: Adjust to use rol64.l and for rol64.s changes.
	* gas/mips/rol-hw.d: New file.
	* gas/mips/rol-hw.l: New file.
	* gas/mips/rol64-hw.d: New file.
	* gas/mips/rol64-hw.l: New file.
	* gas/mips/mips.exp: Run rol-hw and rol64-hw tests.
2002-12-18 22:52:48 +00:00
Kazu Hirata
c03099e682 * ChangeLog-9295: Fix a typo.
* README: Likewise.
	* config/tc-d10v.c: Fix a comment typo.
	* config/tc-dlx.c: Likewise.
	* config/tc-h8300.h: Likewise.
	* config/tc-h8500.h: Likewise.
	* config/tc-mips.c: Likewise.
	* config/tc-s390.c: Likewise.
	* config/tc-sh.h: Likewise.
	* config/tc-tic80.h: Likewise.
	* config/tc-w65.h: Likewise.
	* config/tc-z8k.c: Likewise.
	* config/tc-z8k.h: Likewise.
	* testsuite/gas/h8300/cmpsi2.s: Likewise.
2002-12-17 01:13:56 +00:00
Alexandre Oliva
af6ae2ade7 * tc-mips.c (RELAX_BRANCH_ENCODE): Remove reloc_s2 argument.
Adjust callers.
(RELAX_BRANCH_RELOC_S2): Delete.
(append_insn): Use only BFD_RELOC_16_PCREL_S2 for branches.
Do not handle BFD_RELOC_16_PCREL.
(macro_build, mips_ip): Likewise.
(md_pcrel_from): Return 4 for undefined symbols regardless of
mips_pic.
(md_apply_fix3): Use only BFD_RELOC_16_PCREL_S2 for branches.
Don't dereference howto if no such relocation is available.
Do not apply hack for in-place zero addend in NEWABI.
(md_convert_frag): Use only BFD_RELOC_16_PCREL_S2 for branches.
2002-12-12 04:40:07 +00:00
Alan Modra
b34976b65a s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. Simplify
comparisons of bfd_boolean vars with TRUE/FALSE.  Formatting.
2002-11-30 08:39:46 +00:00
Kevin Buettner
14e777e044 Add support for 64-bit DWARF 2 formats to gas. 2002-11-18 21:08:54 +00:00
Alexandre Oliva
a816d1ed6a * config/tc-mips.c (s_change_section): Make sure input buffer
is not accessed past the end.  Don't hand
obj_elf_change_section a pointer into the input buffer.
2002-11-18 20:45:48 +00:00
Alexandre Oliva
6b70243f72 * config/tc-mips.c (tc_gen_reloc): Fix typo in handling of
GOT_LO16 on NEWABI.
2002-11-18 20:41:03 +00:00
Alexandre Oliva
78e1bb4045 * config/tc-mips.c (macro_build_lui): _gp_disp is not special on
NEWABI, but we should still emit HI16_S for non-PIC n32.
2002-11-07 02:29:32 +00:00
H.J. Lu
aa3d8fdff8 2002-11-05 H.J. Lu <hjl@gnu.org>
* config/tc-mips.c (support_64bit_objects): Check *l before it
	is freed.
2002-11-05 21:53:13 +00:00
Richard Sandiford
631cb423b2 * config/tc-mips.c (mips_need_elf_addend_fixup): Return true
for relocs against symbols in a merged section.

testsuite/
	* gas/mips/elf-rel7.[sd]: New test.
	* gas/mips/mips.exp: Run it.
2002-10-21 14:59:30 +00:00
Alexandre Oliva
6047c971a2 * config/tc-mips.c (md_begin): Add $fcc registers to the symbol
table as register names.
2002-10-19 00:37:50 +00:00
Alexandre Oliva
10181a0dce * config/tc-mips.c (s_gpdword): New function.
(mips_pseudo_table): Add .gpdword.
(mips_need_elf_addend_fixup): never for NEWABI.
(md_apply_fix3): Don't mark BFD_RELOC64 after GPREL16 or
GPREL32 as done.
(s_cpadd): Generate .cpadd on NEWABI.
2002-10-13 21:22:49 +00:00
Alexandre Oliva
4a6a3df43d * config/tc-mips.h (mips_relax_frag): Take segment as argument.
(md_relax_frag): Adjust macro.
* config/tc-mips.c (mips_relax_branch): New variable.
(RELAX_BRANCH_ENCODE, RELAX_BRANCH_P, RELAX_BRANCH_LIKELY,
RELAX_BRANCH_LINK, RELAX_BRANCH_TOOBAR): New.
(RELAX_MIPS16_P): Adjust.
(append_insn): Emit branch to non-constant in a frag_var if
branch-relaxation is desirable and possible.
(OPTION_RELAX_BRANCH, OPTION_NO_RELAX_BRANCH): New options.
(OPTION_ELF_BASE): Adjust.
(md_parse_option): Handle new options.
(md_apply_fix3): Update comment on EMBEDDED_PIC conditional
branch relaxation.
(relaxed_branch_length): New function.
(md_estimate_size_before_relax): Handle branch frags.
(mips_relax_frag): Likewise.
(md_convert_frag): Handle branch frags.  Warn if branch is
relaxed.
2002-10-12 05:23:33 +00:00
Richard Sandiford
60b63b728f [gas/]
* doc/c-mips.texi: Add entries for -march=vr4120,vr4130,vr4181,
	vr5400 and vr5500.  Add entry for -mfix-vr4122-bugs.
	* config/tc-mips.c (CPU_HAS_DROR, CPU_HAS_ROR): New macros.
	(hilo_interlocks): True for CPU_VR5500.
	(gpr_interlocks, cop_interlocks): True for CPU_VR5400 and CPU_VR5500.
	(mips_fix_vr4122_bugs): New.
	(append_insn): Work around 4122 errors if mips_fix_vr4122_bugs.
	(mips_emit_delays): Likewise.
	(macro2) [M_DROLI]: Use dror or dror32 if CPU_HAS_DROR.
	[M_ROLI]: Likewise ror if CPU_HAS_ROR.
	(validate_mips_insn, mips_ip): Handle '[', ']', 'e' and '%'.
	(OPTION_FIX_VR4122, OPTION_NO_FIX_VR4122): New options.
	(md_longopts): Add -mfix-vr4122-bugs and -no-mfix-vr4122-bugs.
	(OPTION_ELF_BASE): Bump.
	(md_parse_option): Handle the new options.
	(mips_cpu_info_table): Add entries for vr4120, vr4130, vr4181,
	vr5400 and vr5500.

[gas/testsuite/]
	* gas/mips/mips4100.[sd]: Move dmadd16 and madd16 checks to...
	* gas/mips/vr4111.[sd]: ...this new test.
	* gas/mips/vr4120.[sd],
	* gas/mips/vr4122.[sd],
	* gas/mips/vr5400.[sd],
	* gas/mips/vr5500.[sd]: New tests.
	* mips.exp: Run them.
2002-09-30 12:04:54 +00:00
H.J. Lu
7a49a8c2b4 2002-09-29 H.J. Lu <hjl@gnu.org>
* config/tc-mips.c (md_apply_fix3): Subtract the symbol value
	twice if howto->pcrel_offset is true.
2002-09-30 06:32:00 +00:00