Commit graph

7000 commits

Author SHA1 Message Date
Andreas Krebbel
0f042c67a0 S/390: ifunc: Fix PR18841.
In order to get the ifunc relocs properly sorted the correct class
needs to be returned.  The code mimics what has been done for x86.

bfd/ChangeLog:

	PR ld/18841
	* elf32-s390.c (elf_s390_reloc_type_class): Return
	reloc_class_ifunc for ifunc symbols.
	* elf64-s390.c (elf_s390_reloc_type_class): Likewise.
2015-10-22 10:11:07 +02:00
Andreas Krebbel
0a511368e2 S/390: ifunc: Fix for undefined ifunc symbols.
bfd/ChangeLog:

	* elf32-s390.c (elf_s390_finish_dynamic_symbol): Call
	elf_s390_finish_ifunc_symbol only for actually defined symbols.
	* elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
2015-10-22 10:02:38 +02:00
Andreas Krebbel
61643fbadb S/390: Get rid of superfluous parameter to s390_elf_allocate_ifunc_dyn_relocs.
bfd/ChangeLog:
	* elf-s390-common.c (s390_elf_allocate_ifunc_dyn_relocs): Remove
	`head' parameter.
	* elf32-s390.c (allocate_dynrelocs): Don't use last parameter.
	* elf64-s390.c (allocate_dynrelocs): Don't use last parameter.
2015-10-22 09:59:40 +02:00
Hans-Peter Nilsson
f9c62303d8 Correct printed value of Main in mmo.c consistency error message. 2015-10-20 06:56:33 +02:00
Doug Evans
434d28e01b targets.c (bfd_flavour_name): "MMO" is spelled "mmo".
bfd/ChangeLog:

	* targets.c (bfd_flavour_name): "MMO" is spelled "mmo".
2015-10-18 13:13:07 -07:00
Alan Modra
9f08fa5c12 Correct powerpc64le __glink_PLTresolve .eh_frame FDE
* elf64-ppc.c (ppc64_elf_size_stubs): Correct __glink_PLTresolve
	eh_frame FDE for ELFv1.
2015-10-17 20:17:58 +10:30
H.J. Lu
75a06c790f Check if symbol is defined when converting mov to lea
We need to check if symbol is defined when converting mov to lea since
SYMBOL_REFERENCES_LOCAL may return true on hidden undefined symbols.

	* elf32-i386.c (elf_i386_convert_mov_to_lea): Check if symbol
	is defined.
	* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Likewise.
2015-10-16 04:21:03 -07:00
H.J. Lu
b31bcacc48 Convert mov to lea for loading address of local common symbol
There is no need to check def_regular when converting mov to lea for
loading address of local symbols since def_regular may be false for
common symbols and SYMBOL_REFERENCES_LOCAL is sufficient.

bfd/

	* elf32-i386.c (elf_i386_convert_mov_to_lea): Don't check
	def_regular.
	* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Likewise.

ld/testsuite/

	* ld-i386/lea1.s: Add a test for loading address of local common
	symbol.
	* ld-x86-64/lea1.s: Likewise.
	* ld-i386/lea1a.d: Updated.
	* ld-i386/lea1b.d: Likewise.
	* ld-i386/lea1c.d: Likewise.
	* ld-x86-64/lea1a.d: Likewise.
	* ld-x86-64/lea1b.d: Likewise.
	* ld-x86-64/lea1c.d: Likewise.
	* ld-x86-64/lea1d.d: Likewise.
	* ld-x86-64/lea1e.d: Likewise.
	* ld-x86-64/lea1f.d: Likewise.
2015-10-16 03:14:40 -07:00
H.J. Lu
ae7683d238 Fix typos in comments in _bfd_elf_merge_symbol
* elflink.c (_bfd_elf_merge_symbol): Fix typos in comments
2015-10-15 11:01:39 -07:00
Alan Modra
e43fb83166 objcopy --extract-symbol
Calling bfd_copy_private_bfd_data is necessary to copy ELF file header
info.

binutils/
	* objcopy.c (copy_object): Don't omit bfd_copy_private_bfd_data
	call when extract_symbol.
bfd/
	* elf32-v850.c (v850_elf_copy_private_bfd_data): Remove assertion
	that input and output .note.renesas sections are same size.
	Instead, only copy input to output if they are.
2015-10-15 23:38:29 +10:30
Riku Voipio
b32a5c16f1 Use the file_ptr type when calling bfd_seek.
PR ld/19123
	* elfcore.h (elf_core_file_p): Use the file_ptr type to hold the
	offset for bfd_seek.
	* elfcode.h (elf_object_p): Likewise.
2015-10-15 12:56:55 +01:00
Rich Felker
b4b0e149fa bfd: [SH] Emit DT_PLTGOT for FDPIC output unconditionally
PR ld/19091
* elf32-sh.c (sh_elf_size_dynamic_sections): Always emit DT_PLTGOT for FDPIC output.
2015-10-15 07:14:43 +09:00
Alan Modra
341b8ee719 Tidy code setting PT_GNU_RELRO p_flags
No functional changes here.

	* elf.c (_bfd_elf_map_sections_to_segments): Don't set
	PT_GNU_RELRO p_flags.
	(assign_file_positions_for_non_load_sections): Set PT_GNU_RELRO
	flags to PF_R here.
2015-10-13 16:23:13 +10:30
H.J. Lu
4373f8af3d Skip the unversioned definition after the default version
We may see an unversioned definition after the default version.  We
should skip the unversioned definition in this case.

bfd/

	PR ld/19073
	* elflink.c (_bfd_elf_add_default_symbol): Skip the unversioned
	definition after the default version.

ld/testsuite/

	PR ld/19073
	* ld-elf/pr19073.map: New file.
	* ld-elf/pr19073.rd: Likewise.
	* ld-elf/pr19073.s: Likewise.
	* ld-elf/shared.exp (build_tests): Add tests for PR ld/19073.
2015-10-12 04:57:16 -07:00
Andreas Krebbel
ef05be83b7 PR19083 S/390: Fix garbage collection of some GOT relocs.
bfd/ChangeLog:

2015-10-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	PR ld/19083
	* elf32-s390.c (elf_s390_gc_sweep_hook): Do not reduce got
	refcount for relocs not really requiring a got slot.
	* elf64-s390.c (elf_s390_gc_sweep_hook): Likewise.
2015-10-12 10:22:49 +02:00
John David Anglin
da6e19a926 Ignore references with relocs to discarded sections in .data.rel.ro.local on hppa-linux. 2015-10-11 19:08:54 -04:00
Nick Clifton
886a250647 New ARC implementation.
bfd	* archures.c: Remove support for older ARC. Added support for new
	ARC cpus (ARC600, ARC601, ARC700, ARCV2).
	* bfd-in2.h: Likewise.
	* config.bfd: Likewise.
	* cpu-arc.c: Likewise.
	* elf32-arc.c: Totally changed file with a refactored
	inplementation of the ARC port.
	* libbfd.h: Added ARC specific relocation types.
	* reloc.c: Likewise.

gas     * config/tc-arc.c: Revamped file for ARC support.
        * config/tc-arc.h: Likewise.
        * doc/as.texinfo: Add new ARC options.
        * doc/c-arc.texi: Likewise.

ld	* configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
	* emulparams/arcebelf_prof.sh: New file
	* emulparams/arcebelf.sh: Likewise.
	* emulparams/arceblinux_prof.sh: Likewise.
	* emulparams/arceblinux.sh: Likewise.
	* emulparams/arcelf_prof.sh: Likewise.
	* emulparams/arcelf.sh: Likewise.
	* emulparams/arclinux_prof.sh: Likewise.
	* emulparams/arclinux.sh: Likewise.
	* emulparams/arcv2elfx.sh: Likewise.
	* emulparams/arcv2elf.sh: Likewise.
	* emultempl/arclinux.em: Likewise.
	* scripttempl/arclinux.sc: Likewise.
	* scripttempl/elfarc.sc: Likewise.
	* scripttempl/elfarcv2.sc: Likewise
	* Makefile.am: Add new ARC emulations.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new feature.

opcodes * arc-dis.c: Revamped file for ARC support
	* arc-dis.h: Likewise.
	* arc-ext.c: Likewise.
	* arc-ext.h: Likewise.
	* arc-opc.c: Likewise.
	* arc-fxi.h: New file.
	* arc-regs.h: Likewise.
	* arc-tbl.h: Likewise.

binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
	and ARCv2.
	(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Likewise.
	* NEWS: Mention the new feature.

include	* dis-asm.h (arc_get_disassembler): Correct declaration.
	* arc-reloc.def: Macro file with definition of all relocation
	types.
	* arc.h: Changed macros for the newly supported ARC cpus.  Altered
	enum defining the supported relocations.
	* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
	macro for EM_ARC_COMPACT2.
        * arc-func.h: New file.
        * arc.h: Likewise.
2015-10-07 14:20:19 +01:00
H.J. Lu
8c6da3dfbc Clear the ch_reserved field in 64-bit output
It is better to clear the ch_reserved field of Elf64_External_Chdr
in 64-bit output.

	* bfd.c (bfd_update_compression_header): Clear the ch_reserved
	field in 64-bit output.
	(bfd_convert_section_contents): Likewise.
2015-10-06 14:34:17 -07:00
H.J. Lu
a0d49154d4 Don't re-export common symbols
For ELF linker, a common symbol isn't a definition.  When we decide if a
symbol should be re-exported, we should check if the symbol isn't
undefined, not if it is a definition.

bfd/

	PR ld/18914
	* elflink.c (elf_link_add_object_symbols): Don't re-export a
	symbol if it isn't undefined.

ld/testsuite/

	PR ld/18914
	* ld-elf/exclude.exp: Also check exclude_common.
	* ld-elf/exclude2.s: Add exclude_common.
2015-10-05 14:45:17 -07:00
H.J. Lu
d00c2bc9c0 Enable IAMCU and PEI for Solaris2/x86
bfd/

	* config.bfd (targ_selvecs, targ64_selvecs): Add iamcu_elf32_vec,
	i386_pei_vec and x86_64_pei_vec for Solaris2/x86.

ld/

	* configure.tgt (targ_extra_emuls): Add elf_iamcu for Solaris2/x86.
2015-10-04 07:42:43 -07:00
Renlin Li
3ebe65c0ff [LD][AARCH64]Add TLSIE relaxation support under large memory model.
bfd/
2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Add
	TLSIE_MOVW_GOTTPREL_G1.
	(aarch64_tls_transition_without_check): Add
	TLSIE_MOVW_GOTTPREL_G1 to TLSLE_MOVW_TPREL_G2
	transition for local symbol.
	(elfNN_aarch64_tls_relax): Add a argument to pass tp offset.
	Add TLSIE_MOVW_GOTTPREL_G1 relaxation.
	(elfNN_aarch64_relocate_section): Call elfNN_aarch64_tls_relax
	with new argument.

ld/testsuite/
2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp (tls-relax-large-le-ie): Run new test.
	* ld-aarch64/tls-relax-large-ie-le.d: New.
	* ld-aarch64/tls-relax-large-ie-le.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li
0484b4549e [LD][AARCH64]Add TLSDESC support for large memory model.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_tls_transition_without_check):  Add
	relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC,
	TLSDESC_OFF_G1.
	(aarch64_tls_transition_without_check): Add relaxation support.
	(aarch64_reloc_got_type): Add support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_tls_relax): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: Run new test.
	* ld-aarch64/tls-large-desc.d: New.
	* ld-aarch64/tls-large-desc.s: New.
	* ld-aarch64/tls-relax-large-desc-ie.d: New.
	* ld-aarch64/tls-relax-large-desc-ie.s: New.
	* ld-aarch64/tls-relax-large-desc-le.d: New.
	* ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li
43a357f99f [GAS][AARCH64]Add TLSDESC large memory model support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Check overflow for
	BFD_RELOC_AARCH64_TLSDESC_OFF_G1.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (s_tlsdescadd): New.
	(s_tlsdescldr): New.
	(md_pseudo_table): Handle tlsdescadd and tlsdescldr pseudo ops.
	(reloc_table): Add entries for BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC and
	BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC.
	(process_movw_reloc_info): Support AARCH64_TLSDESC_OFF_G1 and
	    AARCH64_TLSDESC_OFF_G0_NC.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsdesc_off_g0_nc.d: New.
	* gas/aarch64/reloc-tlsdesc_off_g0_nc.s: New.
	* gas/aarch64/reloc-tlsdesc_off_g1.d: New.
	* gas/aarch64/reloc-tlsdesc_off_g1.s: New.
	* gas/aarch64/tls-desc.d: New.
	* gas/aarch64/tls-desc.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li
ac73473248 [BFD][AARCH64]Add TLSGD relaxation support under large memory model.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC):
	Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1.
	(aarch64_tls_transition_without_check): Likewise
	(elfNN_aarch64_tls_relax): Likwise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: run new test
	* ld-aarch64/tls-relax-large-gd-ie.d: New.
	* ld-aarch64/tls-relax-large-gd-ie.s: New.
	* ld-aarch64/tls-relax-large-gd-le.d: New.
	* ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li
b7a944fea3 [BFD][AARCH64]Create GOT section for TLSLE_MOVW_TPREL_G(1, 1_NC, 2).
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Create GOT section
	for TLSLE_MOVW_TPREL_G(1, 1_NC, 2) relocation.
2015-10-02 17:56:09 +01:00
Renlin Li
3b957e5b07 [Binutils][AARCH64]Add TLS IE large memory support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and
	AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Make
	TLSIE_MOVW_GOTTPREL_G1 check overflow.
	(aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1
	and TLSIE_MOVW_GOTTPREL_G0_NC.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): Add two entries for
	gottprel_g0_nc and gottprel_g1.
	(process_movw_reloc_info): Add support.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gottprel_g0_nc.d: New.
	* gas/aarch64/reloc-gottprel_g0_nc.s: New.
	* gas/aarch64/reloc-gottprel_g1.d: New.
	* gas/aarch64/reloc-gottprel_g1.s: New.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/tls-large-ie.d: New.
	* ld-aarch64/tls-large-ie.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li
7ba7cfe431 [LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-516.d: New.
	* ld-aarch64/emit-relocs-516.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li
3e8286c0d2 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g0_nc.d: New.
	* gas/aarch64/reloc-tlsgd_g0_nc.s: New.
2015-10-02 17:56:08 +01:00
Renlin Li
94facae337 [LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-515.d: New.
	* ld-aarch64/emit-relocs-515.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li
1aa66fb152 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G1): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g1.s: New.
	* gas/aarch64/reloc-tlsgd_g1.s: New.
2015-10-02 17:56:08 +01:00
Renlin Li
dc8008f508 [LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: Run new test.
	* ld-aarch64/emit-relocs-301.d: New.
	* ld-aarch64/emit-relocs-301.s: New.
2015-10-02 17:56:07 +01:00
Renlin Li
ca632371ce [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry
	MOVW_GOTOFF_G0_NC.
	* libbfd.h: Regnerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g0_nc.
	(process_movw_reloc_info): Support gotoff_g0_nc.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g0_nc.s: New.
	* gas/aarch64/reloc-gotoff_g0_nc.d: New.
2015-10-02 17:56:07 +01:00
Renlin Li
74a1bfe1d6 [LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add support
	for BFD_RELOC_AARCH64_MOVW_GOTOFF_G1.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise
	(elfNN_aarch64_final_link_relocate): Calculate offset within GOT.

ld/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-302.d: New.
	* ld-aarch64/emit-relocs-302.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-02 17:56:07 +01:00
Renlin Li
654248e7f7 [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G1): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	MOVW_GOTOFF_G1.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g1.
	(process_movw_reloc_info): Support newly added modifier.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g1.s: New.
	* gas/aarch64/reloc-gotoff_g1.d: New.
2015-10-02 17:56:07 +01:00
Renlin Li
a2e1db00c7 [LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_LD_64_GOTOFF_LO15 support.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise
	(elfNN_aarch64_final_link_relocate): Calculate offset within GOT.

ld/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-310.d: New.
	* ld-aarch64/emit-relocs-310.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the test.
2015-10-02 17:56:07 +01:00
Renlin Li
a0becb8948 [BFD][AARCH64]Refactor to facilitate further large memory model support patches.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Change if to
	switch statement.
2015-10-02 17:56:07 +01:00
H.J. Lu
5db4f0d383 Create a PLT entry for R_X86_64_PC32 in non-code sections
Since something like ".long foo - ." may be used as pointer, we make
sure that PLT is used if foo is a function defined in a shared library.

bfd/

	PR ld/19031
	* elf64-x86-64.c (elf_x86_64_check_relocs): Set
	pointer_equality_needed for R_X86_64_PC32 reloc in non-code
	sections.

ld/testsuite/

	PR ld/19031
	* ld-x86-64/x86-64.exp: Run PR ld/19031 test.
	* ld-x86-64/pr19031.out: New file.
	* ld-x86-64/pr19031a.c: Likewise.
	* ld-x86-64/pr19031b.S: Likewise.
	* ld-x86-64/pr19031c.c: Likewise.
2015-10-01 10:49:33 -07:00
Renlin Li
73524045d3 [BFD][AARCH64]Emit single AARCH64_MAP_INSN symbol for the whole plt.
bfd/

2015-10-01  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_output_plt_map): Remove.
	(elfNN_aarch64_output_arch_local_syms): Emit AARCH64_MAP_INSN once.

ld/testsuite/

2015-10-01  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/plt_mapping_symbol.d: New.
	* ld-aarch64/plt_mapping_symbol.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-01 14:27:56 +01:00
Kaz Kojima
de48f481b1 bfd/config.bfd: Drop non-linux non-fdpic stuff from the last change of targ_selvecs of sh*-linux cases 2015-10-01 14:13:26 +09:00
Alan Modra
017e6bceee Revert "Also check e_machine when merging sections"
Commit 9865bd0d added a bogus check in _bfd_elf_merge_sections.

bfd/
	PR ld/19013
	* elflink.c (_bfd_elf_merge_sections): Revert last change.
ld/testsuite/
	* ld-x86-64/pr19013-x32.d: Update.
2015-10-01 07:41:28 +09:30
H.J. Lu
4b627c1844 Create a PLT entry for R_386_PC32 in non-code sections
Since something like ".long foo - ." may be used as pointer, we make
sure that PLT is used if foo is a function defined in a shared library.

bfd/

	PR ld/19031
	* elf32-i386.c (elf_i386_check_relocs): Set
	pointer_equality_needed for R_386_PC32 reloc in non-code
	sections.

ld/testsuite/

	PR ld/19031
	* ld-i386/i386.exp: Run PR ld/19031 test.
	* ld/testsuite/ld-i386/pr19031.out: New file.
	* ld/testsuite/ld-i386/pr19031a.c: Likewise.
	* ld/testsuite/ld-i386/pr19031b.S: Likewise.
	* ld/testsuite/ld-i386/pr19031c.c: Likewise.
2015-09-30 08:45:13 -07:00
H.J. Lu
9865bd0da6 Also check e_machine when merging sections
When we check consistency for merge ELF sections, we should not only
check EI_CLASS, but also compatible e_machine.

bfd/

	PR ld/19013
	* elflink.c (_bfd_elf_merge_sections): Only merge input bfds
	that have the compatible ELF machine code with the output bfd.

ld/testsuite/

	PR ld/19013
	* ld-x86-64/pr19013-nacl.d: New file.
	* ld-x86-64/pr19013-x32.d: Likewise.
	* ld-x86-64/pr19013.d: Likewise.
	* ld-x86-64/pr19013.s: Likewise.
	* ld-x86-64/x86-64.exp: Run PR ld/19013 tests.
2015-09-30 05:37:49 -07:00
Alan Modra
630993ec93 Consistency check for merge sections
We can't allow sections to be merged and sized by the ELF linker
backend and then later be output by the generic linker backend.  The
generic linker backend doesn't understand merge sections.

	PR ld/19013
	* elflink.c (_bfd_elf_merge_sections): Only merge input bfds that
	will be handled by elf_link_input_bfd.  Rename abfd param to obfd.
2015-09-30 16:06:09 +09:30
Rich Felker
6c4f2328ab Add fdpic and misc targets to config.bfd for sh*-*-linux* 2015-09-30 14:32:07 +09:00
H.J. Lu
cbd44e247e Don't use the output section size to copy input section
We can't use the output section size to copy input section since
--interleave will shrink the output section.  Instead, we change
bfd_convert_section_contents to return the updated input section
size.  When we do that, we don't need to adjust the output section
size to skip gap fills.

bfd/

	PR binutils/19020
	* bfd.c (bfd_convert_section_contents): Add ptr_size parameter.
	* bfd-in2.h: Regenerated.

binutils/

	PR binutils/19020
	* objcopy.c (copy_object): Don't adjust the output section size
	when copying from input sections.
	(copy_section): Use input section size for the copy.  Get the
	updated section size from bfd_convert_section_contents.

binutils/testsuite/

	PR binutils/19020
	* binutils-all/objcopy.exp: Run pr19020a and pr19020b.
	* lib/utils-lib.exp (run_dump_test): Support binary input.
	* binutils-all/pr19020.in: New file.
	* binutils-all/pr19020a.d: Likewise.
	* binutils-all/pr19020b.d: Likewise.
2015-09-29 13:31:57 -07:00
Peter Zotov
8a9e7a9121 Correct the generation of OR1K pc-relative relocations.
gas	PR ld/18759
	* config/tc-or1k.c (tc_gen_reloc): Correct computation of PC
	relative relocs.
	* config/tc-or1k.h (GAS_CGEN_PRCEL_R_TYPE): Delete.

bfd	* elf32-or1k.c (R_OR1K_32_PCREL): Set pcrel_offset to TRUE.
	(R_OR1K_16_PCREL): Likewise.
	(R_OR1K_8_PCREL): Likewise.

ld/tests * ld-elf/eh-frame-hdr: Expect to pass on the or1k-linux target.
2015-09-25 15:21:14 +01:00
Nick Clifton
b6518b3871 Fix compile time warnings generated when compiling with clang.
bfd	* bout.c (b_out_slurp_reloc_table): Cast constant to unsigned in
	order to avoid problems with left shifting negative values.
	(abs32code): Likewise.
	* mach-o.c (FILE_ALIGN): Likewise.
	* coff-rs6000.c (xcoff_debug_sections): Delete unused static
	array.
	* elf32-visium.c (visium_reloc_map): Likewise.
	* elf32-arm.c (elf32_arm_final_link_relocate): Remove useless
	calls to abs function.
	* elf32-frv.c (_frvfdpic_relax_tls_entries): Likewise.
	* elf32-score.c (score_elf_final_link_relocate): Likewise.
	* elf32-score7.c (score_elf_final_link_relocate): Likewise.
	* elf32-i860.c (i860_howto_pc26_reloc): Use multiplication instead
	of shifting to create a negative mask.
	* elf32-msp430.c (elf_backend_special_sections): Define.
	* elfxx-mips.c (got_ofst_reloc_p): Delete unused function.
	(got_hi16_reloc_p): Delete unused function.
	* ppcboot.c (ppcboot_bfd_print_private_bfd_data): Fix test of
	partition name.

gas	* config/tc-ppc.c (insn_validate): Cast PPC_OPSHIFT_INV to an int.

opcode	* ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left
	shifting.

ld	* emultempl/elf32.em (ehdr_start_empty): New static variable.
	(before_allocation): Use it to initialise ehdr_start_save.
	* emultempl/pe.em (write_build_id): Remove useless double
	parenthesis.
	* emultempl/pep.em (write_build_id): Likewise.

opcodes	* bfin-dis.c (fmtconst): Remove unnecessary call to the abs
	function.
	* tic30-dis.c (print_branch): Likewise.
	* cgen-asm.c (cgen_parse_signed_integer): Cast integer to signed
	value before left shifting.
	* fr30-ibld.c (fr30_cgen_extract_operand): Likewise.
	* hppa-dis.c (print_insn_hppa): Likewise.
	* mips-dis.c (mips_cp0sel_names_mipsr5900): Delete unused static
	array.
	* msp430-dis.c (msp430_singleoperand): Likewise.
	(msp430_doubleoperand): Likewise.
	(print_insn_msp430): Likewise.
	* nds32-asm.c (parse_operand): Likewise.
	* sh-opc.h (MASK): Likewise.
	* v850-dis.c (get_operand_value): Likewise.
2015-09-23 18:05:16 +01:00
Nick Clifton
6a40cf0c5c Add support for files that contain multiple symbol index tables. Fixes PR 15835
binutils	PR binutils/15835
	* readelf.c (struct elf_section_list): New structure.
	(symtab_shndx_hdr): Replace with symtab_shndx_list.
	(get_32bit_elf_symbols): Scan for a symbol index table matching
	the symbol table in use.
	(get_64bit_elf_symbols): Likewise.
	(process_section_headers): Handle multiple symbol index sections.

bfd	* elf-bfd.h (struct elf_section_list): New structure.
	(struct elf_obj_tdata): Replace symtab_shndx_hdr with
	symtab_shndx_list.  Delete symtab_shndx_section.
	(elf_symtab_shndx): Replace macro with elf_symtab_shndx_list.
	* elf.c (bfd_elf_get_syms): If symtab index sections are present,
	scan them for the section that matches the provided symbol table.
	(bfd_section_from_shdr): Record all SHT_SYMTAB_SHNDX sections.
	(assign_section_numbers): Use the first symtab index table in the
	list.
	(_bfd_elf_compute_section_file_positions): Replace use of
	symtab_shndx_hdr with use of symtab_shndx_list.
	(find_section_in_list): New function.
	(assign_file_postions_except_relocs): Use new function.
	(_bfd_elf_copy_private_symbol_data): Likewise.
	(swap_out_syms): Handle multiple symbol table index sections.
	* elf32-m32c.c (m32c_elf_relax_section): Replace use of
	symtab_shndx_hdr with use of symtab_shndx_list.
	* elf32-rl78.c (rl78_elf_relax_section): Likewise.
	* elf32-rx.c (rx_relax_section): Likewise.
	* elf32-v850.c (v850_elf_relax_delete_bytes): Likewise.
	* elflink.c (bfd_elf_final_link): Likewise.
2015-09-23 17:23:58 +01:00
H.J. Lu
c8b187ea07 Use bfd_get_32 and bfd_put_32 to access ch_type
The ch_type field in Elf64_External_Chdr is 4 bytes.  We should use
bfd_get_32 and bfd_put_32 to access it.

	* bfd.c (bfd_update_compression_header): Use bfd_put_32 on
	ch_type.
	(bfd_check_compression_header): Use bfd_get_32 on ch_type.
	(bfd_convert_section_contents): Use bfd_get_32 and bfd_put_32
	on ch_type.
2015-09-21 19:38:40 -07:00
Rich Felker
9b8b325a1f Add --no-dynamic-linker option to ld, for static PIE use
Inhibits output of .interp section in ELF executables.

include/
	* bfdlink.h (struct bfd_link_info): Add "nointerp" field.
bfd/
	* elflink.c (_bfd_elf_link_create_dynamic_sections): Don't create
	.interp when info->nointerp.
	(bfd_elf_size_dynamic_sections): Adjust assert.
	* elf32-arm.c (elf32_arm_size_dynamic_sections): Don't size .interp
	when info->nointerp.
	* elf32-bfin.c (elf32_bfinfdpic_size_dynamic_sections): Likewise.
	* elf32-cr16.c (_bfd_cr16_elf_size_dynamic_sections): Likewise.
	* elf32-cris.c (elf_cris_size_dynamic_sections): Likewise.
	* elf32-frv.c (elf32_frvfdpic_size_dynamic_sections): Likewise.
	* elf32-hppa.c (elf32_hppa_size_dynamic_sections): Likewise.
	* elf32-i370.c (i370_elf_size_dynamic_sections): Likewise.
	* elf32-i386.c (elf_i386_size_dynamic_sections): Likewise.
	* elf32-lm32.c (lm32_elf_size_dynamic_sections): Likewise.
	* elf32-m32r.c (m32r_elf_size_dynamic_sections): Likewise.
	* elf32-m68k.c (elf_m68k_size_dynamic_sections): Likewise.
	* elf32-metag.c (elf_metag_size_dynamic_sections): Likewise.
	* elf32-nds32.c (nds32_elf_size_dynamic_sections): Likewise.
	* elf32-nios2.c (nios2_elf32_size_dynamic_sections): Likewise.
	* elf32-or1k.c (or1k_elf_size_dynamic_sections): Likewise.
	* elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise.
	* elf32-s390.c (elf_s390_size_dynamic_sections): Likewise.
	* elf32-score.c (s3_bfd_score_elf_size_dynamic_sections): Likewise.
	* elf32-score7.c (s7_bfd_score_elf_size_dynamic_sections): Likewise.
	* elf32-sh.c (sh_elf_size_dynamic_sections): Likewise.
	* elf32-tic6x.c (elf32_tic6x_size_dynamic_sections): Likewise.
	* elf32-tilepro.c (tilepro_elf_size_dynamic_sections): Likewise.
	* elf32-vax.c (elf_vax_size_dynamic_sections): Likewise.
	* elf32-xtensa.c (elf_xtensa_size_dynamic_sections): Likewise.
	* elf64-alpha.c (elf64_alpha_size_dynamic_sections): Likewise.
	* elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise.
	* elf64-ppc.c (ppc64_elf_size_dynamic_sections): Likewise.
	* elf64-s390.c (elf_s390_size_dynamic_sections): Likewise.
	* elf64-sh64.c (sh64_elf64_size_dynamic_sections): Likewise.
	* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Likewise.
	* elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_size_dynamic_sections): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Likewise.
	* elfxx-tilegx.c (tilegx_elf_size_dynamic_sections): Likewise.
ld/
	* ld.texinfo (--no-dynamic-linker): Document.
	* ldlex.h (enum option_values): Add OPTION_NO_DYNAMIC_LINKER.
	* lexsup.c (ld_options, parse_args): Handle --no-dynamic-linker.
2015-09-20 15:52:27 +09:30
Doug Evans
015d2e7e49 default_read_var_value <LOC_UNRESOLVED>: Include minsym kind in error message.
bfd/ChangeLog:

	* targets.c (enum bfd_flavour): Add comment.
	(bfd_flavour_name): New function.
	* bfd-in2.h: Regenerate.

gdb/ChangeLog:

	* findvar.c (default_read_var_value) <LOC_UNRESOLVED>: Include the
	kind of minimal symbol in the error message.
	* objfiles.c (objfile_flavour_name): New function.
	* objfiles.h (objfile_flavour_name): Declare.

gdb/testsuite/ChangeLog:

	* gdb.dwarf2/dw2-bad-unresolved.c: New file.
	* gdb.dwarf2/dw2-bad-unresolved.exp: New file.
2015-09-18 21:43:38 -07:00
Alan Modra
7c9cf41584 Add PowerPC64 ld --tls-get-addr-optimize.
Sometimes it may be of benefit to force use of the __tls_get_addr_opt
call stub even when the glibc being used during linking does not
advertise __tls_get_addr_opt.

bfd/
	* elf64-ppc.h (struct ppc64_elf_params <tls_get_addr_opt>): Rename
	from no_tls_get_addr_opt.
	* elf64-ppc.c: Update for rename and inversion of tls_get_addr_opt.
	(ppc64_elf_tls_setup): Set tls_get_addr_opt to 0 only when at
	default of -1.
ld/
	* emultempl/ppc64elf.em (params): Init tls_get_addr_opt field to -1.
	(OPTION_TLS_GET_ADDR_OPT): Define.
	(PARSE_AND_LIST_LONGOPTS): Handle --tls-get-addr-opt.
	(PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Likewise.
	* ld.texinfo: Document --tls-get-addr-optimize and
	--no-tls-get-addr-optimize.
2015-09-18 16:38:03 +09:30
Alan Modra
b29b8669ad Remove one unnecessary iteration in insertion sort
PR 18867
	* elflink.c (elf_link_adjust_relocs): Correct start of insertion
	sort main loop.
2015-09-18 12:39:16 +09:30
Alan Modra
bca6d0e319 Fix slowdown in ld -r for most common case of out-of-order relocs
I chose insertion sort since relocs are mostly sorted, but there is a
common case we can handle better;  A run of relocs put out of order
due to not linking input files in order.

	PR 18867
	* elflink.c (elf_link_adjust_relocs): Modify insertion sort to
	insert a run.  Return status in case of malloc failure.
	Adjust callers.
2015-09-16 21:53:21 +09:30
Max Filippov
92b3f00826 xtensa: generate PLT entries for call0 ABI
2015-09-15  Max Filippov  <jcmvbkbc@gmail.com>
bfd/
	* elf32-xtensa.c (elf_xtensa_be_plt_entry)
	(elf_xtensa_le_plt_entry): Emit 'entry' instruction only for
	windowed ABI.
	(elf_xtensa_create_plt_entry): Generate 'l32r' offsets and fix
	up instructions according to ABI.
2015-09-15 22:18:51 +03:00
Rich Felker
fbedb42d07 Fix the SH behavior for EF_SH_PIC flag in FDPIC ABI
Fix it so that it's compatible with the kernel and other FDPIC targets.

* elf32-sh.c (sh_elf_relocate_section): Set EF_SH_PIC flag
instead of clearing it on cross-section relocations.
(sh_elf_merge_private_data): Clear EF_SH_PIC flag by default.
2015-09-15 08:34:12 +09:00
John David Anglin
f3c3938c1c Set .plt entry size to 0 in elf32-hppa.c 2015-09-12 12:50:55 -04:00
Jiong Wang
4af68b9c78 [AArch64] Sort IS_AARCH64_TLS_RELAX_RELOC in alphabetic order
This can also speedup the check as TLSDESC is the default model for
global/local dynamic that the big "||" check can finish more quickly
than putting them at the bottom.

2015-09-09  Jiong. Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Sort alphabetically.
2015-09-09 14:25:33 +01:00
Jiong Wang
259364adb8 [AArch64] Relax TLS local dynamic traditional into local executable
The linker relaxation logic will be:

Code sequence I (tiny):

    0x00 adr  x0, :tlsldm:x
    0x04 bl   __tls_get_addr
         |
         V
    0x00 mrs  x0, tpidr_el0
    0x04 add  x0, x0, TCB_SIZE

Code sequence II (small):

    0x00 adrp a0, :tlsldm:x
    0x04 add  a0, #:tlsldm_lo12:x
    0x08 bl   __tls_get_addr
         |
         V
    0x00 mrs  x0, tpidr_el0
    0x04 add  x0, x0, TCB_SIZE
    0x08 nop

2015-09-09  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support
  three TLS local dynamic traditional relocations types.
  (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to
  local executable relaxation.

ld/testsuite/
  * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase.
  * ld-aarch64/tls-relax-ld-le-small.s: Likewise.
  * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file.
  * ld-aarch64/tls-relax-ld-le-small.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-09-09 14:19:28 +01:00
H.J. Lu
77697d411e Remove convert_mov_to_lea
* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Remove
	convert_mov_to_lea.
2015-09-03 04:17:05 -07:00
H.J. Lu
c74be520ba Rename R_386_irelative to R_386_ext2
* elf32-i386.c (R_386_irelative): Renamed to ...
	(R_386_ext2): This.
	(R_386_vt_offset): Updated.
	(elf_i386_rtype_to_howto): Likewise.
	(elf_i386_relocate_section): Likewise.
2015-09-02 05:13:08 -07:00
H.J. Lu
04ebc307f9 Skip PLT for function pointer initialization
We use its PLT entry to initialize function pointer at run-time.  If
there is no other usage for the PLT entry, we can generate run-time
function pointer relocations in read-write section, which can be
resolved by dynamic linker, to initialize function pointers.  It avoids
the extra indirect branch overhead in PLT.

bfd/

	PR ld/18900
	* elf32-i386.c (elf_i386_link_hash_entry): Add
	func_pointer_refcount.
	(elf_i386_link_hash_newfunc): Clear func_pointer_refcount.
	(elf_i386_get_local_sym_hash): Likewise.
	(elf_i386_copy_indirect_symbol): Also copy
	func_pointer_refcount.
	(elf_i386_check_relocs): Increment func_pointer_refcount.
	(elf_i386_gc_sweep_hook): Decrement func_pointer_refcount.
	(elf_i386_allocate_dynrelocs): Don't create the PLT entry if
	there are only function pointer relocations which can be
	resolved at run-time.  Keep dynanamic relocations for run-time
	function pointer initialization.
	(elf_i386_relocate_section): Copy dynamic function pointer
	relocations.
	* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add
	func_pointer_refcount.
	(elf_x86_64_link_hash_newfunc): Clear func_pointer_refcount.
	(elf_x86_64_get_local_sym_hash): Likewise.
	(elf_x86_64_copy_indirect_symbol): Also copy
	func_pointer_refcount.
	(elf_x86_64_check_relocs): Increment func_pointer_refcount.
	(elf_x86_64_gc_sweep_hook): Decrement func_pointer_refcount.
	(elf_x86_64_allocate_dynrelocs): Don't create the PLT entry if
	there are only function pointer relocations which can be
	resolved at run-time.  Keep dynanamic relocations for run-time
	function pointer initialization.
	(elf_x86_64_relocate_section): Copy dynamic function pointer
	relocations.

ld/testsuite/

	PR ld/18900
	* ld-i386/i386.exp: Run tests for PR ld/18900.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr18900.out: New file.
	* ld-i386/pr18900a.c: Likewise.
	* ld-i386/pr18900a.c: Likewise.
	* ld-i386/pr18900a.rd: Likewise.
	* ld-i386/pr18900b.c: Likewise.
	* ld-i386/pr18900b.rd: Likewise.
	* ld-i386/pr18900c.c: Likewise.
	* ld-x86-64/pr18900.out: Likewise.
	* ld-x86-64/pr18900a.c: Likewise.
	* ld-x86-64/pr18900a.rd: Likewise.
	* ld-x86-64/pr18900b.c: Likewise.
	* ld-x86-64/pr18900b.rd: Likewise.
	* ld-x86-64/pr18900c.c: Likewise.
	* ld-x86-64/mpx3.dd: Updated.
2015-09-01 05:06:33 -07:00
Alan Modra
b07bca4ecd Wrong function reported for linker error message
OPD lookup goes awry when .opd has been shuffled to remove unused
functions.

	* elf64-ppc.c (ppc64_elf_maybe_function_sym): Adjust symbol value
	if .opd section has been edited.
2015-09-01 17:44:33 +09:30
Alan Modra
a4b6fadd50 ppc64 out-of-line register save/restore functions
Don't emit long branch or plt branch stubs to save/restore functions.
Copy them instead.  The problem is that plt branch stubs currently
trash r12, one of the parameters to some of the save/restore
functions, and there is no free register available to use instead of
r12.

6f20ed8a is prerequisite for this patch.

	PR 18878
	* elf64-ppc.c (ARRAY_SIZE): Define.  Use throughout.
	(enum ppc_stub_type): Add ppc_stub_save_res.
	(struct map_stub): Add "next" and "needs_save_res".
	(struct ppc_link_hash_entry): Add "save_res" flag.
	(struct ppc_link_hash_table): Add "group".
	(sfpr_define): Add stub_sec param.  Define symbol in stub_sec if
	stub_sec is non-null.  Set "save_res".
	(save_res_funcs): Make file scope, rename from funcs.  Adjust uses.
	(ppc64_elf_adjust_dynamic_symbol): Prohibit plt call to save_res syms.
	(ppc_build_one_stub): Handle ppc_stub_save_res.
	(ppc_size_one_stub): Set stub type to ppc_size_one_stub on finding
	stub for linker defined save_res sym.
	(group_sections): Init new fields of struct map_stub.
	(ppc64_elf_size_stubs): Reserve space for save/restore func copy.
	(ppc64_elf_build_stubs): Copy save/restore funcs to groups.  Emit
	alias syms too.
	(ppc64_elf_relocate_section): Set destination for ppc_stub_save_res.
2015-09-01 17:42:32 +09:30
Alan Modra
a7c4979727 Optimise PowerPC64 r2 adjusting stubs
Sometimes these stubs don't need to change the low 16-bits of r2, so in
that case omit a useless addi r2,r2,0 insn.  Also, change the get_r2off
error return from 0 to -1 since 0 is a valid return for ELFv2 -R objects.

	* elf64-ppc.c (get_r2off): Return -1 on error.
	(ppc_build_one_stub): Adjust for get_r2off change.  Don't emit
	addi r2,r2,0 on r2off stubs when the low 16-bit delta is zero.
	(ppc_size_one_stub): Corresponding size changes for r2off stubs.
	Add condition in test for -R objects.
2015-08-31 22:54:23 +09:30
Alan Modra
6f20ed8a6b ppc64 section group handling
Two organizational changes to the array of additional info kept for
sections.
1) Move group info into a per-group allocated struct, in preparation
for future changes that need per-group accounting.
2) Expand the array to include output sections, which simplifies
sizing and removes the need for a separate output section array.

	* section.c (section_id): Make file scope.
	(bfd_get_next_section_id): New function.
	* elf64-ppc.c (struct map_stub): Remove toc_off field.  Move decl.
	(struct ppc_stub_hash_entry): Delete stub_sec and id_sec.  Add
	group.  Update all uses.
	(struct ppc_link_hash_table): Delete top_id, top_index, and
	input_list.  Add sec_info_arr_size.  Rename stub_group to
	sec_info, and make group info indirect.  Update stub_group refs
	throughout file.
	(ppc_add_stub): Don't look for stub_sec on link_sec stub_group
	entry.
	(ppc_build_one_stub): Delete FIXME.
	(ppc64_elf_setup_section_lists): Size htab->sec_info for all
	sections, not just input sections.  Don't create htab->input_list.
	(ppc64_elf_next_input_section): Update to use sec_info union as
	list pointer.
	(PREV_SEC): Delete.
	(group_sections): Pass "info" param rather than "htab".  Iterate
	over output sections rather than input_list.  Use sec_info union
	as list pointers.  Alloc atruct map_stub, and return fail status.
	* bfd-in2.h: Regenerate.
2015-08-31 22:54:06 +09:30
Alan Modra
d3435ae8dd More "Make asection->id and asection->index unsigned"
Fixes regressions introduced by 7292b3ac.

	* elflink.c (elf_sort_symbol): Use correctly sized type for
	calculating signed section->id difference.
	(elf_link_add_object_symbols): Likewise.
	* pef.c (bfd_pef_scan_start_address): Warning fix.
	* vms-alpha.c (vms_new_section_hook): Likewise.
2015-08-31 16:26:10 +09:30
Alan Modra
6cae483a9d NDS32 build fixes
* elf32-nds32.c (nds32_convert_32_to_16_alu1): Warning fix.
	(find_relocs_at_address_addr): Make "reloc_type" an enum.
	(nds32_elf_relax_delete_blanks): Warning fix.
	(nds32_elf_relax_loadstore): Correct loop bound.
2015-08-31 13:01:59 +09:30
Alan Modra
7292b3ac74 Make asection->id and asection->index unsigned
These int vars are really unsigned, so make them so.

	* section.c (struct bfd_section): Make "id" and "index" unsigned.
	* coff-rs6000.c (_bfd_xcoff_sizeof_headers): Adjust local var to suit.
	* elf.c (elf_map_symbols): Likewise.
	* elf64-ppc.c (sym_exists_at): Make "id" param unsigned.
	(struct ppc_link_hash_table): Make "top_id" and "top_index" unsigned.
	(ppc64_elf_setup_section_lists): Ditto for local vars.
	* elf32-arm.c: Similarly to elf64-ppc.c.
	* elf32-avr.c: Likewise.
	* elf32-hppa.c: Likewise.
	* elf32-m68hc1x.c: Likewise.
	* elf32-metag.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elfnn-aarch64.c: Likewise.
	* simple.c (struct saved_offsets): Make "section_count" unsigned.
	* bfd-in2.h: Regenerate.
2015-08-31 12:37:36 +09:30
Alan Modra
a40d44c44e Add missing pr reference 2015-08-27 11:00:01 +09:30
Alan Modra
6fc5bb5718 Don't sort ld -r output relocs on alpha
LITERAL/LITUSE relocs must be kept together.

	* elf64-alpha.c (elf64_alpha_sort_relocs_p): New function.
	(elf_backend_sort_relocs_p): Define.
2015-08-27 10:56:51 +09:30
Alan Modra
0e28778672 Use stable sort for ld -r relocs
A number of targets emit multiple relocs at a given r_offset, and
depend on those relocs staying in their original order.

	PR 18867
	* elflink.c (cmp_ext32l_r_offset, cmp_ext32b_r_offset): Delete.
	(cmp_ext64l_r_offset, cmp_ext64b_r_offset): Delete.
	(ext32l_r_offset, ext32b_r_offset, ext64l_r_offset, ext64b_r_offset):
	New functions.
	(elf_link_adjust_relocs): Use an insertion sort to sort relocs.
2015-08-26 23:34:10 +09:30
Matthew Fortune
c97c330ba8 Select MIPS ABi based upon abiflags rather than e_flags.
bfd	PR ld/18401
	* elfxx-mips.c (bfd_mips_isa_ext_mach): New function: Converts an
	ISA value to a bfd machine number.
	(bfd_mips_isa_ext): Update the ISA level and revision if
	necessary.  Use mips_mach_extends_p to decide if the ISA extension
	needs to be set.
	(_bfd_mips_elf_merge_private_bfd_data): Allow the ISA extension to
	be inferred from the ABI setting.  Set the ISA level from the
	maximum of the incoming and outgoing ISA levels.

tests
	* ld-mips-elf/mips-elf-flags.exp: Add more ISA conflict tests.
2015-08-26 14:42:56 +01:00
Nick Clifton
16ad13eca4 Replace assertions with warning messages about ELF binaries containing multiple symbol tables.
PR binutils/18854
	* elf.c (bfd_section_from_shdr): Replace assertions with warnings
	about multiple symbol tables.
2015-08-25 17:48:20 +01:00
Renlin Li
7c2bea1ad1 [AArch64] Fix a typo in the comment for BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
2015-08-25  Renlin Li  <renlin.li@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_LD64_GOTOFF_LO15): Use LP64 instead of
  ILP64.
  * bfd-in2.h: Regenerate.
2015-08-25 12:37:21 +01:00
Alan Modra
595bce7595 Uninitialized vd_nodename
Belt and braces fix.  Either of the changes here is sufficient to
ensure vd_nodename is initialized properly.

	* elf.c (_bfd_elf_slurp_version_tables): Always init vd_nodename.
	Don't copy fields not set by _bfd_elf_swap_verdef_in.
2015-08-22 16:24:52 +09:30
Jiong Wang
07c9aa07cd [AArch64][6/6] LD support TLSLD load/store relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation
  types, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  (elfNN_aarch64_final_link_relocate): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-531.s: New testcase.
  * ld-aarch64/emit-relocs-531-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-532.s: Likewise.
  * ld-aarch64/emit-relocs-533.s: Likewise.
  * ld-aarch64/emit-relocs-533-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-534.s: Likewise.
  * ld-aarch64/emit-relocs-535.s: Likewise.
  * ld-aarch64/emit-relocs-535-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-536.s: Likewise.
  * ld-aarch64/emit-relocs-537.s: Likewise.
  * ld-aarch64/emit-relocs-537-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-538.s: Likewise.
  * ld-aarch64/emit-relocs-531.d: New expectation file.
  * ld-aarch64/emit-relocs-531-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-532.d: Likewise.
  * ld-aarch64/emit-relocs-533.d: Likewise.
  * ld-aarch64/emit-relocs-533-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-534.d: Likewise.
  * ld-aarch64/emit-relocs-535.d: Likewise.
  * ld-aarch64/emit-relocs-535-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-536.d: Likewise.
  * ld-aarch64/emit-relocs-537.d: Likewise.
  * ld-aarch64/emit-relocs-537-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-538.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 16:57:38 +01:00
Jiong Wang
4c5625238c [AArch64][5/6] GAS support TLSLD load/store relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c: New entries, including
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC.
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation types support for
  dtprel_lo12.
  (ldst_lo12_determine_real_reloc_type): Support
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  (parse_operands): Likewise.
  (md_apply_fix): Likewise
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-ldst8.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldstc.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst8.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
2015-08-19 16:54:39 +01:00
Jiong Wang
6ffe9a1ba3 [AArch64][4/6] LD support TLSLD move/add relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  PR ld/18276
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation
  types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2.
  (elfNN_aarch64_final_link_relocate): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-87.s: New testcase.
  * ld-aarch64/emit-relocs-88.s: Likewise.
  * ld-aarch64/emit-relocs-88-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-89.s: Likewise.
  * ld-aarch64/emit-relocs-90.s: Likewise.
  * ld-aarch64/emit-relocs-90-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-523.s: Likewise.
  * ld-aarch64/emit-relocs-524.s: Likewise.
  * ld-aarch64/emit-relocs-525.s: Likewise.
  * ld-aarch64/emit-relocs-527.s: Likewise.
  * ld-aarch64/emit-relocs-526.s: Likewise.
  * ld-aarch64/emit-relocs-528.s: Likewise.
  * ld-aarch64/emit-relocs-528-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-87.d: New expectation file.
  * ld-aarch64/emit-relocs-88.d: Likewise.
  * ld-aarch64/emit-relocs-88-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-89.d: Likewise.
  * ld-aarch64/emit-relocs-90.d: Likewise.
  * ld-aarch64/emit-relocs-90-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-91.d: Likewise.
  * ld-aarch64/emit-relocs-523.d: Likewise.
  * ld-aarch64/emit-relocs-524.d: Likewise.
  * ld-aarch64/emit-relocs-525.d: Likewise.
  * ld-aarch64/emit-relocs-526.d: Likewise.
  * ld-aarch64/emit-relocs-527.d: Likewise.
  * ld-aarch64/emit-relocs-528.d: Likewise.
  * ld-aarch64/emit-relocs-528-overflow.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 16:40:18 +01:00
Jiong Wang
49df5539f9 [AArch64][3/6] GAS support TLSLD move/add relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers,
  "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
  "dtprel_g1_nc", "dtprel_g2".
  (md_apply_fix): Support new relocation types.
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_g0.s: New testcase.
  * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g2.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0.d: New expectation file.
  * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g2.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
2015-08-19 16:36:22 +01:00
Jiong Wang
753999c1ec [AArch64][2/6] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_reloc_got_type): Likewise.
  (elfNN_aarch64_final_link_relocate): Likewise.
  (elfNN_aarch64_relocate_section): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-530.s: New testcase.
  * ld-aarch64/emit-relocs-92.s: Likewise.
  * ld-aarch64/emit-relocs-530.d: New expectation file.
  * ld-aarch64/emit-relocs-92.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 16:30:47 +01:00
Jiong Wang
13289c10e2 [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
2015-08-19 16:28:08 +01:00
Alan Modra
3cbc1e5e68 Add bfd_link_pde, and simplify some tests of link_info.type
include/
	* bfdlink.h (bfd_link_pde): Define.
bfd/
	* elf-s390-common.c: Simplify expressions using
	bfd_linke_executable, bfd_link_pie and bfd_link_pic.
	* elf32-arm.c: Likewise.
	* elf32-bfin.c: Likewise.
	* elf32-frv.c: Likewise.
	* elf32-m68k.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf32-s390.c: Likewise.
	* elf32-sh.c: Likewise.
	* elf64-alpha.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elf64-s390.c: Likewise.
	* elflink.c: Likewise.
2015-08-19 12:51:06 +09:30
H.J. Lu
cae1fbbb7e Return reloc_class_ifunc for reloc against IFUNC
elf_XXX_reloc_type_class should return reloc_class_ifunc for relocation
against STT_GNU_IFUNC symbol.

bfd/

	PR ld/18841
	* elf-bfd.h (elf_link_hash_table): Add dynsym.
	* elf32-i386.c (elf_i386_reloc_type_class): Return
	reloc_class_ifunc for relocation against STT_GNU_IFUNC symbol.
	* elf64-x86-64.c (elf_x86_64_reloc_type_class): Likewise.
	* elflink.c (_bfd_elf_link_create_dynamic_sections): Set dynsym.
	(bfd_elf_size_dynsym_hash_dynstr): Use dynsym.
	(elf_final_link_info): Remove dynsym_sec.
	(elf_link_output_extsym): Replace dynsym_sec with dynsym.
	(bfd_elf_final_link): Remove reference to dynsym_sec.  Replace
	dynsym_sec with dynsym.

ld/testsuite/

	PR ld/18841
	* ld-ifunc/ifunc.exp: Add a test for PR ld/18841.
	* ld-ifunc/pr18841.out: New file.
	* ld-ifunc/pr18841a.c: Likewise.
	* ld-ifunc/pr18841b.c: Likewise.
2015-08-18 09:50:08 -07:00
Jiong Wang
44b4145b72 [AArch64] Cleanup TLS relocation types which don't go through GOT table
This patch done two types of cleanup:

  * in aarch64_reloc_got_type and elfNN_aarch64_relocate_section

    We don't need those redundant "case" check, as they can be merged
    with the "default" which just "break".

  * in elfNN_aarch64_gc_sweep_hook and elfNN_aarch64_check_relocs

    All TLS local executable relocations and some local dynamic
    relocations (those calculate module offset) actually don't need GOT
    entry, so remove them from GOT entry counting.

2015-08-18  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (aarch64_reloc_got_type): Delete useless check.
  (elfNN_aarch64_relocate_section): Likewise.
  (elfNN_aarch64_gc_sweep_hook): Likewise.
  (elfNN_aarch64_check_relocs): Likewise.
2015-08-18 16:50:56 +01:00
H.J. Lu
0e1862bb40 Add output_type to bfd_link_info
The "shared" field in bfd_link_info is set for both DSO and and PIE.
There are separate fields for executable and relocatable outputs.  This
patch adds an "output_type" field:

enum output_type
{
  type_unknown = 0,
  type_executable,
  type_dll,
  type_relocatable
};

and a "pic" field to bfd_link_info to replace shared, executable and
relocatable fields so that we can use the "output_type" field to check
for output type and the "pic" field check if output is PIC.  Macros,
bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic
and bfd_link_pie, are provided to check for output features.

bfd/

	* bfd/aoutx.h: Replace shared, executable, relocatable and pie
	fields with bfd_link_executable, bfd_link_dll,
	bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
	* bfd/bout.c: Likewise.
	* bfd/coff-alpha.c: Likewise.
	* bfd/coff-arm.c: Likewise.
	* bfd/coff-i386.c: Likewise.
	* bfd/coff-i960.c: Likewise.
	* bfd/coff-m68k.c: Likewise.
	* bfd/coff-mcore.c: Likewise.
	* bfd/coff-mips.c: Likewise.
	* bfd/coff-ppc.c: Likewise.
	* bfd/coff-rs6000.c: Likewise.
	* bfd/coff-sh.c: Likewise.
	* bfd/coff-tic80.c: Likewise.
	* bfd/coff-x86_64.c: Likewise.
	* bfd/coff64-rs6000.c: Likewise.
	* bfd/coffgen.c: Likewise.
	* bfd/cofflink.c: Likewise.
	* bfd/ecoff.c: Likewise.
	* bfd/ecofflink.c: Likewise.
	* bfd/elf-bfd.h: Likewise.
	* bfd/elf-eh-frame.c: Likewise.
	* bfd/elf-ifunc.c: Likewise.
	* bfd/elf-m10200.c: Likewise.
	* bfd/elf-m10300.c: Likewise.
	* bfd/elf-s390-common.c: Likewise.
	* bfd/elf-vxworks.c: Likewise.
	* bfd/elf.c: Likewise.
	* bfd/elf32-arm.c: Likewise.
	* bfd/elf32-avr.c: Likewise.
	* bfd/elf32-bfin.c: Likewise.
	* bfd/elf32-cr16.c: Likewise.
	* bfd/elf32-cr16c.c: Likewise.
	* bfd/elf32-cris.c: Likewise.
	* bfd/elf32-crx.c: Likewise.
	* bfd/elf32-d10v.c: Likewise.
	* bfd/elf32-dlx.c: Likewise.
	* bfd/elf32-epiphany.c: Likewise.
	* bfd/elf32-fr30.c: Likewise.
	* bfd/elf32-frv.c: Likewise.
	* bfd/elf32-ft32.c: Likewise.
	* bfd/elf32-h8300.c: Likewise.
	* bfd/elf32-hppa.c: Likewise.
	* bfd/elf32-i370.c: Likewise.
	* bfd/elf32-i386.c: Likewise.
	* bfd/elf32-i860.c: Likewise.
	* bfd/elf32-ip2k.c: Likewise.
	* bfd/elf32-iq2000.c: Likewise.
	* bfd/elf32-lm32.c: Likewise.
	* bfd/elf32-m32c.c: Likewise.
	* bfd/elf32-m32r.c: Likewise.
	* bfd/elf32-m68hc11.c: Likewise.
	* bfd/elf32-m68hc1x.c: Likewise.
	* bfd/elf32-m68k.c: Likewise.
	* bfd/elf32-mcore.c: Likewise.
	* bfd/elf32-mep.c: Likewise.
	* bfd/elf32-metag.c: Likewise.
	* bfd/elf32-microblaze.c: Likewise.
	* bfd/elf32-moxie.c: Likewise.
	* bfd/elf32-msp430.c: Likewise.
	* bfd/elf32-mt.c: Likewise.
	* bfd/elf32-nds32.c: Likewise.
	* bfd/elf32-nios2.c: Likewise.
	* bfd/elf32-or1k.c: Likewise.
	* bfd/elf32-ppc.c: Likewise.
	* bfd/elf32-rl78.c: Likewise.
	* bfd/elf32-rx.c: Likewise.
	* bfd/elf32-s390.c: Likewise.
	* bfd/elf32-score.c: Likewise.
	* bfd/elf32-score7.c: Likewise.
	* bfd/elf32-sh-symbian.c: Likewise.
	* bfd/elf32-sh.c: Likewise.
	* bfd/elf32-sh64.c: Likewise.
	* bfd/elf32-spu.c: Likewise.
	* bfd/elf32-tic6x.c: Likewise.
	* bfd/elf32-tilepro.c: Likewise.
	* bfd/elf32-v850.c: Likewise.
	* bfd/elf32-vax.c: Likewise.
	* bfd/elf32-visium.c: Likewise.
	* bfd/elf32-xc16x.c: Likewise.
	* bfd/elf32-xstormy16.c: Likewise.
	* bfd/elf32-xtensa.c: Likewise.
	* bfd/elf64-alpha.c: Likewise.
	* bfd/elf64-hppa.c: Likewise.
	* bfd/elf64-ia64-vms.c: Likewise.
	* bfd/elf64-mmix.c: Likewise.
	* bfd/elf64-ppc.c: Likewise.
	* bfd/elf64-s390.c: Likewise.
	* bfd/elf64-sh64.c: Likewise.
	* bfd/elf64-x86-64.c: Likewise.
	* bfd/elflink.c: Likewise.
	* bfd/elfnn-aarch64.c: Likewise.
	* bfd/elfnn-ia64.c: Likewise.
	* bfd/elfxx-mips.c: Likewise.
	* bfd/elfxx-sparc.c: Likewise.
	* bfd/elfxx-tilegx.c: Likewise.
	* bfd/i386linux.c: Likewise.
	* bfd/linker.c: Likewise.
	* bfd/m68klinux.c: Likewise.
	* bfd/pdp11.c: Likewise.
	* bfd/pe-mips.c: Likewise.
	* bfd/peXXigen.c: Likewise.
	* bfd/reloc.c: Likewise.
	* bfd/reloc16.c: Likewise.
	* bfd/sparclinux.c: Likewise.
	* bfd/sunos.c: Likewise.
	* bfd/vms-alpha.c: Likewise.
	* bfd/xcofflink.c: Likewise.

include/

	* include/bfdlink.h (output_type): New enum.
	(bfd_link_executable): New macro.
	(bfd_link_dll): Likewise.
	(bfd_link_relocatable): Likewise.
	(bfd_link_pic): Likewise.
	(bfd_link_pie): Likewise.
	(bfd_link_info): Remove shared, executable, pie and relocatable.
	Add output_type and pic.

ld/

	* ld/ldctor.c: Replace shared, executable, relocatable and pie
	fields with bfd_link_executable, bfd_link_dll,
	bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
	* ld/ldemul.c: Likewise.
	* ld/ldfile.c: Likewise.
	* ld/ldlang.c: Likewise.
	* ld/ldmain.c: Likewise.
	* ld/ldwrite.c: Likewise.
	* ld/lexsup.c: Likewise.
	* ld/pe-dll.c: Likewise.
	* ld/plugin.c: Likewise.
	* ld/emultempl/aarch64elf.em: Likewise.
	* ld/emultempl/aix.em: Likewise.
	* ld/emultempl/alphaelf.em: Likewise.
	* ld/emultempl/armcoff.em: Likewise.
	* ld/emultempl/armelf.em: Likewise.
	* ld/emultempl/avrelf.em: Likewise.
	* ld/emultempl/beos.em: Likewise.
	* ld/emultempl/cr16elf.em: Likewise.
	* ld/emultempl/elf-generic.em: Likewise.
	* ld/emultempl/elf32.em: Likewise.
	* ld/emultempl/genelf.em: Likewise.
	* ld/emultempl/generic.em: Likewise.
	* ld/emultempl/gld960.em: Likewise.
	* ld/emultempl/gld960c.em: Likewise.
	* ld/emultempl/hppaelf.em: Likewise.
	* ld/emultempl/irix.em: Likewise.
	* ld/emultempl/linux.em: Likewise.
	* ld/emultempl/lnk960.em: Likewise.
	* ld/emultempl/m68hc1xelf.em: Likewise.
	* ld/emultempl/m68kcoff.em: Likewise.
	* ld/emultempl/m68kelf.em: Likewise.
	* ld/emultempl/metagelf.em: Likewise.
	* ld/emultempl/mipself.em: Likewise.
	* ld/emultempl/mmo.em: Likewise.
	* ld/emultempl/msp430.em: Likewise.
	* ld/emultempl/nds32elf.em: Likewise.
	* ld/emultempl/needrelax.em: Likewise.
	* ld/emultempl/nios2elf.em: Likewise.
	* ld/emultempl/pe.em: Likewise.
	* ld/emultempl/pep.em: Likewise.
	* ld/emultempl/ppc32elf.em: Likewise.
	* ld/emultempl/ppc64elf.em: Likewise.
	* ld/emultempl/sh64elf.em: Likewise.
	* ld/emultempl/solaris2.em: Likewise.
	* ld/emultempl/spuelf.em: Likewise.
	* ld/emultempl/sunos.em: Likewise.
	* ld/emultempl/tic6xdsbt.em: Likewise.
	* ld/emultempl/ticoff.em: Likewise.
	* ld/emultempl/v850elf.em: Likewise.
	* ld/emultempl/vms.em: Likewise.
	* ld/emultempl/vxworks.em: Likewise.
2015-08-18 05:51:19 -07:00
Alan Modra
fe875424a0 Use $SED in bfd Makefile
PR 18667
	* Makefile.am: Use $(SED) in place of sed throughout.
	* Makefile.in: Regenerate.
2015-08-18 16:44:48 +09:30
Alan Modra
43417696fe PPC64: Allow .TOC. in linker script to override backend calculated value
bfd/
	* elf64-ppc.c (ppc64_elf_func_desc_adjust): Don't redefine .TOC.
	if already defined, and set linker_def.
	(ppc64_elf_set_toc): Use .TOC. value if defined other than by
	the backend.
ld/
	* ldexp.c (exp_fold_tree_1): Clear linker_def on symbol assignment.
2015-08-18 16:43:18 +09:30
Alan Modra
9b57267f4f Revert "Fix encoding or OpenRisk1000 PC relative relocations."
This reverts commit dbac553d28.

	PR ld/18759
	* elf32-or1k.c: Revert 2015-08-11 change.
2015-08-14 11:02:59 +09:30
H.J. Lu
8efa2874ab Issue an error for read-only segment with dynamic IFUNC relocations
To load an ELF binary with DT_TEXTREL tag, the dynamic linker calls
__mprotect on the read-only segment with PROT_READ|PROT_WRITE before
applying dynamic relocation.  It leads to segfault when performing
IFUNC relocations since the read-only segment has no execute permission.
This patch changes x86 linker to issue an error for read-only segment
with dynamic IFUNC relocations.  Other backends with IFUNC support
may need a similar change.

bfd/

	PR ld/18801
	* elf32-i386.c (elf_i386_size_dynamic_sections): Issue an error
	for read-only segment with dynamic IFUNC relocations.
	* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Likewise.

ld/testsuite/

	PR ld/18801
	* ld-i386/i386.exp: Run pr18801.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr18801.d: New file.
	* ld-i386/pr18801.s: Likewise.
	* ld-x86-64/pr18801.d: Likewise.
	* ld-x86-64/pr18801.s: Likewise.
2015-08-13 04:31:38 -07:00
Simon Dardis
40fc1451c6 [MIPS] Map 'move' to 'or'.
The MIPS assembly idiom 'move' now maps to the 'or' machine instruction. This
change affects microMIPS, MIPS32, MIPS64.

2015-08-12  Simon Dardis  <simon.dardis@imgtec.com>

opcodes/

	* micromips-opc.c (micromips_opcodes): Re-order table so that move
	based on 'or' is first.
	* mips-opc.c (mips_builtin_opcodes): Ditto.

bfd/

	* elfxx-mips.c (STUB_MOVE): Change to use 'or' only.
	(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry,
	mips_n64_exec_plt0_entry, micromips_insn32_o32_exec_plt0_entry):
	Update to use 'or' instead of 'addu/daddu'.
	(_bfd_mips_elf_finish_dynamic_symbol): Update usage of STUB_MOVE.
	(move_insns_32): Reorder table.

gas/

	* config/tc-mips.c (move_register): Change to use 'or' only.
	(s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Update to
	use or for move.

gas/testsuite/

	* gas/mips/elf-rel23.d: Update test.
	* gas/mips/elf-rel23.d: Ditto.
	* gas/mips/elf-rel23a.d: Ditto.
	* gas/mips/elf-rel23b.d: Ditto.
	* gas/mips/elf_e_flags1.d: Ditto.
	* gas/mips/elf_e_flags2.d: Ditto.
	* gas/mips/elf_e_flags3.d: Ditto.
	* gas/mips/elf_e_flags4.d: Ditto.
	* gas/mips/loc-swap-dis.d: Ditto.
	* gas/mips/micromips-insn32.d: Ditto.
	* gas/mips/micromips-noinsn32.d: Ditto.
	* gas/mips/micromips-trap.d: Ditto.
	* gas/mips/micromips.d: Ditto.
	* gas/mips/mips-abi32-pic.d: Ditto.
	* gas/mips/mips-abi32.d: Ditto.
	* gas/mips/mips-gp32-fp32-pic.d: Ditto.
	* gas/mips/mips-gp32-fp32.d: Ditto.
	* gas/mips/mips-gp32-fp64-pic.d: Ditto.
	* gas/mips/mips-gp32-fp64.d: Ditto.
	* gas/mips/mips-gp64-fp32-pic.d: Ditto.
	* gas/mips/mips-gp64-fp32.d: Ditto.
	* gas/mips/mips-gp64-fp64-pic.d: Ditto.
	* gas/mips/mips-gp64-fp64.d: Ditto.
	* gas/mips/mipsr6@loc-swap-dis.d: Ditto.
	* gas/mips/tls-o32.d: Ditto.
	* gas/mips/uld2-eb.d: Ditto.
	* gas/mips/uld2-el.d: Ditto.
	* gas/mips/ulw2-eb-ilocks.d: Ditto.
	* gas/mips/ulw2-eb.d: Ditto.
	* gas/mips/ulw2-el-ilocks.d: Ditto.
	* gas/mips/ulw2-el.d: Ditto.
	* gas/mips/move.d: New test.
	* gas/mips/move.s: Ditto.
	* gas/mips/micromips32-move.d: Ditto.
	* gas/mips/micromips32-move.s: Ditto.
	* gas/mips/mips.exp: Run the new tests.

gold/

	* mips.cc (plt0_entry_o32, plt0_entry_n32, plt0_entry_n64,
	lazy_stub_normal_1, lazy_stub_normal_1_n64,
	lazy_stub_normal_2, lazy_stub_normal_2_n64, lazy_stub_big,
	lazy_stub_big_n64, lazy_stub_micromips32_normal_1_n64,
	lazy_stub_micromips32_normal_2_n64, lazy_stub_micromips32_big,
	lazy_stub_micromips32_big_n64): Update to use 'or' for move instead
	of 'addu/daddu'.

ld/testsuite/

	* ld-mips-elf/compressed-plt-1-n32-mips16.od: Update test.
	* ld-mips-elf/compressed-plt-1-n32-umips.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-got.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-only.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-word.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-se.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips-got.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips-word.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips.od: Ditto.
	* ld-mips-elf/jalx-2.dd: Ditto.
	* ld-mips-elf/mips16-pic-3.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-3a.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-3b.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-5b.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-6-n32.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-6-o32.dd: Ditto.
	* ld-mips-elf/stub-dynsym-1-10000.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-2fe80.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-7fff.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-8000.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-fff0.d: Ditto.
	* ld-mips-elf/tlsbin-o32.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-1.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-2.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-3.d: Ditto.
	* ld-mips-elf/tlsdyn-o32.d: Ditto.
	* ld-mips-elf/tlslib-o32.d: Ditto.
2015-08-12 17:10:22 +01:00
H.J. Lu
0eace2105d Properly skip IFUNC relocations in debug sections
Use "continue" instead of "break" to skip IFUNC relocations in debug
sections.

	* elf32-i386.c (elf_i386_relocate_section): Properly skip IFUNC
	relocations in debug sections.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
2015-08-11 19:04:38 -07:00
Jiong Wang
c674f5cd3f [AArch64] Improve BFD overflow warning message for -fpic
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Improve warning
  message for R_AARCH64_LD64_GOTPAGE_LO15/R_AARCH64_LD32_GOTPAGE_LO14.
2015-08-11 22:12:41 +01:00
Jiong Wang
9331eea1f8 [AArch64]Speed up linking speed by skipping unncessary TLS reloc type check
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
   * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): New.
  (aarch64_can_relax_tls): Use the new IS_AARCH64_TLS_RELAX_RELOC.
2015-08-11 22:05:39 +01:00
Jiong Wang
f678ded748 [AArch64] Long branch veneer support far symbol defined by --defsym
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * bfd/elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec".
  Loose the check for symbol from ABS section.
  (elfNN_aarch64_size_stubs): Pass sym_sec.

ld/testsuite/
  * ld-aarch64/farcall-b-defsym.s: New test.
  * ld-aarch64/farcall-bl-defsym.s: Likewise.
  * ld-aarch64/farcall-b-defsym.d: New expectation.
  * ld-aarch64/farcall-bl-defsym.d: Likewise.
2015-08-11 21:55:52 +01:00
Jiong Wang
07f9ddfeba [AArch64] PR18668, repair long branch veneer for plt stub
2015-08-11  Jiong Wang  <jiong.wang@arm.com>
bfd/
   PR ld/18668
   * elfnn-aarch64.c (aarch64_type_of_stub): Update destination for
   calls go through plt stub.
   (elfNN_aarch64_final_link_relocate): Adjust code logic for CALL26,
   JUMP26 relocation to support inserting veneer for call to plt stub.

ld/testsuite/
   * ld-aarch64/farcall-b-gsym.s: New test.
   * ld-aarch64/farcall-b-plt.s: Likewise.
   * ld-aarch64/farcall-bl-plt.s: Likewise.
   * ld-aarch64/farcall-b-gsym.d: New expect file.
   * ld-aarch64/farcall-b-plt.d: Likewise.
   * ld-aarch64/farcall-bl-plt.d: Likewise.
2015-08-11 21:44:31 +01:00
Jiong Wang
40fbed8481 [AArch64][8/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_reloc_got_type): Likewise.
  (elfNN_aarch64_final_link_relocate): Likewise.
  (elfNN_aarch64_relocate_section): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-529.s: New testcase.
  * ld-aarch64/emit-relocs-529-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-86.s: Likewise.
  * ld-aarch64/emit-relocs-86-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-529.d: New expectation file.
  * ld-aarch64/emit-relocs-529-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-86.d: Likewise.
  * ld-aarch64/emit-relocs-86-overflow.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-11 21:26:41 +01:00
Jiong Wang
70151fb54a [AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define.

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers
  "dtprel_lo12".
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11 21:26:31 +01:00
Jiong Wang
73f925cc20 [AArch64][6/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
  BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
  (aarch64_reloc_got_type): Likewise.
  (elfNN_aarch64_final_link_relocate): Likewise.
  (elfNN_aarch64_relocate_section): Likewise.
  (elfNN_aarch64_gc_sweep_hook): Likewise.
  (elfNN_aarch64_check_relocs): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/tls-small-ld.s: Update testcase.
2015-08-11 21:26:13 +01:00
Jiong Wang
a12fad50d2 [AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d: Likewise.
2015-08-11 21:25:51 +01:00