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Add changes from customer since last work.

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This commit is contained in:
Michael Tiemann 1994-11-26 00:17:52 +00:00
parent 52e895cbb4
commit fb870b50a7
13 changed files with 349 additions and 128 deletions
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2
bfd/.Sanitize
View file

@ -263,7 +263,7 @@ else
done
fi
rce_files="ChangeLog archures.c bfd-in2.h config.bfd configure.in targets.c"
rce_files="ChangeLog archures.c bfd-in2.h config.bfd configure.in targets.c aoutx.h libaout.h"
if ( echo $* | grep keep\-rce > /dev/null ) ; then
for i in $rce_files ; do
if test ! -d $i && (grep sanitize-rce $i > /dev/null) ; then

3
bfd/archures.c
View file

@ -111,6 +111,9 @@ DESCRIPTION
. bfd_arch_alpha, {* Dec Alpha *}
. bfd_arch_arm, {* Advanced Risc Machines ARM *}
. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
. start-sanitize-rce
. bfd_arch_rce, {* Motorola RCE *}
. end-sanitize-rce
. bfd_arch_last
. };

2
bfd/configure.in
View file

@ -203,7 +203,7 @@ do
rs6000coff_vec) tb="$tb coff-rs6000.o" ;;
shcoff_vec) tb="$tb coff-sh.o cofflink.o" ;;
# start-sanitize-rce
rce_aout_vec) tb="$tb aout32.o reloc16.o" ;;
rce_aout_vec) tb="$tb aout-rce.o aout32.o stab-syms.o" ;;
# end-sanitize-rce
shlcoff_vec) tb="$tb coff-sh.o cofflink.o" ;;
som_vec) tb="$tb som.o" ;;

11
bfd/cpu-rce.c
View file

@ -1,4 +1,4 @@
/* BFD library support routines for the Experiment SOP architecture.
/* BFD library support routines for the Experiment RCE architecture.
Copyright (C) 1993 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@ -29,8 +29,8 @@ DEFUN(scan_mach,(info, string),
CONST struct bfd_arch_info *info AND
CONST char *string)
{
if (strcmp(string,"sop") == 0) return true;
if (strcmp(string,"SOP") == 0) return true;
if (strcmp(string,"rce") == 0) return true;
if (strcmp(string,"RCE") == 0) return true;
return false;
}
@ -58,8 +58,8 @@ static bfd_arch_info_type arch_info_struct[] =
8, /* 8 bits in a byte */
bfd_arch_rce,
0, /* only 1 machine */
"SOP", /* arch_name */
"SOP", /* printable name */
"RCE", /* arch_name */
"RCE", /* printable name */
1,
true, /* the default machine */
bfd_default_compatible,
@ -76,4 +76,3 @@ DEFUN_VOID(bfd_rce_arch)
{
bfd_arch_linkin(&arch_info_struct[0]);
}

23
bfd/libaout.h
View file

@ -203,15 +203,26 @@ enum machine_type {
M_68020 = 2,
M_SPARC = 3,
/* skip a bunch so we don't run into any of suns numbers */
/* make these up for the ns32k*/
M_NS32032 = (64), /* ns32032 running ? */
M_NS32532 = (64 + 5), /* ns32532 running mach */
M_386 = 100,
M_29K = 101, /* AMD 29000 */
M_386_DYNIX = 102, /* Sequent running dynix */
M_386_NETBSD = 134, /* NetBSD/386 binary */
M_ARM = 103, /* Advanced Risc Machines ARM */
M_386_NETBSD = 134, /* NetBSD/i386 binary */
M_68K_NETBSD = 135, /* NetBSD/m68k binary */
M_532_NETBSD = 137, /* NetBSD/ns32k binary */
M_SPARC_NETBSD = 138, /* NetBSD/sparc binary */
M_MIPS1 = 151, /* MIPS R2000/R3000 binary */
M_MIPS2 = 152, /* MIPS R4000/R6000 binary */
M_HP200 = 200, /* HP 200 (68010) BSD binary */
M_HP300 = (300 % 256), /* HP 300 (68020+68881) BSD binary */
M_HPUX = (0x20c % 256)/* HP 200/300 HPUX binary */
/* start-sanitize-rce */
M_RCE = 155, /* Motorola RCE binary */
/* end-sanitize-rce */
};
#define N_DYNAMIC(exec) ((exec).a_info & 0x80000000)
@ -295,6 +306,10 @@ struct aoutdata {
/* Segment size - needed for alignment of demand paged files. */
unsigned long segment_size;
/* Zmagic disk block size - need to align the start of the text
section in ZMAGIC binaries. Normally the same as page_size. */
unsigned long zmagic_disk_block_size;
unsigned exec_bytes_size;
unsigned vma_adjusted : 1;
@ -374,10 +389,10 @@ NAME(aout,squirt_out_relocs) PARAMS ((bfd *abfd, asection *section));
boolean
NAME(aout,make_sections) PARAMS ((bfd *));
bfd_target *
const bfd_target *
NAME(aout,some_aout_object_p) PARAMS ((bfd *abfd,
struct internal_exec *execp,
bfd_target * (*callback)(bfd *)));
struct internal_exec *execp,
const bfd_target *(*callback)(bfd *)));
boolean
NAME(aout,mkobject) PARAMS ((bfd *abfd));

2
gas/.Sanitize
View file

@ -125,7 +125,7 @@ else
done
fi
rce_files="configure.in"
rce_files="configure.in as.c"
if ( echo $* | grep keep\-rce > /dev/null ) ; then
for i in $rce_files ; do

41
gas/as.c
View file

@ -144,12 +144,10 @@ parse_args (pargc, pargv)
char *shortopts;
extern CONST char *md_shortopts;
/* -v takes an argument on VMS, so we don't make it a generic option
in that case. */
#ifdef OBJ_VMS
#ifdef VMS
/* -v takes an argument on VMS, so we don't make it a generic option. */
CONST char *std_shortopts = "-JKLRWZfa::DI:o:wX";
#else
/* Normal set of short options. */
CONST char *std_shortopts = "-JKLRWZfa::DI:o:vwX";
#endif
@ -167,6 +165,8 @@ parse_args (pargc, pargv)
{"version", no_argument, NULL, OPTION_VERSION},
#define OPTION_DUMPCONFIG (OPTION_STD_BASE + 4)
{"dump-config", no_argument, NULL, OPTION_DUMPCONFIG},
#define OPTION_VERBOSE (OPTION_STD_BASE + 5)
{"verbose", no_argument, NULL, OPTION_VERBOSE},
};
/* Construct the option lists from the standard list and the
@ -203,9 +203,28 @@ parse_args (pargc, pargv)
default:
/* md_parse_option should return 1 if it recognizes optc,
0 if not. */
if (md_parse_option (optc, optarg) == 0)
exit (EXIT_FAILURE);
break;
if (md_parse_option (optc, optarg) != 0)
break;
/* `-v' isn't included in the general short_opts list, so check for
it explicity here before deciding we've gotten a bad argument. */
if (optc == 'v')
{
#ifdef VMS
/* Telling getopt to treat -v's value as optional can result
in it picking up a following filename argument here. The
VMS code in md_parse_option can return 0 in that case,
but it has no way of pushing the filename argument back. */
if (optarg && *optarg)
new_argv[new_argc++] = optarg, new_argv[new_argc] = NULL;
else
#else
case 'v':
#endif
case OPTION_VERBOSE:
print_version_id ();
break;
}
/*FALLTHRU*/
case '?':
exit (EXIT_FAILURE);
@ -244,9 +263,6 @@ parse_args (pargc, pargv)
#endif
exit (EXIT_SUCCESS);
case 'v':
print_version_id ();
case 'J':
flag_signed_overflow_ok = 1;
break;
@ -398,6 +414,11 @@ main (argc, argv)
#ifdef TC_I960
brtab_emit ();
#endif
/* start-sanitize-rce */
#ifdef TC_RCE
dump_literals(0);
#endif
/* end-sanitize-rce */
if (seen_at_least_1_file ()
&& !((had_warnings () && flag_always_generate_output)

2
gas/config/.Sanitize
View file

@ -15,7 +15,7 @@
Do-first:
r16_files="tc-r16.c tc-r16.h"
r16_files="tc-r16.c tc-r16.h rce.mt"
if ( echo $* | grep keep\-r16 > /dev/null ) ; then
keep_these_too="${r16_files} ${keep_these_too}"

1
gas/config/rce.mt Normal file
View file

@ -0,0 +1 @@
TARG_CPU_DEPENDENTS=$(srcdir)/../opcodes/rce-opc.h

260
gas/config/tc-rce.c
View file

@ -30,6 +30,7 @@
#define DEFINE_TABLE
#include "../opcodes/rce-opc.h"
#include <ctype.h>
#include <string.h>
#if 1 /**** TEMP ****/
#define R_PCRELIMM8BY4 23 /* 8 bit pc relative to long boundary shifted 4 */
@ -148,7 +149,7 @@ parse_reg (s, reg)
char *s;
unsigned *reg;
{
if (s[0] == 'r')
if ( tolower(s[0]) == 'r')
{
if (s[1] == '1' && s[2] >= '0' && s[2] <= '5')
{
@ -165,14 +166,46 @@ unsigned *reg;
return s;
}
static struct Cregs {
char *name;
unsigned int crnum;
} cregs[] = {
{"psr", 0},
{"epsr", 1},
{"fpsr", 2},
{"epc", 3},
{"fpc", 4},
{"ss0", 5},
{"ss1", 6},
{"ss2", 7},
{"ss3", 8},
{"aar", 9},
{"gcr", 10},
{"gsr", 11},
{"", 0}
};
static char *
parse_creg (s, reg)
char *s;
unsigned *reg;
{
if (s[0] == 'c' && s[1] == 'r')
char buf[10];
int i,j,length;
if ( (tolower(s[0]) == 'c' && tolower(s[1]) == 'r') )
{
if (s[2] == '1' && s[3] >= '0' && s[3] <= '5')
if (s[2] == '3' && s[3] >= '0' && s[3] <= '1')
{
*reg = 30 + s[3] - '0';
return s+4;
}
if (s[2] == '2' && s[3] >= '0' && s[3] <= '9')
{
*reg = 20 + s[3] - '0';
return s+4;
}
if (s[2] == '1' && s[3] >= '0' && s[3] <= '9')
{
*reg = 10 + s[3] - '0';
return s+4;
@ -183,6 +216,15 @@ unsigned *reg;
return s+3;
}
}
/** look at alternate creg names before giving error **/
for(i=0; *(cregs[i].name)!='\0'; i++) {
length=strlen(cregs[i].name);
for(j=0; j<length; j++) buf[j]=tolower(s[j]);
if ( strncmp(cregs[i].name,buf,length)==0 ) {
*reg=cregs[i].crnum;
return( s+length );
}
}
as_bad("register expected");
return s;
}
@ -229,11 +271,15 @@ unsigned *reg;
unsigned *off;
unsigned siz;
{ char *new;
char *parse_imm_notation();
if (*s == '(')
{ s = parse_reg(s+1, reg);
if (*s == ',')
{ s = parse_imm(s+1, off, 0, 63);
{
s = parse_imm_notation(s+1);
if( parse_imm_notation(NULL) ) siz=1;
s = parse_imm(s, off, 0, 63);
if (siz > 1)
{ if (siz > 2)
{
@ -259,6 +305,25 @@ unsigned siz;
return s;
}
/* look for immediate notation '#' */
static char *
parse_imm_notation(s)
char *s;
{
static int isa_imm;
if( s == (char *)(NULL) ) return( (char *)(isa_imm) );
isa_imm=0;
while( isspace(*s) )
s++;
if( *s=='#' ) {
isa_imm=1;
s++;
}
return(s);
}
/* This is the guts of the machine-dependent assembler. STR points to a
@ -310,7 +375,8 @@ char *str;
output = frag_more (2);
break;
case OT:
op_end = parse_imm(op_end + 1, &reg, 0, 15);
op_end = parse_imm_notation(op_end + 1);
op_end = parse_imm(op_end, &reg, 0, 7);
inst |= reg;
output = frag_more (2);
break;
@ -319,6 +385,13 @@ char *str;
inst |= reg;
output = frag_more (2);
break;
case JSR:
op_end = parse_reg (op_end + 1, &reg);
if(reg==15)
as_bad("invalid register specified -> r15");
inst |= reg;
output = frag_more (2);
break;
case OC:
op_end = parse_reg (op_end + 1, &reg);
inst |= reg;
@ -339,12 +412,31 @@ char *str;
as_bad("second operand missing");
output = frag_more (2);
break;
case X1: /** handle both syntax-> xtrb- r1,rx OR xtrb- rx **/
op_end = parse_reg (op_end + 1, &reg);
if (*op_end == ',') { /** xtrb- r1,rx **/
if (reg != 1)
as_bad("destination register must be r1");
op_end = parse_reg(op_end + 1, &reg);
}
else { /** xtrb- rx **/
}
inst |= reg;
output = frag_more (2);
break;
case OI:
op_end = parse_reg (op_end + 1, &reg);
inst |= reg;
if (*op_end == ',')
{ op_end = parse_imm(op_end + 1, &reg, 1, 32);
inst |= (reg-1)<<4;
{ unsigned int maxval = 32;
unsigned int minval = 1;
op_end = parse_imm_notation(op_end + 1);
if( parse_imm_notation(NULL) ) {
maxval=31;
minval=0;
}
op_end = parse_imm(op_end, &reg, minval, maxval);
inst |= (reg-minval)<<4;
}
else
as_bad("second operand missing");
@ -354,7 +446,35 @@ char *str;
op_end = parse_reg (op_end + 1, &reg);
inst |= reg;
if (*op_end == ',')
{ op_end = parse_imm(op_end + 1, &reg, 0, 31);
{ unsigned upper = 31;
op_end = parse_imm_notation(op_end + 1);
op_end = parse_imm(op_end, &reg, 0, upper);
inst |= reg<<4;
}
else
as_bad("second operand missing");
output = frag_more (2);
break;
case SI:
op_end = parse_reg (op_end + 1, &reg);
inst |= reg;
if (*op_end == ',')
{ unsigned upper = 31;
op_end = parse_imm_notation(op_end + 1);
op_end = parse_imm(op_end, &reg, 1, upper);
inst |= reg<<4;
}
else
as_bad("second operand missing");
output = frag_more (2);
break;
case I7:
op_end = parse_reg (op_end + 1, &reg);
inst |= reg;
if (*op_end == ',')
{ unsigned upper = 0x7f;
op_end = parse_imm_notation(op_end + 1);
op_end = parse_imm(op_end, &reg, 0, upper);
inst |= reg<<4;
}
else
@ -384,7 +504,8 @@ char *str;
op_end = parse_reg (op_end + 1, &reg);
if (*op_end == ',')
{ unsigned val;
op_end = parse_imm(op_end + 1, &val, 0, 0x7FF);
op_end = parse_imm_notation(op_end + 1);
op_end = parse_imm(op_end, &val, 0, 0x7FF);
inst |= val&0x7FF;
}
else
@ -395,32 +516,53 @@ char *str;
break;
case LR:
op_end = parse_reg(op_end + 1, &reg);
if (reg == 3 || reg == 15)
as_bad("register must not be r3 or r15");
if( reg==0 || reg==15 )
as_bad ("invalid register 'r0' and 'r15' illegal");
inst |= (reg<<8);
output = frag_more (2);
if (*op_end++ == ',')
{
if (*op_end++ != '[')
as_bad ("second operand missing '['");
input_line_pointer = parse_exp(op_end);
if (*input_line_pointer++ != ']')
as_bad ("second operand missing ']'");
fix_new_exp(frag_now, output-frag_now->fr_literal, 2, &immediate,
/** look for # notation **/
op_end = parse_imm_notation(op_end);
if( parse_imm_notation(NULL) )
{ unsigned val;
op_end = parse_imm(op_end, &val, 0, 0x0FF);
inst |= val&0x0FF;
output = frag_more (2);
}
else
{
output = frag_more (2);
if (*op_end++ != '[' )
as_bad ("second operand missing '['");
input_line_pointer = parse_exp(op_end);
if (*input_line_pointer++ != ']' )
as_bad ("second operand missing ']'");
fix_new_exp(frag_now, output-frag_now->fr_literal, 2, &immediate,
1, R_PCRELIMM8BY4);
}
}
else
as_bad("second operand missing");
break;
case LJ:
output = frag_more (2);
if (*++op_end != '[')
as_bad ("operand missing '['");
input_line_pointer = parse_exp(op_end+1);
if (*input_line_pointer++ != ']')
as_bad ("operand missing ']'");
fix_new_exp(frag_now, output-frag_now->fr_literal, 2, &immediate,
1, R_PCRELIMM8BY4);
/** look for # notation **/
op_end = parse_imm_notation(op_end + 1) -1;
if( parse_imm_notation(NULL) )
{ unsigned val;
op_end = parse_imm(op_end+1, &val, 0, 0x0FF);
inst |= val&0x0FF;
output = frag_more (2);
}
else
{ output = frag_more (2);
if (*++op_end != '[')
as_bad ("operand missing '['");
input_line_pointer = parse_exp(op_end+1);
if (*input_line_pointer++ != ']')
as_bad ("operand missing ']'");
fix_new_exp(frag_now, output-frag_now->fr_literal,
2, &immediate, 1, R_PCRELIMM8BY4);
}
break;
case OM:
op_end = parse_reg(op_end + 1, &reg);
@ -434,8 +576,11 @@ char *str;
{ op_end = parse_reg(op_end + 1, &basereg);
if (*op_end == ')')
op_end++;
if (endreg == 15 && basereg == 3)
{ inst |= 0x0080; /* list form */
if (endreg == 15 && basereg == 0)
{
if(reg==0 || reg==15)
as_bad("bad register list, r0 and r15 invalid as starting registers");
inst |= 0x0080; /* list form */
inst |= reg;
}
else if (endreg - reg == 3)
@ -462,11 +607,56 @@ char *str;
as_bad("reg-reg expected");
output = frag_more (2);
break;
case BR:
case OQ:
op_end = parse_reg(op_end + 1, &reg);
if (*op_end == '-')
{ int endreg;
op_end = parse_reg(op_end + 1, &endreg);
if (*op_end == ',')
{ int basereg;
op_end++;
if (*op_end == '(')
{ op_end = parse_reg(op_end + 1, &basereg);
if (*op_end == ')')
op_end++;
if (endreg - reg == 3)
{ inst |= basereg; /* quadrant form */
switch (reg)
{ case 0: break;
case 4: inst |= (1<<5); break;
case 8: inst |= (2<<5); break;
case 12: inst |= (3<<5); break;
default:
as_bad("first register must be r0, r4, r8, or r12");
}
}
else
as_bad("bad register list or base register");
}
else
as_bad("base register expected");
}
else
as_bad("second operand missing");
}
else
as_bad("reg-reg expected");
output = frag_more (2);
input_line_pointer = parse_exp(op_end+1);
fix_new_exp (frag_now, output-frag_now->fr_literal, 2, &immediate,
1, R_PCRELIMM11BY2);
break;
case BR:
op_end = parse_imm_notation(op_end + 1);
if( parse_imm_notation(NULL) )
{ unsigned val;
op_end = parse_imm(op_end, &val, 0, 0x7FF);
inst |= val&0x7FF;
output = frag_more (2);
}
else
{ output = frag_more (2);
input_line_pointer = parse_exp(op_end);
fix_new_exp (frag_now, output-frag_now->fr_literal,
2, &immediate, 1, R_PCRELIMM11BY2);
}
break;
default:
as_bad("cant deal with opcode \"%s\"", name);
@ -791,9 +981,14 @@ md_apply_fix1 (fixP, val)
val /= 2;
if (((val & ~0x3ff) != 0) && ((val | 0x3ff) != -1))
as_warn ("pcrel for branch too far (0x%x) at 0x%x", val, addr);
/*****
BR no longer puts the sign-bit in bit0, leaves it in bit10
buf[0] |= ((val >> 7) & 0x7);
buf[1] |= ((val & 0x7f) << 1);
buf[1] |= ((val >> 10) & 0x1);
*****/
buf[0] |= ((val >> 8) & 0x7);
buf[1] |= (val & 0xff);
break;
case R_PCRELIMM8BY4: /* lower 8 bits of 2 byte opcode */
val += 3;
@ -1040,4 +1235,3 @@ tc_aout_pre_write_hook (headers)
}
#endif
#endif /* !BFD_ASSEMBLER */

7
ld/emulparams/rce.sh
View file

@ -1,5 +1,6 @@
SCRIPT_NAME=rce
OUTPUT_FORMAT="aout-rce"
TEXT_START_ADDR=0x8000
PAGE_SIZE=128
OUTPUT_FORMAT="a.out-rce"
PAGE_SIZE=0x1000
TEXT_START_ADDR=0
NONPAGED_TEXT_START_ADDR=0
ARCH=rce

62
ld/scripttempl/rce.sc
View file

@ -2,53 +2,31 @@ cat <<EOF
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH(${ARCH})
MEMORY {
ram : o = 0x1000, l = 512k
}
${RELOCATING+${LIB_SEARCH_DIRS}}
${RELOCATING+__DYNAMIC = 0;}
${STACKZERO+${RELOCATING+${STACKZERO}}}
${SHLIB_PATH+${RELOCATING+${SHLIB_PATH}}}
SECTIONS
{
.text :
{
*(.text)
*(.strings)
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > ram}
.tors : {
___ctors = . ;
*(.ctors)
___ctors_end = . ;
___dtors = . ;
*(.dtors)
___dtors_end = . ;
} ${RELOCATING+ > ram}
.data :
{
*(.data)
${RELOCATING+ _edata = . ; }
} ${RELOCATING+ > ram}
.bss :
{
${RELOCATING+ _bss_start = . ; }
*(.bss)
*(COMMON)
${RELOCATING+ _end = . ; }
} ${RELOCATING+ >ram}
.stack ${RELOCATING+ 0x30000 } :
{
${RELOCATING+ _stack = . ; }
*(.stack)
} ${RELOCATING+ > ram}
.stab 0 ${RELOCATING+(NOLOAD)} :
.text ${RELOCATING+${TEXT_START_ADDR}}:
{
[ .stab ]
CREATE_OBJECT_SYMBOLS
*(.text)
${RELOCATING+_etext = ${DATA_ALIGNMENT};}
}
.stabstr 0 ${RELOCATING+(NOLOAD)} :
.data ${RELOCATING+${DATA_ALIGNMENT}} :
{
[ .stabstr ]
*(.data)
${CONSTRUCTING+CONSTRUCTORS}
${RELOCATING+_edata = .;}
}
.bss ${RELOCATING+SIZEOF(.data) + ADDR(.data)} :
{
${RELOCATING+ __bss_start = .};
*(.bss)
*(COMMON)
${RELOCATING+_end = . };
${RELOCATING+__end = . };
}
}
EOF

57
opcodes/rce-opc.h
View file

@ -1,5 +1,5 @@
typedef enum {
O0, OT, O1, OC, O2, OI, OB, LS, BR, LI, LR, LJ, OM
O0, OT, O1, OC, O2, X1, OI, OB, SI, I7, LS, BR, LI, LR, LJ, OM, OQ, JSR
} rce_opclass;
typedef struct inst
@ -21,13 +21,15 @@ rce_opcode_info rce_table[]={
{ "mvc", O1, 0x0020 },
{ "mvcv", O1, 0x0030 },
{ "jmp", O1, 0x0040 },
{ "jsr", O1, 0x0050 },
{ "jsr", JSR, 0x0050 },
/*****
{ "jmpt", O1, 0x0060 },
{ "jmpf", O1, 0x0070 },
{ "tsteq", O1, 0x0080 },
*****/
{ "tstne", O1, 0x0080 },
{ "tstgt", O1, 0x0090 },
{ "tstlt", O1, 0x00A0 },
{ "tstbz", O1, 0x00B0 },
{ "tstnbz", O1, 0x00B0 },
{ "inct", O1, 0x00C0 },
{ "incf", O1, 0x00D0 },
{ "dect", O1, 0x00E0 },
@ -36,23 +38,23 @@ rce_opcode_info rce_table[]={
{ "sextb", O1, 0x0110 },
{ "zexth", O1, 0x0120 },
{ "sexth", O1, 0x0130 },
{ "xtrb3", O1, 0x0140 },
{ "xtrb2", O1, 0x0150 },
{ "xtrb1", O1, 0x0160 },
{ "xtrb0", O1, 0x0170 },
{ "xtrb3", X1, 0x0140 },
{ "xtrb2", X1, 0x0150 },
{ "xtrb1", X1, 0x0160 },
{ "xtrb0", X1, 0x0170 },
{ "decgt", O1, 0x01C0 },
{ "declt", O1, 0x01D0 },
{ "brev", O1, 0x01E0 },
{ "not", O1, 0x01F0 },
{ "mfcr", OC, 0x0200 },
{ "mtcr", OC, 0x0300 },
{ "mov", O2, 0x0400 },
{ "movnc", O2, 0x0600 },
{ "tst", O2, 0x0700 },
{ "cmpeq", O2, 0x0800 },
{ "cmpgt", O2, 0x0900 },
{ "cmphi", O2, 0x0A00 },
{ "mfcr", OC, 0x0400 },
{ "mtcr", OC, 0x0600 },
{ "mov", O2, 0x0200 },
{ "movnc", O2, 0x0C00 },
{ "tst", O2, 0x0B00 },
{ "cmpne", O2, 0x0800 },
{ "cmplt", O2, 0x0900 },
{ "cmphs", O2, 0x0A00 },
{ "bgenr", O2, 0x0D00 },
{ "movt", O2, 0x0E00 },
{ "movf", O2, 0x0F00 },
@ -71,8 +73,11 @@ rce_opcode_info rce_table[]={
{ "lsr", O2, 0x1C00 },
{ "asr", O2, 0x1D00 },
{ "lsl", O2, 0x1E00 },
/*****
{ "rotl", O2, 0x1F00 },
{ "movi", OB, 0x2000 },
*****/
{ "movi", I7, 0x6800 },
{ "andi", OB, 0x2200 },
{ "movit", OB, 0x2400 },
@ -85,26 +90,30 @@ rce_opcode_info rce_table[]={
{ "rsubi", OB, 0x3200 },
{ "addi", OI, 0x3400 },
{ "subi", OI, 0x3600 },
{ "lsri", OB, 0x3800 },
{ "lsri", SI, 0x3800 },
{ "lsrc", O1, 0x3800 },
{ "asri", OB, 0x3A00 },
{ "asri", SI, 0x3A00 },
{ "asrc", O1, 0x3A00 },
{ "lsli", OB, 0x3C00 },
{ "lsli", SI, 0x3C00 },
{ "lslc", O1, 0x3C00 },
{ "rotli", OB, 0x3E00 },
{ "rotlc", O1, 0x3E00 },
{ "rotli", SI, 0x3E00 },
{ "xsr", O1, 0x3E00 },
{ "ldm", OM, 0x6000 },
{ "stm", OM, 0x6010 },
{ "ldq", OQ, 0x6000 },
{ "stq", OQ, 0x6010 },
{ "mult", O2, 0x6100 },
{ "mvir1", LI, 0x6800 },
/* { "mvir1", LI, 0x6800 }, */
{ "lrw", LR, 0x7000 },
{ "jmpi", LJ, 0x7300 },
{ "jmpi", LJ, 0x7000 },
{ "jsri", LJ, 0x7F00 },
{ "ld", LS, 0x8000 },
{ "st", LS, 0x9000 },
{ "ld.w", LS, 0x8000 },
{ "st.w", LS, 0x9000 },
{ "ld.b", LS, 0xA000 },
{ "st.b", LS, 0xB000 },
{ "ld.h", LS, 0xC000 },