sim: m68hc11: use standard STATIC_INLINE helper
Rather than redefine inline locally, use the common STATIC_INLINE.
This commit is contained in:
Mike Frysinger
parent
fc177366b0
commit
fa0843f502
2 changed files with 34 additions and 25 deletions
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@ -1,3 +1,15 @@
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2016-08-16 Mike Frysinger <vapier@gentoo.org>
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* sim-main.h (inline): Delete define.
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(phys_to_virt): Change inline to STATIC_INLINE.
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(memory_read8, memory_write8, memory_read16, memory_write16,
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cpu_ccr_update_tst16, cpu_ccr_update_shift8, cpu_ccr_update_shift16,
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cpu_ccr_update_add8, cpu_ccr_update_sub8, cpu_ccr_update_add16,
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cpu_ccr_update_sub16, cpu_m68hc11_push_uint8, cpu_m68hc11_push_uint16,
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cpu_m68hc11_pop_uint8, cpu_m68hc11_pop_uint16, cpu_m68hc12_push_uint8,
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cpu_m68hc12_push_uint16, cpu_m68hc12_pop_uint8,
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cpu_m68hc12_pop_uint16, cpu_fetch8, cpu_fetch16): Likewise.
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2016-08-15 Mike Frysinger <vapier@gentoo.org>
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* interp.c (sim_get_bank_parameters): Delete abfd arg.
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@ -287,15 +287,12 @@ struct _sim_cpu {
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#define cpu_set_ccr_Z(cpu, val) cpu_set_ccr_flag (cpu, M6811_Z_BIT, val)
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#define cpu_set_ccr_I(cpu, val) cpu_set_ccr_flag (cpu, M6811_I_BIT, val)
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#undef inline
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#define inline static __inline__
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extern void cpu_memory_exception (sim_cpu *cpu,
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SIM_SIGNAL excep,
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uint16 addr,
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const char *message);
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inline address_word
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STATIC_INLINE address_word
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phys_to_virt (sim_cpu *cpu, address_word addr)
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{
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if (addr >= cpu->bank_start && addr < cpu->bank_end)
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@ -306,7 +303,7 @@ phys_to_virt (sim_cpu *cpu, address_word addr)
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return (address_word) (addr);
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}
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inline uint8
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STATIC_INLINE uint8
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memory_read8 (sim_cpu *cpu, uint16 addr)
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{
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uint8 val;
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@ -319,7 +316,7 @@ memory_read8 (sim_cpu *cpu, uint16 addr)
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return val;
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}
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inline void
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STATIC_INLINE void
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memory_write8 (sim_cpu *cpu, uint16 addr, uint8 val)
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{
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if (sim_core_write_buffer (CPU_STATE (cpu), cpu, 0, &val, addr, 1) != 1)
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@ -329,7 +326,7 @@ memory_write8 (sim_cpu *cpu, uint16 addr, uint8 val)
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}
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}
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inline uint16
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STATIC_INLINE uint16
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memory_read16 (sim_cpu *cpu, uint16 addr)
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{
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uint8 b[2];
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@ -342,7 +339,7 @@ memory_read16 (sim_cpu *cpu, uint16 addr)
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return (((uint16) (b[0])) << 8) | ((uint16) b[1]);
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}
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inline void
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STATIC_INLINE void
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memory_write16 (sim_cpu *cpu, uint16 addr, uint16 val)
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{
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uint8 b[2];
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@ -358,7 +355,7 @@ memory_write16 (sim_cpu *cpu, uint16 addr, uint16 val)
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extern void
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cpu_ccr_update_tst8 (sim_cpu *cpu, uint8 val);
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inline void
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STATIC_INLINE void
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cpu_ccr_update_tst16 (sim_cpu *cpu, uint16 val)
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{
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cpu_set_ccr_V (cpu, 0);
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@ -366,7 +363,7 @@ cpu_ccr_update_tst16 (sim_cpu *cpu, uint16 val)
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cpu_set_ccr_Z (cpu, val == 0 ? 1 : 0);
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}
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inline void
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STATIC_INLINE void
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cpu_ccr_update_shift8 (sim_cpu *cpu, uint8 val)
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{
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cpu_set_ccr_N (cpu, val & 0x80 ? 1 : 0);
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@ -374,7 +371,7 @@ cpu_ccr_update_shift8 (sim_cpu *cpu, uint8 val)
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cpu_set_ccr_V (cpu, cpu_get_ccr_N (cpu) ^ cpu_get_ccr_C (cpu));
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}
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inline void
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STATIC_INLINE void
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cpu_ccr_update_shift16 (sim_cpu *cpu, uint16 val)
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{
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cpu_set_ccr_N (cpu, val & 0x8000 ? 1 : 0);
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@ -382,7 +379,7 @@ cpu_ccr_update_shift16 (sim_cpu *cpu, uint16 val)
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cpu_set_ccr_V (cpu, cpu_get_ccr_N (cpu) ^ cpu_get_ccr_C (cpu));
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}
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inline void
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STATIC_INLINE void
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cpu_ccr_update_add8 (sim_cpu *cpu, uint8 r, uint8 a, uint8 b)
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{
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cpu_set_ccr_C (cpu, ((a & b) | (b & ~r) | (a & ~r)) & 0x80 ? 1 : 0);
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@ -392,7 +389,7 @@ cpu_ccr_update_add8 (sim_cpu *cpu, uint8 r, uint8 a, uint8 b)
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}
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inline void
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STATIC_INLINE void
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cpu_ccr_update_sub8 (sim_cpu *cpu, uint8 r, uint8 a, uint8 b)
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{
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cpu_set_ccr_C (cpu, ((~a & b) | (b & r) | (~a & r)) & 0x80 ? 1 : 0);
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@ -401,7 +398,7 @@ cpu_ccr_update_sub8 (sim_cpu *cpu, uint8 r, uint8 a, uint8 b)
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cpu_set_ccr_N (cpu, r & 0x80 ? 1 : 0);
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}
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inline void
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STATIC_INLINE void
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cpu_ccr_update_add16 (sim_cpu *cpu, uint16 r, uint16 a, uint16 b)
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{
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cpu_set_ccr_C (cpu, ((a & b) | (b & ~r) | (a & ~r)) & 0x8000 ? 1 : 0);
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@ -410,7 +407,7 @@ cpu_ccr_update_add16 (sim_cpu *cpu, uint16 r, uint16 a, uint16 b)
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cpu_set_ccr_N (cpu, r & 0x8000 ? 1 : 0);
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}
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inline void
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STATIC_INLINE void
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cpu_ccr_update_sub16 (sim_cpu *cpu, uint16 r, uint16 a, uint16 b)
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{
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cpu_set_ccr_C (cpu, ((~a & b) | (b & r) | (~a & r)) & 0x8000 ? 1 : 0);
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@ -420,7 +417,7 @@ cpu_ccr_update_sub16 (sim_cpu *cpu, uint16 r, uint16 a, uint16 b)
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}
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/* Push and pop instructions for 68HC11 (next-available stack mode). */
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inline void
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STATIC_INLINE void
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cpu_m68hc11_push_uint8 (sim_cpu *cpu, uint8 val)
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{
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uint16 addr = cpu->cpu_regs.sp;
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@ -429,7 +426,7 @@ cpu_m68hc11_push_uint8 (sim_cpu *cpu, uint8 val)
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cpu->cpu_regs.sp = addr - 1;
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}
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inline void
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STATIC_INLINE void
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cpu_m68hc11_push_uint16 (sim_cpu *cpu, uint16 val)
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{
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uint16 addr = cpu->cpu_regs.sp - 1;
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@ -438,7 +435,7 @@ cpu_m68hc11_push_uint16 (sim_cpu *cpu, uint16 val)
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cpu->cpu_regs.sp = addr - 1;
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}
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inline uint8
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STATIC_INLINE uint8
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cpu_m68hc11_pop_uint8 (sim_cpu *cpu)
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{
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uint16 addr = cpu->cpu_regs.sp;
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@ -449,7 +446,7 @@ cpu_m68hc11_pop_uint8 (sim_cpu *cpu)
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return val;
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}
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inline uint16
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STATIC_INLINE uint16
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cpu_m68hc11_pop_uint16 (sim_cpu *cpu)
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{
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uint16 addr = cpu->cpu_regs.sp;
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@ -461,7 +458,7 @@ cpu_m68hc11_pop_uint16 (sim_cpu *cpu)
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}
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/* Push and pop instructions for 68HC12 (last-used stack mode). */
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inline void
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STATIC_INLINE void
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cpu_m68hc12_push_uint8 (sim_cpu *cpu, uint8 val)
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{
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uint16 addr = cpu->cpu_regs.sp;
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@ -471,7 +468,7 @@ cpu_m68hc12_push_uint8 (sim_cpu *cpu, uint8 val)
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cpu->cpu_regs.sp = addr;
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}
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inline void
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STATIC_INLINE void
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cpu_m68hc12_push_uint16 (sim_cpu *cpu, uint16 val)
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{
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uint16 addr = cpu->cpu_regs.sp;
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@ -481,7 +478,7 @@ cpu_m68hc12_push_uint16 (sim_cpu *cpu, uint16 val)
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cpu->cpu_regs.sp = addr;
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}
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inline uint8
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STATIC_INLINE uint8
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cpu_m68hc12_pop_uint8 (sim_cpu *cpu)
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{
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uint16 addr = cpu->cpu_regs.sp;
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@ -492,7 +489,7 @@ cpu_m68hc12_pop_uint8 (sim_cpu *cpu)
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return val;
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}
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inline uint16
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STATIC_INLINE uint16
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cpu_m68hc12_pop_uint16 (sim_cpu *cpu)
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{
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uint16 addr = cpu->cpu_regs.sp;
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@ -504,7 +501,7 @@ cpu_m68hc12_pop_uint16 (sim_cpu *cpu)
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}
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/* Fetch a 8/16 bit value and update the PC. */
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inline uint8
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STATIC_INLINE uint8
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cpu_fetch8 (sim_cpu *cpu)
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{
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uint16 addr = cpu->cpu_regs.pc;
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@ -515,7 +512,7 @@ cpu_fetch8 (sim_cpu *cpu)
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return val;
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}
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inline uint16
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STATIC_INLINE uint16
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cpu_fetch16 (sim_cpu *cpu)
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{
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uint16 addr = cpu->cpu_regs.pc;
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