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Add const qualifiers at various places.

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opcodes	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

include	* opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
	* opcode/h8300.h (struct h8_opcode): Likewise.
	* opcode/hppa.h (struct pa_opcode): Likewise.
	* opcode/msp430.h: Likewise.
	* opcode/spu.h (struct spu_opcode): Likewise.
	* opcode/tic30.h (struct _register): Likewise.
	* opcode/tic4x.h (struct tic4x_register): Likewise.
	(struct tic4x_cond): Likewise.
	(struct tic4x_indirect): Likewise.
	(struct tic4x_inst): Likewise.
	* opcode/visium.h (struct reg_entry): Likewise.

gas	* config/tc-arc.c: Add const qualifiers.
	* config/tc-h8300.c (md_begin): Likewise.
	* config/tc-ia64.c (print_prmask): Likewise.
	* config/tc-msp430.c (msp430_operands): Likewise.
	* config/tc-nds32.c (struct suffix_name): Likewise.
	(struct nds32_parse_option_table): Likewise.
	(struct nds32_set_option_table): Likewise.
	(do_pseudo_pushpopm): Likewise.
	(do_pseudo_pushpop_stack): Likewise.
	(nds32_relax_relocs): Likewise.
	(nds32_flag): Likewise.
	(struct nds32_hint_map): Likewise.
	(nds32_find_reloc_table): Likewise.
	(nds32_match_hint_insn): Likewise.
	* config/tc-s390.c: Likewise.
	* config/tc-sh.c (get_specific): Likewise.
	* config/tc-tic30.c: Likewise.
	* config/tc-tic4x.c (tic4x_inst_add): Likewise.
	(tic4x_indirect_parse): Likewise.
	* config/tc-vax.c (vax_cons): Likewise.
	* config/tc-z80.c (struct reg_entry): Likewise.
	* config/tc-epiphany.c (md_assemble): Adjust.
	(epiphany_assemble): New function.
	(epiphany_elf_section_rtn): Call do_align directly.
	(epiphany_elf_section_text): Likewise.
	* config/tc-ip2k.c (ip2k_elf_section_rtn): Likewise.
	(ip2k_elf_section_text): Likewise.
	* read.c (do_align): Make it not static.
	* read.h (do_align): New prototype.
This commit is contained in:
Trevor Saunders 2016-03-07 15:16:28 +00:00 committed by Nick Clifton
parent 410d0d5c76
commit f86f586366
30 changed files with 200 additions and 171 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

32
gas/ChangeLog
View file

@ -1,3 +1,35 @@
2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-arc.c: Add const qualifiers.
* config/tc-h8300.c (md_begin): Likewise.
* config/tc-ia64.c (print_prmask): Likewise.
* config/tc-msp430.c (msp430_operands): Likewise.
* config/tc-nds32.c (struct suffix_name): Likewise.
(struct nds32_parse_option_table): Likewise.
(struct nds32_set_option_table): Likewise.
(do_pseudo_pushpopm): Likewise.
(do_pseudo_pushpop_stack): Likewise.
(nds32_relax_relocs): Likewise.
(nds32_flag): Likewise.
(struct nds32_hint_map): Likewise.
(nds32_find_reloc_table): Likewise.
(nds32_match_hint_insn): Likewise.
* config/tc-s390.c: Likewise.
* config/tc-sh.c (get_specific): Likewise.
* config/tc-tic30.c: Likewise.
* config/tc-tic4x.c (tic4x_inst_add): Likewise.
(tic4x_indirect_parse): Likewise.
* config/tc-vax.c (vax_cons): Likewise.
* config/tc-z80.c (struct reg_entry): Likewise.
* config/tc-epiphany.c (md_assemble): Adjust.
(epiphany_assemble): New function.
(epiphany_elf_section_rtn): Call do_align directly.
(epiphany_elf_section_text): Likewise.
* config/tc-ip2k.c (ip2k_elf_section_rtn): Likewise.
(ip2k_elf_section_text): Likewise.
* read.c (do_align): Make it not static.
* read.h (do_align): New prototype.
2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-arm.c (aeabi_set_public_attributes): Emit attribute

2
gas/config/tc-arc.c
View file

@ -2048,7 +2048,7 @@ md_assemble (char *str)
/* Callback to insert a register into the hash table. */
static void
declare_register (char *name, int number)
declare_register (const char *name, int number)
{
const char *err;
symbolS *regS = symbol_create (name, reg_section,

156
gas/config/tc-epiphany.c
View file

@ -69,38 +69,18 @@ epiphany_elf_section_rtn (int i)
if (force_code_align)
{
/* The s_align_ptwo function expects that we are just after a .align
directive and it will either try and read the align value or stop
if end of line so we must fake it out so it thinks we are at the
end of the line. */
char *old_input_line_pointer = input_line_pointer;
input_line_pointer = "\n";
s_align_ptwo (1);
do_align (1, NULL, 0, 0);
force_code_align = FALSE;
/* Restore. */
input_line_pointer = old_input_line_pointer;
}
}
static void
epiphany_elf_section_text (int i)
{
char *old_input_line_pointer;
obj_elf_text (i);
/* The s_align_ptwo function expects that we are just after a .align
directive and it will either try and read the align value or stop if
end of line so we must fake it out so it thinks we are at the end of
the line. */
old_input_line_pointer = input_line_pointer;
input_line_pointer = "\n";
s_align_ptwo (1);
do_align (1, NULL, 0, 0);
force_code_align = FALSE;
/* Restore. */
input_line_pointer = old_input_line_pointer;
}
/* The target specific pseudo-ops which we support. */
@ -405,72 +385,17 @@ parse_reglist (const char * s, int * mask)
}
void
md_assemble (char *str)
{
/* Assemble an instruction, push and pop pseudo instructions should have
already been expanded. */
static void
epiphany_assemble (const char *str)
{
epiphany_insn insn;
char *errmsg = 0;
const char * pperr = 0;
int regmask=0, push=0, pop=0;
memset (&insn, 0, sizeof (insn));
/* Special-case push/pop instruction macros. */
if (0 == strncmp (str, "push {", 6))
{
char * s = str + 6;
push = 1;
pperr = parse_reglist (s, &regmask);
}
else if (0 == strncmp (str, "pop {", 5))
{
char * s = str + 5;
pop = 1;
pperr = parse_reglist (s, &regmask);
}
if (pperr)
{
as_bad ("%s", pperr);
return;
}
if (push && regmask)
{
char buff[20];
int i,p ATTRIBUTE_UNUSED;
md_assemble ("mov r15,4");
md_assemble ("sub sp,sp,r15");
for (i = 0, p = 1; i <= 15; ++i, regmask >>= 1)
{
if (regmask == 1)
sprintf (buff, "str r%d,[sp]", i); /* Last one. */
else if (regmask & 1)
sprintf (buff, "str r%d,[sp],-r15", i);
else
continue;
md_assemble (buff);
}
return;
}
else if (pop && regmask)
{
char buff[20];
int i,p;
md_assemble ("mov r15,4");
for (i = 15, p = 1 << 15; i >= 0; --i, p >>= 1)
if (regmask & p)
{
sprintf (buff, "ldr r%d,[sp],+r15", i);
md_assemble (buff);
}
return;
}
/* Initialize GAS's cgen interface for a new instruction. */
gas_cgen_init_parse ();
@ -596,6 +521,71 @@ md_assemble (char *str)
}
}
void
md_assemble (char *str)
{
const char * pperr = 0;
int regmask=0, push=0, pop=0;
/* Special-case push/pop instruction macros. */
if (0 == strncmp (str, "push {", 6))
{
char * s = str + 6;
push = 1;
pperr = parse_reglist (s, &regmask);
}
else if (0 == strncmp (str, "pop {", 5))
{
char * s = str + 5;
pop = 1;
pperr = parse_reglist (s, &regmask);
}
if (pperr)
{
as_bad ("%s", pperr);
return;
}
if (push && regmask)
{
char buff[20];
int i,p ATTRIBUTE_UNUSED;
epiphany_assemble ("mov r15,4");
epiphany_assemble ("sub sp,sp,r15");
for (i = 0, p = 1; i <= 15; ++i, regmask >>= 1)
{
if (regmask == 1)
sprintf (buff, "str r%d,[sp]", i); /* Last one. */
else if (regmask & 1)
sprintf (buff, "str r%d,[sp],-r15", i);
else
continue;
epiphany_assemble (buff);
}
return;
}
else if (pop && regmask)
{
char buff[20];
int i,p;
epiphany_assemble ("mov r15,4");
for (i = 15, p = 1 << 15; i >= 0; --i, p >>= 1)
if (regmask & p)
{
sprintf (buff, "ldr r%d,[sp],+r15", i);
epiphany_assemble (buff);
}
return;
}
epiphany_assemble (str);
}
/* The syntax in the manual says constants begin with '#'.
We just ignore it. */

2
gas/config/tc-h8300.c
View file

@ -266,7 +266,7 @@ md_begin (void)
{
struct h8_opcode *first_skipped = 0;
int len, cmplen = 0;
char *src = p1->name;
const char *src = p1->name;
char *dst, *buffer;
if (p1->name == 0)

4
gas/config/tc-ia64.c
View file

@ -3521,7 +3521,7 @@ dot_restorereg (int pred)
add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep);
}
static char *special_linkonce_name[] =
static const char *special_linkonce_name[] =
{
".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
};
@ -5007,7 +5007,7 @@ static void
print_prmask (valueT mask)
{
int regno;
char *comma = "";
const char *comma = "";
for (regno = 0; regno < 64; regno++)
{
if (mask & ((valueT) 1 << regno))

21
gas/config/tc-ip2k.c
View file

@ -72,35 +72,18 @@ ip2k_elf_section_rtn (int i)
if (force_code_align)
{
/* The s_align_ptwo function expects that we are just after a .align
directive and it will either try and read the align value or stop
if end of line so we must fake it out so it thinks we are at the
end of the line. */
char *old_input_line_pointer = input_line_pointer;
input_line_pointer = "\n";
s_align_ptwo (1);
do_align (1, NULL, 0, 0);
force_code_align = 0;
/* Restore. */
input_line_pointer = old_input_line_pointer;
}
}
static void
ip2k_elf_section_text (int i)
{
char *old_input_line_pointer;
obj_elf_text(i);
/* the s_align_ptwo function expects that we are just after a .align
directive and it will either try and read the align value or stop if
end of line so we must fake it out so it thinks we are at the end of
the line. */
old_input_line_pointer = input_line_pointer;
input_line_pointer = "\n";
s_align_ptwo (1);
do_align (1, NULL, 0, 0);
force_code_align = 0;
/* Restore. */
input_line_pointer = old_input_line_pointer;
}
/* The target specific pseudo-ops which we support. */

2
gas/config/tc-msp430.c
View file

@ -2542,7 +2542,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
support it for compatibility purposes. */
if (addr_op && opcode->fmt >= 0)
{
char * old_name = opcode->name;
const char * old_name = opcode->name;
char real_name[32];
sprintf (real_name, "%sa", old_name);

50
gas/config/tc-nds32.c
View file

@ -71,7 +71,7 @@ struct nds32_relocs_pattern
/* Suffix name and relocation. */
struct suffix_name
{
char *suffix;
const char *suffix;
short unsigned int reloc;
int pic;
};
@ -1912,16 +1912,16 @@ size_t md_longopts_size = sizeof (md_longopts);
struct nds32_parse_option_table
{
const char *name; /* Option string. */
char *help; /* Help description. */
int (*func) (char *arg); /* How to parse it. */
const char *help; /* Help description. */
int (*func) (const char *arg); /* How to parse it. */
};
/* The value `-1' represents this option has *NOT* been set. */
#ifdef NDS32_DEFAULT_ARCH_NAME
static char* nds32_arch_name = NDS32_DEFAULT_ARCH_NAME;
static const char* nds32_arch_name = NDS32_DEFAULT_ARCH_NAME;
#else
static char* nds32_arch_name = "v3";
static const char* nds32_arch_name = "v3";
#endif
static int nds32_baseline = -1;
static int nds32_gpr16 = -1;
@ -1934,10 +1934,10 @@ static int nds32_abi = -1;
static int nds32_elf_flags = 0;
static int nds32_fpu_com = 0;
static int nds32_parse_arch (char *str);
static int nds32_parse_baseline (char *str);
static int nds32_parse_freg (char *str);
static int nds32_parse_abi (char *str);
static int nds32_parse_arch (const char *str);
static int nds32_parse_baseline (const char *str);
static int nds32_parse_freg (const char *str);
static int nds32_parse_abi (const char *str);
static struct nds32_parse_option_table parse_opts [] =
{
@ -1975,7 +1975,7 @@ static int nds32_relax_all = 1;
struct nds32_set_option_table
{
const char *name; /* Option string. */
char *help; /* Help description. */
const char *help; /* Help description. */
int *var; /* Variable to be set. */
int value; /* Value to set. */
};
@ -2174,7 +2174,7 @@ builtin_addend (const char *s, char *x ATTRIBUTE_UNUSED)
}
static void
md_assemblef (char *format, ...)
md_assemblef (const char *format, ...)
{
/* FIXME: hope this is long enough. */
char line[1024];
@ -2189,7 +2189,7 @@ md_assemblef (char *format, ...)
}
/* Some prototypes here, since some op may use another op. */
static void do_pseudo_li_internal (char *rt, int imm32s);
static void do_pseudo_li_internal (const char *rt, int imm32s);
static void do_pseudo_move_reg_internal (char *dst, char *src);
static void
@ -2385,7 +2385,7 @@ do_pseudo_la (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
}
static void
do_pseudo_li_internal (char *rt, int imm32s)
do_pseudo_li_internal (const char *rt, int imm32s)
{
if (enable_16bit && imm32s <= 0xf && imm32s >= -0x10)
md_assemblef ("movi55 %s,%d", rt, imm32s);
@ -2627,7 +2627,7 @@ do_pseudo_pushpopm (int argc, char *argv[], int pv ATTRIBUTE_UNUSED)
/* SMW.{b | a}{i | d}{m?} Rb, [Ra], Re, Enable4 */
int rb, re, ra, en4;
int i;
char *opc = "pushpopm";
const char *opc = "pushpopm";
if (argc == 3)
as_bad ("'pushm/popm $ra5, $rb5, $label' is deprecated. "
@ -2722,7 +2722,7 @@ do_pseudo_pushpop_stack (int argc, char *argv[], int pv)
int rb, re;
int en4;
int last_arg_index;
char *opc = (pv == 0) ? "smw.adm" : "lmw.bim";
const char *opc = (pv == 0) ? "smw.adm" : "lmw.bim";
rb = re = 0;
@ -3047,7 +3047,7 @@ end:
Thus, if the value of option has been set, keep the value the way it is. */
static int
nds32_parse_arch (char *str)
nds32_parse_arch (const char *str)
{
static const struct nds32_arch
{
@ -3097,7 +3097,7 @@ nds32_parse_arch (char *str)
/* This function parses "baseline" specified. */
static int
nds32_parse_baseline (char *str)
nds32_parse_baseline (const char *str)
{
if (strcmp (str, "v3") == 0)
nds32_baseline = ISA_V3;
@ -3118,7 +3118,7 @@ nds32_parse_baseline (char *str)
/* This function parses "fpu-freg" specified. */
static int
nds32_parse_freg (char *str)
nds32_parse_freg (const char *str)
{
if (strcmp (str, "2") == 0)
nds32_freg = E_NDS32_FPU_REG_32SP_16DP;
@ -3141,7 +3141,7 @@ nds32_parse_freg (char *str)
/* This function parse "abi=" specified. */
static int
nds32_parse_abi (char *str)
nds32_parse_abi (const char *str)
{
if (strcmp (str, "v2") == 0)
nds32_abi = E_NDS_ABI_AABI;
@ -3557,7 +3557,7 @@ nds32_relax_relocs (int relax)
char saved_char;
char *name;
int i;
char *subtype_relax[] =
const char *subtype_relax[] =
{"", "", "ex9", "ifc"};
name = input_line_pointer;
@ -3783,7 +3783,7 @@ nds32_flag (int ignore ATTRIBUTE_UNUSED)
char *name;
char saved_char;
int i;
char *possible_flags[] = { "verbatim" };
const char *possible_flags[] = { "verbatim" };
/* Skip whitespaces. */
name = input_line_pointer;
@ -4591,7 +4591,7 @@ enum nds32_insn_type
struct nds32_hint_map
{
bfd_reloc_code_real_type hi_type;
char *opc;
const char *opc;
enum nds32_relax_hint_type hint_type;
enum nds32_br_range range;
enum nds32_insn_type insn_list;
@ -4688,7 +4688,7 @@ nds32_find_reloc_table (struct nds32_relocs_pattern *relocs_pattern,
unsigned int opcode, seq_size;
enum nds32_br_range range;
struct nds32_relocs_pattern *pattern, *hi_pattern = NULL;
char *opc = NULL;
const char *opc = NULL;
relax_info_t *relax_info = NULL;
nds32_relax_fixup_info_t *fixup_info, *hint_fixup;
enum nds32_relax_hint_type hint_type = NDS32_RELAX_HINT_NONE;
@ -4697,7 +4697,7 @@ nds32_find_reloc_table (struct nds32_relocs_pattern *relocs_pattern,
enum nds32_insn_type relax_type = 0;
struct nds32_hint_map *map_ptr = hint_map;
unsigned int i;
char *check_insn[] =
const char *check_insn[] =
{ "bnes38", "beqs38", "bnez38", "bnezs8", "beqz38", "beqzs8" };
/* TODO: PLT GOT. */
@ -4859,7 +4859,7 @@ nds32_find_reloc_table (struct nds32_relocs_pattern *relocs_pattern,
static bfd_boolean
nds32_match_hint_insn (struct nds32_opcode *opcode, uint32_t seq)
{
char *check_insn[] =
const char *check_insn[] =
{ "bnes38", "beqs38", "bnez38", "bnezs8", "beqz38", "beqzs8" };
uint32_t insn = opcode->value;
unsigned int i;

6
gas/config/tc-s390.c
View file

@ -33,7 +33,7 @@
#ifndef DEFAULT_ARCH
#define DEFAULT_ARCH "s390"
#endif
static char *default_arch = DEFAULT_ARCH;
static const char *default_arch = DEFAULT_ARCH;
/* Either 32 or 64, selects file format. */
static int s390_arch_size = 0;
@ -705,7 +705,7 @@ s390_insert_operand (unsigned char *insn,
struct map_tls
{
char *string;
const char *string;
int length;
bfd_reloc_code_real_type reloc;
};
@ -780,7 +780,7 @@ elf_suffix_type;
struct map_bfd
{
char *string;
const char *string;
int length;
elf_suffix_type suffix;
};

2
gas/config/tc-sh.c
View file

@ -1677,7 +1677,7 @@ static sh_opcode_info *
get_specific (sh_opcode_info *opcode, sh_operand_info *operands)
{
sh_opcode_info *this_try = opcode;
char *name = opcode->name;
const char *name = opcode->name;
int n = 0;
while (opcode->name)

2
gas/config/tc-tic30.c
View file

@ -31,7 +31,7 @@
/* Put here all non-digit non-letter characters that may occur in an
operand. */
static char operand_special_chars[] = "%$-+(,)*._~/<>&^!:[@]";
static char *ordinal_names[] =
static const char *ordinal_names[] =
{
N_("first"), N_("second"), N_("third"), N_("fourth"), N_("fifth")
};

12
gas/config/tc-tic4x.c
View file

@ -618,7 +618,7 @@ tic4x_atof (char *str, char what_kind, LITTLENUM_TYPE *words)
}
static void
tic4x_insert_reg (char *regname, int regnum)
tic4x_insert_reg (const char *regname, int regnum)
{
char buf[32];
int i;
@ -634,7 +634,7 @@ tic4x_insert_reg (char *regname, int regnum)
}
static void
tic4x_insert_sym (char *symname, int value)
tic4x_insert_sym (const char *symname, int value)
{
symbolS *symbolP;
@ -1239,7 +1239,7 @@ tic4x_inst_insert (const tic4x_inst_t *inst)
/* Make a new instruction template. */
static tic4x_inst_t *
tic4x_inst_make (char *name, unsigned long opcode, char *args)
tic4x_inst_make (const char *name, unsigned long opcode, char *args)
{
static tic4x_inst_t *insts = NULL;
static char *names = NULL;
@ -1271,7 +1271,7 @@ tic4x_inst_make (char *name, unsigned long opcode, char *args)
static int
tic4x_inst_add (const tic4x_inst_t *insts)
{
char *s = insts->name;
const char *s = insts->name;
char *d;
unsigned int i;
int ok = 1;
@ -1295,7 +1295,7 @@ tic4x_inst_add (const tic4x_inst_t *insts)
{
tic4x_inst_t *inst;
int k = 0;
char *c = tic4x_conds[i].name;
const char *c = tic4x_conds[i].name;
char *e = d;
while (*c)
@ -1407,7 +1407,7 @@ static int
tic4x_indirect_parse (tic4x_operand_t *operand,
const tic4x_indirect_t *indirect)
{
char *n = indirect->name;
const char *n = indirect->name;
char *s = input_line_pointer;
char *b;
symbolS *symbolP;

2
gas/config/tc-vax.c
View file

@ -3274,7 +3274,7 @@ bfd_reloc_code_real_type
vax_cons (expressionS *exp, int size)
{
char *save;
char *vax_cons_special_reloc;
const char *vax_cons_special_reloc;
SKIP_WHITESPACE ();
vax_cons_special_reloc = NULL;

4
gas/config/tc-z80.c
View file

@ -163,7 +163,7 @@ static symbolS * zero;
struct reg_entry
{
char* name;
const char* name;
int number;
};
#define R_STACKABLE (0x80)
@ -408,7 +408,7 @@ typedef const char * (asfunc)(char, char, const char*);
typedef struct _table_t
{
char* name;
const char* name;
char prefix;
char opcode;
asfunc * fp;

2
gas/read.c
View file

@ -754,7 +754,7 @@ in_bss (void)
MAX is the maximum number of characters to skip when doing the alignment,
or 0 if there is no maximum. */
static void
void
do_align (unsigned int n, char *fill, unsigned int len, unsigned int max)
{
if (now_seg == absolute_section || in_bss ())

2
gas/read.h
View file

@ -153,6 +153,8 @@ extern void generate_lineno_debug (void);
extern void s_abort (int) ATTRIBUTE_NORETURN;
extern void s_align_bytes (int arg);
extern void s_align_ptwo (int);
extern void do_align (unsigned int align, char *fill, unsigned int length,
unsigned int max);
extern void bss_alloc (symbolS *, addressT, unsigned);
extern offsetT parse_align (int);
extern symbolS *s_comm_internal (int, symbolS *(*) (int, symbolS *, addressT));

14
include/ChangeLog
View file

@ -1,3 +1,17 @@
2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
* opcode/h8300.h (struct h8_opcode): Likewise.
* opcode/hppa.h (struct pa_opcode): Likewise.
* opcode/msp430.h: Likewise.
* opcode/spu.h (struct spu_opcode): Likewise.
* opcode/tic30.h (struct _register): Likewise.
* opcode/tic4x.h (struct tic4x_register): Likewise.
(struct tic4x_cond): Likewise.
(struct tic4x_indirect): Likewise.
(struct tic4x_inst): Likewise.
* opcode/visium.h (struct reg_entry): Likewise.
2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
* arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.

4
include/opcode/dlx.h
View file

@ -143,7 +143,7 @@
struct dlx_opcode
{
/* Name of the instruction. */
char *name;
const char *name;
/* Opcode word. */
unsigned long opcode;
@ -161,7 +161,7 @@ struct dlx_opcode
D An immediate operand is in bits 0-25 of the instruction.
N No opperands needed, for nops.
P it can be a register or a 16 bit operand. */
char *args;
const char *args;
};
static const struct dlx_opcode dlx_opcodes[] =

2
include/opcode/h8300.h
View file

@ -261,7 +261,7 @@ struct h8_opcode
int how;
enum h8_model available;
int time;
char *name;
const char *name;
struct arg args;
struct code data;
};

2
include/opcode/hppa.h
View file

@ -42,7 +42,7 @@ struct pa_opcode
const char *name;
unsigned long int match; /* Bits that must be set... */
unsigned long int mask; /* ... in these bits. */
char *args;
const char *args;
enum pa_arch arch;
char flags;
};

2
include/opcode/msp430.h
View file

@ -45,7 +45,7 @@ struct msp430_operand_s
struct msp430_opcode_s
{
char *name;
const char *name;
int fmt;
int insn_opnumb;
int bin_opcode;

2
include/opcode/spu.h
View file

@ -83,7 +83,7 @@ struct spu_opcode
{
spu_iformat insn_type;
unsigned int opcode;
char *mnemonic;
const char *mnemonic;
int arg[5];
};

8
include/opcode/tic30.h
View file

@ -27,7 +27,7 @@
struct _register
{
char *name;
const char *name;
unsigned char opcode;
unsigned char regtype;
};
@ -135,7 +135,7 @@ static const reg *const tic30_regtab_end
#define PostIR0_Add_BitRev 0x19
typedef struct {
char *syntax;
const char *syntax;
unsigned char modfield;
unsigned char displacement;
} ind_addr_type;
@ -215,7 +215,7 @@ static const ind_addr_type *const tic30_indaddrtab_end
typedef struct _template
{
char *name;
const char *name;
unsigned int operands; /* how many operands */
unsigned int base_opcode; /* base_opcode is the fundamental opcode byte */
/* the bits in opcode_modifier are used to generate the final opcode from
@ -608,7 +608,7 @@ static const insn_template *const tic30_optab_end =
tic30_optab + sizeof(tic30_optab)/sizeof(tic30_optab[0]);
typedef struct {
char *name;
const char *name;
unsigned int operands_1;
unsigned int operands_2;
unsigned int base_opcode;

8
include/opcode/tic4x.h
View file

@ -58,7 +58,7 @@ c4x_reg_t;
struct tic4x_register
{
char * name;
const char * name;
unsigned long regno;
};
@ -131,7 +131,7 @@ const unsigned int tic4x_num_registers = (((sizeof tic4x_registers) / (sizeof ti
struct tic4x_cond
{
char * name;
const char * name;
unsigned long cond;
};
@ -171,7 +171,7 @@ const unsigned int tic4x_num_conds = (((sizeof tic4x_conds) / (sizeof tic4x_cond
struct tic4x_indirect
{
char * name;
const char * name;
unsigned long modn;
};
@ -223,7 +223,7 @@ const unsigned int tic4x_num_indirects = (((sizeof tic4x_indirects) / (sizeof ti
/* Instruction template. */
struct tic4x_inst
{
char * name;
const char * name;
unsigned long opcode;
unsigned long opmask;
char * args;

6
include/opcode/visium.h
View file

@ -100,7 +100,7 @@ enum visium_opcode_arch_val
struct reg_entry
{
char *name;
const char *name;
unsigned char code;
};
@ -164,7 +164,7 @@ static const struct reg_entry fp_reg_table[] ATTRIBUTE_UNUSED =
static const struct cc_entry
{
char *name;
const char *name;
int code;
} cc_table [] ATTRIBUTE_UNUSED =
{
@ -224,7 +224,7 @@ enum addressing_mode
static const struct opcode_entry
{
char *mnem;
const char *mnem;
enum addressing_mode mode;
unsigned code;
char flags;

8
opcodes/ChangeLog
View file

@ -1,3 +1,11 @@
2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* mcore-opc.h: Add const qualifiers.
* microblaze-opc.h (struct op_code_struct): Likewise.
* sh-opc.h: Likewise.
* tic4x-dis.c (tic4x_print_indirect): Likewise.
(tic4x_print_op): Likewise.
2016-03-02 Alan Modra <amodra@gmail.com>
* or1k-desc.h: Regenerate.

2
opcodes/mcore-opc.h
View file

@ -33,7 +33,7 @@ mcore_opclass;
typedef struct inst
{
char * name;
const char * name;
mcore_opclass opclass;
unsigned char transfer;
unsigned short inst;

2
opcodes/microblaze-opc.h
View file

@ -105,7 +105,7 @@
struct op_code_struct
{
char * name;
const char * name;
short inst_type; /* Registers and immediate values involved. */
short inst_offset_type; /* Immediate vals offset from PC? (= 1 for branches). */
short delay_slots; /* Info about delay slots needed after this instr. */

2
opcodes/sh-opc.h
View file

@ -371,7 +371,7 @@ SH4AL-dsp SH4A
typedef struct
{
char *name;
const char *name;
sh_arg_type arg[4];
sh_nibble_type nibbles[9];
unsigned int arch;

8
opcodes/tic4x-dis.c
View file

@ -120,7 +120,7 @@ tic4x_print_char (struct disassemble_info * info, char ch)
}
static int
tic4x_print_str (struct disassemble_info *info, char *str)
tic4x_print_str (struct disassemble_info *info, const char *str)
{
if (info != NULL)
(*info->fprintf_func) (info->stream, "%s", str);
@ -294,7 +294,7 @@ tic4x_print_indirect (struct disassemble_info *info,
unsigned int aregno;
unsigned int modn;
unsigned int disp;
char *a;
const char *a;
aregno = 0;
modn = 0;
@ -357,8 +357,8 @@ tic4x_print_op (struct disassemble_info *info,
unsigned long pc)
{
int val;
char *s;
char *parallel = NULL;
const char *s;
const char *parallel = NULL;
/* Print instruction name. */
s = p->name;