expand on a comment and reorg for 80 column screen some code in
assemble_two insns
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1 changed files with 9 additions and 5 deletions
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@ -1,5 +1,5 @@
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/* tc-m32r.c -- Assembler for the Mitsubishi M32R.
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Copyright (C) 1996, 1997, 1998 Free Software Foundation.
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Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation.
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This file is part of GAS, the GNU Assembler.
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@ -565,9 +565,10 @@ md_begin ()
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#define OPERAND_IS_COND_BIT(operand, indices, index) \
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(CGEN_OPERAND_INSTANCE_HW (operand)->type == HW_H_COND \
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|| (CGEN_OPERAND_INSTANCE_HW (operand)->type == HW_H_PSW) \
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|| (CGEN_OPERAND_INSTANCE_HW (operand)->type == HW_H_CR \
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&& (indices [index] == 0 || indices [index] == 1)))
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/* Returns true if an output of instruction 'a' is referenced by an operand
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of instruction 'b'. If 'check_outputs' is true then b's outputs are
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checked, otherwise its inputs are examined. */
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@ -637,7 +638,7 @@ first_writes_to_seconds_operands (a, b, check_outputs)
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}
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}
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return 0;
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return 0;
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}
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/* Returns true if the insn can (potentially) alter the program counter. */
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@ -747,7 +748,9 @@ assemble_two_insns (str, str2, parallel_p)
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* str2 = 0; /* Seperate the two instructions. */
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/* If there was a previous 16 bit insn, then fill the following 16 bit slot,
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so that the parallel instruction will start on a 32 bit boundary. */
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so that the parallel instruction will start on a 32 bit boundary.
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This is also done for the serial case (foo -> bar), relaxing doesn't
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affect insns written like this. */
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if (prev_insn.insn)
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fill_insn (0);
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@ -914,7 +917,8 @@ assemble_two_insns (str, str2, parallel_p)
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as_warn (_("%s: output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?"), str2);
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}
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if (!parallel_p || (errmsg = (char *) can_make_parallel (& first, & second)) == NULL)
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if (!parallel_p
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|| (errmsg = (char *) can_make_parallel (& first, & second)) == NULL)
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{
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/* Get the fixups for the first instruction. */
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gas_cgen_swap_fixups ();
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