2002-08-13 Michael Snyder <msnyder@redhat.com>
* mips-tdep.c (mips_o32o64_push_arguments): New function, cloned from mips_push_arguments, tuned for o32/o64 ABI. (mips_gdbarch_init): Set gdbarch_push_arguments to new func.
This commit is contained in:
Michael Snyder
parent
32f6f25d26
commit
ebafbe8353
2 changed files with 311 additions and 4 deletions
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@ -1,3 +1,9 @@
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2002-08-13 Michael Snyder <msnyder@redhat.com>
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* mips-tdep.c (mips_o32o64_push_arguments): New function,
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cloned from mips_push_arguments, tuned for o32/o64 ABI.
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(mips_gdbarch_init): Set gdbarch_push_arguments to new func.
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2002-08-13 Andrew Cagney <ac131313@redhat.com>
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* vax-tdep.c (vax_get_saved_register): Delete function.
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309
gdb/mips-tdep.c
309
gdb/mips-tdep.c
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@ -2591,7 +2591,6 @@ mips_push_arguments (int nargs,
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argreg, phex (regval, 4));
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write_register (argreg++, regval);
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}
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}
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else
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{
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@ -2644,7 +2643,7 @@ mips_push_arguments (int nargs,
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register are only written to memory. */
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while (len > 0)
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{
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/* Rememer if the argument was written to the stack. */
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/* Remember if the argument was written to the stack. */
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int stack_used_p = 0;
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int partial_len = len < MIPS_SAVED_REGSIZE ? len : MIPS_SAVED_REGSIZE;
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@ -2783,6 +2782,8 @@ mips_push_arguments (int nargs,
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return sp;
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}
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/* N32/N64 version of push_arguments. */
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CORE_ADDR
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mips_n32n64_push_arguments (int nargs,
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struct value **args,
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@ -3007,6 +3008,306 @@ mips_n32n64_push_arguments (int nargs,
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return sp;
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}
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/* O32/O64 version of push_arguments. */
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CORE_ADDR
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mips_o32o64_push_arguments (int nargs,
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struct value **args,
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CORE_ADDR sp,
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int struct_return,
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CORE_ADDR struct_addr)
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{
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int argreg;
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int float_argreg;
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int argnum;
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int len = 0;
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int stack_offset = 0;
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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/* First ensure that the stack and structure return address (if any)
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are properly aligned. The stack has to be at least 64-bit
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aligned even on 32-bit machines, because doubles must be 64-bit
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aligned. For n32 and n64, stack frames need to be 128-bit
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aligned, so we round to this widest known alignment. */
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sp = ROUND_DOWN (sp, 16);
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struct_addr = ROUND_DOWN (struct_addr, 16);
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/* Now make space on the stack for the args. */
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for (argnum = 0; argnum < nargs; argnum++)
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len += ROUND_UP (TYPE_LENGTH (VALUE_TYPE (args[argnum])),
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MIPS_STACK_ARGSIZE);
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sp -= ROUND_UP (len, 16);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog,
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"mips_o32o64_push_arguments: sp=0x%s allocated %d\n",
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paddr_nz (sp), ROUND_UP (len, 16));
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/* Initialize the integer and float register pointers. */
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argreg = A0_REGNUM;
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float_argreg = FPA0_REGNUM;
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/* the struct_return pointer occupies the first parameter-passing reg */
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if (struct_return)
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{
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog,
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"mips_o32o64_push_arguments: struct_return reg=%d 0x%s\n",
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argreg, paddr_nz (struct_addr));
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write_register (argreg++, struct_addr);
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stack_offset += MIPS_STACK_ARGSIZE;
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}
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/* Now load as many as possible of the first arguments into
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registers, and push the rest onto the stack. Loop thru args
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from first to last. */
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for (argnum = 0; argnum < nargs; argnum++)
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{
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char *val;
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char *valbuf = alloca (MAX_REGISTER_RAW_SIZE);
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struct value *arg = args[argnum];
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struct type *arg_type = check_typedef (VALUE_TYPE (arg));
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int len = TYPE_LENGTH (arg_type);
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enum type_code typecode = TYPE_CODE (arg_type);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog,
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"mips_o32o64_push_arguments: %d len=%d type=%d",
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argnum + 1, len, (int) typecode);
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val = (char *) VALUE_CONTENTS (arg);
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/* 32-bit ABIs always start floating point arguments in an
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even-numbered floating point register. Round the FP register
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up before the check to see if there are any FP registers
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left. O32/O64 targets also pass the FP in the integer
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registers so also round up normal registers. */
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if (!FP_REGISTER_DOUBLE
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&& fp_register_arg_p (typecode, arg_type))
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{
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if ((float_argreg & 1))
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float_argreg++;
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}
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/* Floating point arguments passed in registers have to be
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treated specially. On 32-bit architectures, doubles
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are passed in register pairs; the even register gets
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the low word, and the odd register gets the high word.
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On O32/O64, the first two floating point arguments are
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also copied to general registers, because MIPS16 functions
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don't use float registers for arguments. This duplication of
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arguments in general registers can't hurt non-MIPS16 functions
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because those registers are normally skipped. */
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if (fp_register_arg_p (typecode, arg_type)
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&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
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{
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if (!FP_REGISTER_DOUBLE && len == 8)
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{
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int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
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unsigned long regval;
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/* Write the low word of the double to the even register(s). */
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regval = extract_unsigned_integer (val + low_offset, 4);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, 4));
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write_register (float_argreg++, regval);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, 4));
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write_register (argreg++, regval);
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/* Write the high word of the double to the odd register(s). */
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regval = extract_unsigned_integer (val + 4 - low_offset, 4);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, 4));
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write_register (float_argreg++, regval);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, 4));
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write_register (argreg++, regval);
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}
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else
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{
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/* This is a floating point value that fits entirely
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in a single register. */
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/* On 32 bit ABI's the float_argreg is further adjusted
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above to ensure that it is even register aligned. */
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LONGEST regval = extract_unsigned_integer (val, len);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, len));
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write_register (float_argreg++, regval);
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/* CAGNEY: 32 bit MIPS ABI's always reserve two FP
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registers for each argument. The below is (my
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guess) to ensure that the corresponding integer
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register has reserved the same space. */
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, len));
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write_register (argreg, regval);
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argreg += FP_REGISTER_DOUBLE ? 1 : 2;
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}
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/* Reserve space for the FP register. */
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stack_offset += ROUND_UP (len, MIPS_STACK_ARGSIZE);
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}
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else
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{
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/* Copy the argument to general registers or the stack in
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register-sized pieces. Large arguments are split between
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registers and stack. */
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/* Note: structs whose size is not a multiple of MIPS_REGSIZE
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are treated specially: Irix cc passes them in registers
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where gcc sometimes puts them on the stack. For maximum
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compatibility, we will put them in both places. */
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int odd_sized_struct = ((len > MIPS_SAVED_REGSIZE) &&
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(len % MIPS_SAVED_REGSIZE != 0));
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/* Structures should be aligned to eight bytes (even arg registers)
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on MIPS_ABI_O32, if their first member has double precision. */
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if (MIPS_SAVED_REGSIZE < 8
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&& mips_type_needs_double_align (arg_type))
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{
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if ((argreg & 1))
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argreg++;
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}
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/* Note: Floating-point values that didn't fit into an FP
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register are only written to memory. */
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while (len > 0)
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{
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/* Remember if the argument was written to the stack. */
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int stack_used_p = 0;
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int partial_len =
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len < MIPS_SAVED_REGSIZE ? len : MIPS_SAVED_REGSIZE;
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " -- partial=%d",
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partial_len);
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/* Write this portion of the argument to the stack. */
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if (argreg > MIPS_LAST_ARG_REGNUM
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|| odd_sized_struct
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|| fp_register_arg_p (typecode, arg_type))
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{
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/* Should shorter than int integer values be
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promoted to int before being stored? */
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int longword_offset = 0;
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CORE_ADDR addr;
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stack_used_p = 1;
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if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
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{
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if (MIPS_STACK_ARGSIZE == 8 &&
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(typecode == TYPE_CODE_INT ||
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typecode == TYPE_CODE_PTR ||
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typecode == TYPE_CODE_FLT) && len <= 4)
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longword_offset = MIPS_STACK_ARGSIZE - len;
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}
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if (mips_debug)
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{
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fprintf_unfiltered (gdb_stdlog, " - stack_offset=0x%s",
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paddr_nz (stack_offset));
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fprintf_unfiltered (gdb_stdlog, " longword_offset=0x%s",
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paddr_nz (longword_offset));
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}
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addr = sp + stack_offset + longword_offset;
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if (mips_debug)
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{
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int i;
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fprintf_unfiltered (gdb_stdlog, " @0x%s ",
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paddr_nz (addr));
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for (i = 0; i < partial_len; i++)
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{
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fprintf_unfiltered (gdb_stdlog, "%02x",
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val[i] & 0xff);
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}
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}
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write_memory (addr, val, partial_len);
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}
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/* Note!!! This is NOT an else clause. Odd sized
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structs may go thru BOTH paths. Floating point
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arguments will not. */
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/* Write this portion of the argument to a general
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purpose register. */
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if (argreg <= MIPS_LAST_ARG_REGNUM
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&& !fp_register_arg_p (typecode, arg_type))
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{
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LONGEST regval = extract_signed_integer (val, partial_len);
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/* Value may need to be sign extended, because
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MIPS_REGSIZE != MIPS_SAVED_REGSIZE. */
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/* A non-floating-point argument being passed in a
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general register. If a struct or union, and if
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the remaining length is smaller than the register
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size, we have to adjust the register value on
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big endian targets.
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It does not seem to be necessary to do the
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same for integral types.
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Also don't do this adjustment on O64 binaries.
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cagney/2001-07-23: gdb/179: Also, GCC, when
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outputting LE O32 with sizeof (struct) <
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MIPS_SAVED_REGSIZE, generates a left shift as
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part of storing the argument in a register a
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register (the left shift isn't generated when
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sizeof (struct) >= MIPS_SAVED_REGSIZE). Since it
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is quite possible that this is GCC contradicting
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the LE/O32 ABI, GDB has not been adjusted to
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accommodate this. Either someone needs to
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demonstrate that the LE/O32 ABI specifies such a
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left shift OR this new ABI gets identified as
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such and GDB gets tweaked accordingly. */
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if (MIPS_SAVED_REGSIZE < 8
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&& TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
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&& partial_len < MIPS_SAVED_REGSIZE
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&& (typecode == TYPE_CODE_STRUCT ||
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typecode == TYPE_CODE_UNION))
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regval <<= ((MIPS_SAVED_REGSIZE - partial_len) *
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TARGET_CHAR_BIT);
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if (mips_debug)
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fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
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argreg,
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phex (regval, MIPS_SAVED_REGSIZE));
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write_register (argreg, regval);
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argreg++;
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/* Prevent subsequent floating point arguments from
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being passed in floating point registers. */
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float_argreg = MIPS_LAST_FP_ARG_REGNUM + 1;
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}
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len -= partial_len;
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val += partial_len;
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/* Compute the the offset into the stack at which we
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will copy the next parameter.
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In older ABIs, the caller reserved space for
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registers that contained arguments. This was loosely
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refered to as their "home". Consequently, space is
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always allocated. */
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stack_offset += ROUND_UP (partial_len, MIPS_STACK_ARGSIZE);
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}
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}
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, "\n");
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}
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/* Return adjusted stack pointer. */
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return sp;
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}
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CORE_ADDR
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mips_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
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{
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@ -4775,7 +5076,7 @@ mips_gdbarch_init (struct gdbarch_info info,
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switch (mips_abi)
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{
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case MIPS_ABI_O32:
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set_gdbarch_push_arguments (gdbarch, mips_push_arguments);
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set_gdbarch_push_arguments (gdbarch, mips_o32o64_push_arguments);
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tdep->mips_default_saved_regsize = 4;
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tdep->mips_default_stack_argsize = 4;
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tdep->mips_fp_register_double = 0;
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@ -4793,7 +5094,7 @@ mips_gdbarch_init (struct gdbarch_info info,
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mips_o32_use_struct_convention);
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break;
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case MIPS_ABI_O64:
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set_gdbarch_push_arguments (gdbarch, mips_push_arguments);
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set_gdbarch_push_arguments (gdbarch, mips_o32o64_push_arguments);
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tdep->mips_default_saved_regsize = 8;
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tdep->mips_default_stack_argsize = 8;
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tdep->mips_fp_register_double = 1;
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