From e1ec24c6f31afae5a5175abecdcd9fd4d7893c4b Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Wed, 1 Jul 2009 14:48:26 +0000 Subject: [PATCH] PR 10072 * elf32-arm.c (elf32_arm_final_link_relocate): Add code to handle to R_ARM_THM_PC8 relocation. --- bfd/ChangeLog | 6 ++++++ bfd/elf32-arm.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 6b00d40bd6..aca27d5761 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,9 @@ +2009-07-01 Nick Clifton + + PR 10072 + * elf32-arm.c (elf32_arm_final_link_relocate): Add code to handle + to R_ARM_THM_PC8 relocation. + 2009-06-29 Nick Clifton * elf-m10300.c (mn10300_elf_relax_section): Allow for the diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c index cd40eefbf5..2d53304e4e 100644 --- a/bfd/elf32-arm.c +++ b/bfd/elf32-arm.c @@ -7178,6 +7178,40 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto, return bfd_reloc_ok; } + case R_ARM_THM_PC8: + /* PR 10073: This reloc is not generated by the GNU toolchain, + but it is supported for compatibility with third party libraries + generated by other compilers, specifically the ARM/IAR. */ + { + bfd_vma insn; + bfd_signed_vma relocation; + + insn = bfd_get_16 (input_bfd, hit_data); + + if (globals->use_rel) + addend = (insn & 0x00ff) << 2; + + relocation = value + addend; + relocation -= (input_section->output_section->vma + + input_section->output_offset + + rel->r_offset); + + value = abs (relocation); + + /* We do not check for overflow of this reloc. Although strictly + speaking this is incorrect, it appears to be necessary in order + to work with IAR generated relocs. Since GCC and GAS do not + generate R_ARM_THM_PC8 relocs, the lack of a check should not be + a problem for them. */ + value &= 0x3fc; + + insn = (insn & 0xff00) | (value >> 2); + + bfd_put_16 (input_bfd, insn, hit_data); + + return bfd_reloc_ok; + } + case R_ARM_THM_PC12: /* Corresponds to: ldr.w reg, [pc, #offset]. */ {