2003-05-31 Andrew Cagney <cagney@redhat.com>
* mips-tdep.c (set_reg_offset): Add saved_regs parameter. Add forward declaration. (mips16_heuristic_proc_desc): Pass temp_saved_regs. (mips16_heuristic_proc_desc): Pass temp_saved_regs. (mips_find_saved_regs): Use set_reg_offset. (mips_frame_init_saved_regs): Delete function. (mips_pop_frame): Call mips_find_saved_regs instead of DEPRECATED_FRAME_INIT_SAVED_REGS.
This commit is contained in:
parent
e8898e69f1
commit
e0f7ec5940
2 changed files with 144 additions and 131 deletions
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@ -1,3 +1,14 @@
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2003-05-31 Andrew Cagney <cagney@redhat.com>
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* mips-tdep.c (set_reg_offset): Add saved_regs parameter. Add
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forward declaration.
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(mips16_heuristic_proc_desc): Pass temp_saved_regs.
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(mips16_heuristic_proc_desc): Pass temp_saved_regs.
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(mips_find_saved_regs): Use set_reg_offset.
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(mips_frame_init_saved_regs): Delete function.
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(mips_pop_frame): Call mips_find_saved_regs instead of
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DEPRECATED_FRAME_INIT_SAVED_REGS.
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2003-05-31 Andrew Cagney <cagney@redhat.com>
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* mips-tdep.c (mips_gdbarch_init): Do not set
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228
gdb/mips-tdep.c
228
gdb/mips-tdep.c
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@ -48,6 +48,8 @@
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#include "elf-bfd.h"
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#include "symcat.h"
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static void set_reg_offset (CORE_ADDR *saved_regs, int regnum, CORE_ADDR off);
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/* A useful bit in the CP0 status register (PS_REGNUM). */
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/* This bit is set if we are emulating 32-bit FPRs on a 64-bit chip. */
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#define ST0_FR (1 << 26)
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@ -1423,37 +1425,36 @@ mips_next_pc (CORE_ADDR pc)
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return mips32_next_pc (pc);
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}
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/* Guaranteed to set fci->saved_regs to some values (it never leaves it
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NULL).
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Note: kevinb/2002-08-09: The only caller of this function is (and
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should remain) mips_frame_init_saved_regs(). In fact,
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aside from calling mips_find_saved_regs(), mips_frame_init_saved_regs()
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does nothing more than set frame->saved_regs[SP_REGNUM]. These two
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functions should really be combined and now that there is only one
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caller, it should be straightforward. (Watch out for multiple returns
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though.) */
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/* Set up the 'saved_regs' array. This is a data structure containing
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the addresses on the stack where each register has been saved, for
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each stack frame. Registers that have not been saved will have
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zero here. The stack pointer register is special: rather than the
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address where the stack register has been saved,
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saved_regs[SP_REGNUM] will have the actual value of the previous
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frame's stack register. */
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static void
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mips_find_saved_regs (struct frame_info *fci)
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{
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int ireg;
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CORE_ADDR reg_position;
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/* r0 bit means kernel trap */
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int kernel_trap;
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/* What registers have been saved? Bitmasks. */
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unsigned long gen_mask, float_mask;
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mips_extra_func_info_t proc_desc;
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t_inst inst;
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CORE_ADDR *saved_regs;
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frame_saved_regs_zalloc (fci);
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if (get_frame_saved_regs (fci) != NULL)
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return;
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saved_regs = frame_saved_regs_zalloc (fci);
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/* If it is the frame for sigtramp, the saved registers are located
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in a sigcontext structure somewhere on the stack.
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If the stack layout for sigtramp changes we might have to change these
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in a sigcontext structure somewhere on the stack. If the stack
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layout for sigtramp changes we might have to change these
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constants and the companion fixup_sigtramp in mdebugread.c */
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#ifndef SIGFRAME_BASE
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/* To satisfy alignment restrictions, sigcontext is located 4 bytes
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/* To satisfy alignment restrictions, sigcontext is located 4 bytes
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above the sigtramp frame. */
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#define SIGFRAME_BASE MIPS_REGSIZE
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/* FIXME! Are these correct?? */
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@ -1463,61 +1464,65 @@ mips_find_saved_regs (struct frame_info *fci)
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(SIGFRAME_REGSAVE_OFF + MIPS_NUMREGS * MIPS_REGSIZE + 3 * MIPS_REGSIZE)
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#endif
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#ifndef SIGFRAME_REG_SIZE
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/* FIXME! Is this correct?? */
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/* FIXME! Is this correct?? */
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#define SIGFRAME_REG_SIZE MIPS_REGSIZE
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#endif
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if ((get_frame_type (fci) == SIGTRAMP_FRAME))
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{
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for (ireg = 0; ireg < MIPS_NUMREGS; ireg++)
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{
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reg_position = get_frame_base (fci) + SIGFRAME_REGSAVE_OFF
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+ ireg * SIGFRAME_REG_SIZE;
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get_frame_saved_regs (fci)[ireg] = reg_position;
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CORE_ADDR reg_position = (get_frame_base (fci) + SIGFRAME_REGSAVE_OFF
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+ ireg * SIGFRAME_REG_SIZE);
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set_reg_offset (saved_regs, ireg, reg_position);
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}
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for (ireg = 0; ireg < MIPS_NUMREGS; ireg++)
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{
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reg_position = get_frame_base (fci) + SIGFRAME_FPREGSAVE_OFF
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+ ireg * SIGFRAME_REG_SIZE;
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get_frame_saved_regs (fci)[FP0_REGNUM + ireg] = reg_position;
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CORE_ADDR reg_position = (get_frame_base (fci)
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+ SIGFRAME_FPREGSAVE_OFF
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+ ireg * SIGFRAME_REG_SIZE);
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set_reg_offset (saved_regs, FP0_REGNUM + ireg, reg_position);
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}
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get_frame_saved_regs (fci)[PC_REGNUM] = get_frame_base (fci) + SIGFRAME_PC_OFF;
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set_reg_offset (saved_regs, PC_REGNUM, get_frame_base (fci) + SIGFRAME_PC_OFF);
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/* SP_REGNUM, contains the value and not the address. */
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set_reg_offset (saved_regs, SP_REGNUM, get_frame_base (fci));
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return;
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}
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proc_desc = get_frame_extra_info (fci)->proc_desc;
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if (proc_desc == NULL)
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/* I'm not sure how/whether this can happen. Normally when we can't
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find a proc_desc, we "synthesize" one using heuristic_proc_desc
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and set the saved_regs right away. */
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/* I'm not sure how/whether this can happen. Normally when we
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can't find a proc_desc, we "synthesize" one using
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heuristic_proc_desc and set the saved_regs right away. */
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return;
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kernel_trap = PROC_REG_MASK (proc_desc) & 1;
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gen_mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK (proc_desc);
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float_mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK (proc_desc);
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if ( /* In any frame other than the innermost or a frame interrupted by
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a signal, we assume that all registers have been saved.
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This assumes that all register saves in a function happen before
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the first function call. */
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if (/* In any frame other than the innermost or a frame interrupted
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by a signal, we assume that all registers have been saved.
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This assumes that all register saves in a function happen
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before the first function call. */
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(get_next_frame (fci) == NULL
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|| (get_frame_type (get_next_frame (fci)) == SIGTRAMP_FRAME))
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/* In a dummy frame we know exactly where things are saved. */
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&& !PROC_DESC_IS_DUMMY (proc_desc)
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/* Don't bother unless we are inside a function prologue. Outside the
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prologue, we know where everything is. */
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/* Don't bother unless we are inside a function prologue.
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Outside the prologue, we know where everything is. */
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&& in_prologue (get_frame_pc (fci), PROC_LOW_ADDR (proc_desc))
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/* Not sure exactly what kernel_trap means, but if it means
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the kernel saves the registers without a prologue doing it,
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we better not examine the prologue to see whether registers
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/* Not sure exactly what kernel_trap means, but if it means the
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kernel saves the registers without a prologue doing it, we
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better not examine the prologue to see whether registers
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have been saved yet. */
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&& !kernel_trap)
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{
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/* We need to figure out whether the registers that the proc_desc
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claims are saved have been saved yet. */
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/* We need to figure out whether the registers that the
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proc_desc claims are saved have been saved yet. */
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CORE_ADDR addr;
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addr = PROC_LOW_ADDR (proc_desc);
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instlen = pc_is_mips16 (addr) ? MIPS16_INSTLEN : MIPS_INSTLEN;
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/* Scan through this function's instructions preceding the current
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PC, and look for those that save registers. */
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/* Scan through this function's instructions preceding the
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current PC, and look for those that save registers. */
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while (addr < get_frame_pc (fci))
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{
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inst = mips_fetch_instruction (addr);
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float_mask = float_save_found;
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}
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/* Fill in the offsets for the registers which gen_mask says
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were saved. */
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reg_position = get_frame_base (fci) + PROC_REG_OFFSET (proc_desc);
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/* Fill in the offsets for the registers which gen_mask says were
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saved. */
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{
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CORE_ADDR reg_position = (get_frame_base (fci)
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+ PROC_REG_OFFSET (proc_desc));
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for (ireg = MIPS_NUMREGS - 1; gen_mask; --ireg, gen_mask <<= 1)
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if (gen_mask & 0x80000000)
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{
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get_frame_saved_regs (fci)[ireg] = reg_position;
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set_reg_offset (saved_regs, ireg, reg_position);
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reg_position -= MIPS_SAVED_REGSIZE;
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}
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}
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/* The MIPS16 entry instruction saves $s0 and $s1 in the reverse order
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of that normally used by gcc. Therefore, we have to fetch the first
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instruction of the function, and if it's an entry instruction that
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saves $s0 or $s1, correct their saved addresses. */
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/* The MIPS16 entry instruction saves $s0 and $s1 in the reverse
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order of that normally used by gcc. Therefore, we have to fetch
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the first instruction of the function, and if it's an entry
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instruction that saves $s0 or $s1, correct their saved addresses. */
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if (pc_is_mips16 (PROC_LOW_ADDR (proc_desc)))
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{
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inst = mips_fetch_instruction (PROC_LOW_ADDR (proc_desc));
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if ((inst & 0xf81f) == 0xe809 && (inst & 0x700) != 0x700) /* entry */
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if ((inst & 0xf81f) == 0xe809 && (inst & 0x700) != 0x700)
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/* entry */
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{
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int reg;
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int sreg_count = (inst >> 6) & 3;
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/* Check if the ra register was pushed on the stack. */
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reg_position = get_frame_base (fci) + PROC_REG_OFFSET (proc_desc);
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CORE_ADDR reg_position = (get_frame_base (fci)
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+ PROC_REG_OFFSET (proc_desc));
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if (inst & 0x20)
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reg_position -= MIPS_SAVED_REGSIZE;
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/* Check if the s0 and s1 registers were pushed on the stack. */
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/* Check if the s0 and s1 registers were pushed on the
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stack. */
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for (reg = 16; reg < sreg_count + 16; reg++)
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{
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get_frame_saved_regs (fci)[reg] = reg_position;
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set_reg_offset (saved_regs, reg, reg_position);
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reg_position -= MIPS_SAVED_REGSIZE;
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}
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}
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}
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/* Fill in the offsets for the registers which float_mask says
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were saved. */
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reg_position = get_frame_base (fci) + PROC_FREG_OFFSET (proc_desc);
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/* Fill in the offsets for the registers which float_mask says were
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saved. */
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{
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CORE_ADDR reg_position = (get_frame_base (fci)
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+ PROC_FREG_OFFSET (proc_desc));
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/* Apparently, the freg_offset gives the offset to the first 64 bit
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saved.
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/* Apparently, the freg_offset gives the offset to the first 64
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bit saved.
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When the ABI specifies 64 bit saved registers, the FREG_OFFSET
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designates the first saved 64 bit register.
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When the ABI specifies 32 bit saved registers, the ``64 bit saved
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DOUBLE'' consists of two adjacent 32 bit registers, Hence
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FREG_OFFSET, designates the address of the lower register of the
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register pair. Adjust the offset so that it designates the upper
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register of the pair -- i.e., the address of the first saved 32
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bit register. */
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When the ABI specifies 32 bit saved registers, the ``64 bit
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saved DOUBLE'' consists of two adjacent 32 bit registers, Hence
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FREG_OFFSET, designates the address of the lower register of
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the register pair. Adjust the offset so that it designates the
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upper register of the pair -- i.e., the address of the first
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saved 32 bit register. */
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if (MIPS_SAVED_REGSIZE == 4)
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reg_position += MIPS_SAVED_REGSIZE;
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/* Fill in the offsets for the float registers which float_mask says
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were saved. */
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/* Fill in the offsets for the float registers which float_mask
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says were saved. */
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for (ireg = MIPS_NUMREGS - 1; float_mask; --ireg, float_mask <<= 1)
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if (float_mask & 0x80000000)
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{
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get_frame_saved_regs (fci)[FP0_REGNUM + ireg] = reg_position;
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set_reg_offset (saved_regs, FP0_REGNUM + ireg, reg_position);
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reg_position -= MIPS_SAVED_REGSIZE;
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}
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get_frame_saved_regs (fci)[PC_REGNUM] = get_frame_saved_regs (fci)[RA_REGNUM];
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}
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/* Set up the 'saved_regs' array. This is a data structure containing
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the addresses on the stack where each register has been saved, for
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each stack frame. Registers that have not been saved will have
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zero here. The stack pointer register is special: rather than the
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address where the stack register has been saved, saved_regs[SP_REGNUM]
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will have the actual value of the previous frame's stack register. */
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static void
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mips_frame_init_saved_regs (struct frame_info *frame)
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{
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if (get_frame_saved_regs (frame) == NULL)
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{
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mips_find_saved_regs (frame);
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set_reg_offset (saved_regs, PC_REGNUM, saved_regs[RA_REGNUM]);
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}
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get_frame_saved_regs (frame)[SP_REGNUM] = get_frame_base (frame);
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/* SP_REGNUM, contains the value and not the address. */
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set_reg_offset (saved_regs, SP_REGNUM, get_frame_base (fci));
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}
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static CORE_ADDR
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@ -1782,16 +1782,16 @@ static struct mips_extra_func_info temp_proc_desc;
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frames. */
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static CORE_ADDR *temp_saved_regs;
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/* Set a register's saved stack address in temp_saved_regs. If an address
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has already been set for this register, do nothing; this way we will
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only recognize the first save of a given register in a function prologue.
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This is a helper function for mips{16,32}_heuristic_proc_desc. */
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/* Set a register's saved stack address in temp_saved_regs. If an
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address has already been set for this register, do nothing; this
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way we will only recognize the first save of a given register in a
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function prologue. */
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static void
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set_reg_offset (int regno, CORE_ADDR offset)
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set_reg_offset (CORE_ADDR *saved_regs, int regno, CORE_ADDR offset)
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{
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if (temp_saved_regs[regno] == 0)
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temp_saved_regs[regno] = offset;
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if (saved_regs[regno] == 0)
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saved_regs[regno] = offset;
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}
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offset = mips16_get_imm (prev_inst, inst, 8, 4, 0);
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reg = mips16_to_32_reg[(inst & 0x700) >> 8];
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PROC_REG_MASK (&temp_proc_desc) |= (1 << reg);
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set_reg_offset (reg, sp + offset);
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set_reg_offset (temp_saved_regs, reg, sp + offset);
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}
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else if ((inst & 0xff00) == 0xf900) /* sd reg,n($sp) */
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{
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offset = mips16_get_imm (prev_inst, inst, 5, 8, 0);
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reg = mips16_to_32_reg[(inst & 0xe0) >> 5];
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PROC_REG_MASK (&temp_proc_desc) |= (1 << reg);
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set_reg_offset (reg, sp + offset);
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set_reg_offset (temp_saved_regs, reg, sp + offset);
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}
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else if ((inst & 0xff00) == 0x6200) /* sw $ra,n($sp) */
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{
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offset = mips16_get_imm (prev_inst, inst, 8, 4, 0);
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PROC_REG_MASK (&temp_proc_desc) |= (1 << RA_REGNUM);
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set_reg_offset (RA_REGNUM, sp + offset);
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set_reg_offset (temp_saved_regs, RA_REGNUM, sp + offset);
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}
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else if ((inst & 0xff00) == 0xfa00) /* sd $ra,n($sp) */
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{
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offset = mips16_get_imm (prev_inst, inst, 8, 8, 0);
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PROC_REG_MASK (&temp_proc_desc) |= (1 << RA_REGNUM);
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set_reg_offset (RA_REGNUM, sp + offset);
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set_reg_offset (temp_saved_regs, RA_REGNUM, sp + offset);
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}
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else if (inst == 0x673d) /* move $s1, $sp */
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{
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@ -2025,14 +2025,14 @@ mips16_heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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offset = mips16_get_imm (prev_inst, inst, 5, 4, 0);
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reg = mips16_to_32_reg[(inst & 0xe0) >> 5];
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PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
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set_reg_offset (reg, frame_addr + offset);
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set_reg_offset (temp_saved_regs, reg, frame_addr + offset);
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}
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else if ((inst & 0xFF00) == 0x7900) /* sd reg,offset($s1) */
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{
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offset = mips16_get_imm (prev_inst, inst, 5, 8, 0);
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reg = mips16_to_32_reg[(inst & 0xe0) >> 5];
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PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
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set_reg_offset (reg, frame_addr + offset);
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set_reg_offset (temp_saved_regs, reg, frame_addr + offset);
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}
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else if ((inst & 0xf81f) == 0xe809 && (inst & 0x700) != 0x700) /* entry */
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entry_inst = inst; /* save for later processing */
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@ -2062,7 +2062,7 @@ mips16_heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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for (reg = 4, offset = 0; reg < areg_count + 4; reg++)
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{
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PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
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set_reg_offset (reg, sp + offset);
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set_reg_offset (temp_saved_regs, reg, sp + offset);
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offset += MIPS_SAVED_REGSIZE;
|
||||
}
|
||||
|
||||
|
@ -2071,7 +2071,7 @@ mips16_heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
|
|||
if (entry_inst & 0x20)
|
||||
{
|
||||
PROC_REG_MASK (&temp_proc_desc) |= 1 << RA_REGNUM;
|
||||
set_reg_offset (RA_REGNUM, sp + offset);
|
||||
set_reg_offset (temp_saved_regs, RA_REGNUM, sp + offset);
|
||||
offset -= MIPS_SAVED_REGSIZE;
|
||||
}
|
||||
|
||||
|
@ -2079,7 +2079,7 @@ mips16_heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
|
|||
for (reg = 16; reg < sreg_count + 16; reg++)
|
||||
{
|
||||
PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
|
||||
set_reg_offset (reg, sp + offset);
|
||||
set_reg_offset (temp_saved_regs, reg, sp + offset);
|
||||
offset -= MIPS_SAVED_REGSIZE;
|
||||
}
|
||||
}
|
||||
|
@ -2124,7 +2124,7 @@ restart:
|
|||
else if ((high_word & 0xFFE0) == 0xafa0) /* sw reg,offset($sp) */
|
||||
{
|
||||
PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
|
||||
set_reg_offset (reg, sp + low_word);
|
||||
set_reg_offset (temp_saved_regs, reg, sp + low_word);
|
||||
}
|
||||
else if ((high_word & 0xFFE0) == 0xffa0) /* sd reg,offset($sp) */
|
||||
{
|
||||
|
@ -2132,7 +2132,7 @@ restart:
|
|||
but the register size used is only 32 bits. Make the address
|
||||
for the saved register point to the lower 32 bits. */
|
||||
PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
|
||||
set_reg_offset (reg, sp + low_word + 8 - MIPS_REGSIZE);
|
||||
set_reg_offset (temp_saved_regs, reg, sp + low_word + 8 - MIPS_REGSIZE);
|
||||
}
|
||||
else if (high_word == 0x27be) /* addiu $30,$sp,size */
|
||||
{
|
||||
|
@ -2182,7 +2182,7 @@ restart:
|
|||
else if ((high_word & 0xFFE0) == 0xafc0) /* sw reg,offset($30) */
|
||||
{
|
||||
PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
|
||||
set_reg_offset (reg, frame_addr + low_word);
|
||||
set_reg_offset (temp_saved_regs, reg, frame_addr + low_word);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -2581,15 +2581,18 @@ mips_init_extra_frame_info (int fromleaf, struct frame_info *fci)
|
|||
if (!PC_IN_SIGTRAMP (get_frame_pc (fci), name))
|
||||
{
|
||||
frame_saved_regs_zalloc (fci);
|
||||
memcpy (get_frame_saved_regs (fci), temp_saved_regs, SIZEOF_FRAME_SAVED_REGS);
|
||||
get_frame_saved_regs (fci)[PC_REGNUM]
|
||||
= get_frame_saved_regs (fci)[RA_REGNUM];
|
||||
/* Set value of previous frame's stack pointer. Remember that
|
||||
saved_regs[SP_REGNUM] is special in that it contains the
|
||||
value of the stack pointer register. The other saved_regs
|
||||
values are addresses (in the inferior) at which a given
|
||||
register's value may be found. */
|
||||
get_frame_saved_regs (fci)[SP_REGNUM] = get_frame_base (fci);
|
||||
/* Set value of previous frame's stack pointer.
|
||||
Remember that saved_regs[SP_REGNUM] is special in
|
||||
that it contains the value of the stack pointer
|
||||
register. The other saved_regs values are addresses
|
||||
(in the inferior) at which a given register's value
|
||||
may be found. */
|
||||
set_reg_offset (temp_saved_regs, SP_REGNUM,
|
||||
get_frame_base (fci));
|
||||
set_reg_offset (temp_saved_regs, PC_REGNUM,
|
||||
temp_saved_regs[RA_REGNUM]);
|
||||
memcpy (get_frame_saved_regs (fci), temp_saved_regs,
|
||||
SIZEOF_FRAME_SAVED_REGS);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -3807,8 +3810,7 @@ mips_pop_frame (void)
|
|||
|
||||
proc_desc = get_frame_extra_info (frame)->proc_desc;
|
||||
write_register (PC_REGNUM, DEPRECATED_FRAME_SAVED_PC (frame));
|
||||
if (get_frame_saved_regs (frame) == NULL)
|
||||
DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
|
||||
mips_find_saved_regs (frame);
|
||||
for (regnum = 0; regnum < NUM_REGS; regnum++)
|
||||
if (regnum != SP_REGNUM && regnum != PC_REGNUM
|
||||
&& get_frame_saved_regs (frame)[regnum])
|
||||
|
@ -5922,7 +5924,7 @@ mips_gdbarch_init (struct gdbarch_info info,
|
|||
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mips_dwarf_dwarf2_ecoff_reg_to_regnum);
|
||||
|
||||
/* Initialize a frame */
|
||||
set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, mips_frame_init_saved_regs);
|
||||
set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, mips_find_saved_regs);
|
||||
set_gdbarch_deprecated_init_extra_frame_info (gdbarch, mips_init_extra_frame_info);
|
||||
|
||||
/* MIPS version of CALL_DUMMY */
|
||||
|
|
Loading…
Reference in a new issue