* libhppa.h (re_assemble_3, re_assemble_12, re_assemble_16,
re_assemble_17, re_assemble_21, re_assemble_22): Don't mask insn. (hppa_rebuild_insn): Mask immediate bits here instead. * elf-hppa.h (elf_hppa_relocate_insn): Mask here too.
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commit
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3 changed files with 20 additions and 13 deletions
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@ -1,3 +1,10 @@
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2000-05-18 Alan Modra <alan@linuxcare.com.au>
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* libhppa.h (re_assemble_3, re_assemble_12, re_assemble_16,
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re_assemble_17, re_assemble_21, re_assemble_22): Don't mask insn.
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(hppa_rebuild_insn): Mask immediate bits here instead.
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* elf-hppa.h (elf_hppa_relocate_insn): Mask here too.
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2000-05-18 Momchil Velikov <velco@fadata.bg>
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* elflink.h (elf_bfd_final_link, elf_link_input_bfd): When emiting
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@ -1965,7 +1965,7 @@ elf_hppa_relocate_insn (insn, sym_value, r_type)
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the "B" instruction. */
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case R_PARISC_PCREL22F:
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case R_PARISC_PCREL22C:
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return re_assemble_22 (insn, sym_value);
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return re_assemble_22 (insn & ~ 0x3ff1ffd, sym_value);
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/* This is any 17bit branch. In PA2.0 syntax it also corresponds to
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the "B" instruction as well as BE. */
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@ -1974,7 +1974,7 @@ elf_hppa_relocate_insn (insn, sym_value, r_type)
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case R_PARISC_DIR17R:
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case R_PARISC_PCREL17C:
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case R_PARISC_PCREL17R:
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return re_assemble_17 (insn, sym_value);
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return re_assemble_17 (insn & ~ 0x1f1ffd, sym_value);
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/* ADDIL or LDIL instructions. */
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case R_PARISC_DLTREL21L:
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@ -1985,7 +1985,7 @@ elf_hppa_relocate_insn (insn, sym_value, r_type)
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case R_PARISC_DPREL21L:
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case R_PARISC_PLTOFF21L:
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case R_PARISC_DIR21L:
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return re_assemble_21 (insn, sym_value);
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return re_assemble_21 (insn & ~ 0x1fffff, sym_value);
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/* LDO and integer loads/stores with 14bit displacements. */
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case R_PARISC_DLTREL14R:
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@ -390,7 +390,7 @@ re_assemble_3 (insn, as3)
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unsigned int insn;
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unsigned int as3;
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{
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return ((insn & ~ (7 << 13))
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return (insn
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| ((as3 & 4) << (13-2))
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| ((as3 & 3) << (13+1)));
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}
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@ -400,7 +400,7 @@ re_assemble_12 (insn, as12)
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unsigned int insn;
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unsigned int as12;
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{
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return ((insn & ~ 0x1ffd)
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return (insn
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| ((as12 & 0x800) >> 11)
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| ((as12 & 0x400) >> (10 - 2))
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| ((as12 & 0x3ff) << (1 + 2)));
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@ -419,14 +419,14 @@ re_assemble_16 (insn, as16, wide)
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/* Unusual 16-bit encoding. */
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t = (as16 << 1) & 0xffff;
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s = (as16 & 0x8000);
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return (insn & ~ 0xffff) | (t ^ s ^ (s >> 1)) | (s >> 15);
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return insn | (t ^ s ^ (s >> 1)) | (s >> 15);
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}
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else
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{
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/* Standard 14-bit encoding. */
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t = (as16 << 1) & 0x3fff;
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s = (as16 & 0x2000);
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return (insn & ~ 0xffff) | t | (s >> 13);
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return insn | t | (s >> 13);
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}
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}
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@ -435,7 +435,7 @@ re_assemble_17 (insn, as17)
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unsigned int insn;
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unsigned int as17;
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{
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return ((insn & ~ 0x1f1ffd)
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return (insn
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| ((as17 & 0x10000) >> 16)
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| ((as17 & 0x0f800) << (16 - 11))
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| ((as17 & 0x00400) >> (10 - 2))
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@ -447,7 +447,7 @@ re_assemble_21 (insn, as21)
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unsigned int insn;
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unsigned int as21;
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{
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return ((insn & ~ 0x1fffff)
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return (insn
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| ((as21 & 0x100000) >> 20)
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| ((as21 & 0x0ffe00) >> 8)
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| ((as21 & 0x000180) << 7)
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@ -460,7 +460,7 @@ re_assemble_22 (insn, as22)
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unsigned int insn;
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unsigned int as22;
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{
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return ((insn & ~ 0x3ff1ffd)
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return (insn
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| ((as22 & 0x200000) >> 21)
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| ((as22 & 0x1f0000) << (21 - 16))
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| ((as22 & 0x00f800) << (16 - 11))
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@ -697,10 +697,10 @@ hppa_rebuild_insn (abfd, insn, value, r_format)
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switch (r_format)
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{
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case 11: return (insn & ~ 0x7ff) | low_sign_unext (value, 11);
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case 12: return re_assemble_12 (insn, value);
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case 12: return re_assemble_12 (insn & ~ 0x1ffd, value);
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case 14: return (insn & ~ 0x3fff) | low_sign_unext (value, 14);
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case 17: return re_assemble_17 (insn, value);
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case 21: return re_assemble_21 (insn, value);
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case 17: return re_assemble_17 (insn & ~ 0x1f1ffd, value);
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case 21: return re_assemble_21 (insn & ~ 0x1fffff, value);
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case 32: return value;
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default:
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