* sh-tdep.c (SH_NUM_REGS): Define as 67.
(sh_sh_register_name): Add eight empty register names. (sh_sh3_register_name): Ditto. (sh_sh3e_register_name): Ditto. (sh_sh2e_register_name): Ditto. (sh_sh2a_register_name): New function, defining SH2A register set. (sh_sh2a_nofpu_register_name): New function, defining SH2A register set in nofpu case. (sh_sh_dsp_register_name): Add eight empty register names. (sh_sh3_dsp_register_name): Ditto. (sh_sh4_register_name): Ditto. (sh_sh4_nofpu_register_name): Ditto. (sh_sh4al_dsp_register_name): Ditto. (sh2a_show_regs): New function. (sh2a_nofpu_show_regs): New function. (sh_sh2a_register_type): New function. (do_bank_register_info): New function. (sh_print_pseudo_register): Call do_bank_register_info. Call sh_print_pseudo_register for valid "bank" register. (sh_sh2a_register_sim_regno): New function. (sh_gdbarch_init): Add bfd_mach_sh2a and bfd_mach_sh2a_nofpu handling. Increment pseudo register count by one for all sh variants with pseudo registers to accomodate pseudo bank register. * sh-tdep.h: Add register numbers for R0_BANK0_REGNUM, MACHB_REGNUM, IVNB_REGNUM, PRB_REGNUM, GBRB_REGNUM, MACLB_REGNUM, BANK_REGNUM, IBCR_REGNUM, IBNR_REGNUM, TBR_REGNUM and PSEUDO_BANK_REGNUM. Increment pseudo register numbers.
This commit is contained in:
Corinna Vinschen
parent
1326e61ba3
commit
da9624689c
3 changed files with 359 additions and 6 deletions
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@ -1,3 +1,33 @@
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2004-10-06 Corinna Vinschen <vinschen@redhat.com>
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* sh-tdep.c (SH_NUM_REGS): Define as 67.
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(sh_sh_register_name): Add eight empty register names.
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(sh_sh3_register_name): Ditto.
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(sh_sh3e_register_name): Ditto.
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(sh_sh2e_register_name): Ditto.
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(sh_sh2a_register_name): New function, defining SH2A register set.
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(sh_sh2a_nofpu_register_name): New function, defining SH2A register set
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in nofpu case.
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(sh_sh_dsp_register_name): Add eight empty register names.
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(sh_sh3_dsp_register_name): Ditto.
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(sh_sh4_register_name): Ditto.
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(sh_sh4_nofpu_register_name): Ditto.
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(sh_sh4al_dsp_register_name): Ditto.
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(sh2a_show_regs): New function.
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(sh2a_nofpu_show_regs): New function.
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(sh_sh2a_register_type): New function.
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(do_bank_register_info): New function.
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(sh_print_pseudo_register): Call do_bank_register_info.
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Call sh_print_pseudo_register for valid "bank" register.
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(sh_sh2a_register_sim_regno): New function.
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(sh_gdbarch_init): Add bfd_mach_sh2a and bfd_mach_sh2a_nofpu handling.
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Increment pseudo register count by one for all sh variants with
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pseudo registers to accomodate pseudo bank register.
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* sh-tdep.h: Add register numbers for R0_BANK0_REGNUM, MACHB_REGNUM,
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IVNB_REGNUM, PRB_REGNUM, GBRB_REGNUM, MACLB_REGNUM, BANK_REGNUM,
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IBCR_REGNUM, IBNR_REGNUM, TBR_REGNUM and PSEUDO_BANK_REGNUM.
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Increment pseudo register numbers.
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2004-10-06 Corinna Vinschen <vinschen@redhat.com>
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2004-10-06 Corinna Vinschen <vinschen@redhat.com>
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* dwarf2read.c (read_subroutine_type): Call make_function_type
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* dwarf2read.c (read_subroutine_type): Call make_function_type
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315
gdb/sh-tdep.c
315
gdb/sh-tdep.c
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@ -56,7 +56,7 @@
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static void (*sh_show_regs) (void);
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static void (*sh_show_regs) (void);
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#define SH_NUM_REGS 59
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#define SH_NUM_REGS 67
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struct sh_frame_cache
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struct sh_frame_cache
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{
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{
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@ -86,6 +86,7 @@ sh_sh_register_name (int reg_nr)
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"", "",
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"", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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};
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};
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if (reg_nr < 0)
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if (reg_nr < 0)
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return NULL;
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return NULL;
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@ -107,6 +108,7 @@ sh_sh3_register_name (int reg_nr)
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"ssr", "spc",
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"ssr", "spc",
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
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"", "", "", "", "", "", "", "",
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};
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};
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if (reg_nr < 0)
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if (reg_nr < 0)
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return NULL;
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return NULL;
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@ -128,6 +130,7 @@ sh_sh3e_register_name (int reg_nr)
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"ssr", "spc",
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"ssr", "spc",
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
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"", "", "", "", "", "", "", "",
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};
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};
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if (reg_nr < 0)
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if (reg_nr < 0)
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return NULL;
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return NULL;
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@ -149,6 +152,87 @@ sh_sh2e_register_name (int reg_nr)
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"", "",
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"", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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};
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if (reg_nr < 0)
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return NULL;
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if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
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return NULL;
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return register_names[reg_nr];
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}
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static const char *
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sh_sh2a_register_name (int reg_nr)
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{
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static char *register_names[] = {
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/* general registers 0-15 */
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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/* 16 - 22 */
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"pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
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/* 23, 24 */
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"fpul", "fpscr",
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/* floating point registers 25 - 40 */
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"fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
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"fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
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/* 41, 42 */
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"", "",
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/* 43 - 62. Banked registers. The bank number used is determined by
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the bank register (63). */
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"r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
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"r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b",
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"machb", "ivnb", "prb", "gbrb", "maclb",
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/* 63: register bank number, not a real register but used to
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communicate the register bank currently get/set. This register
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is hidden to the user, who manipulates it using the pseudo
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register called "bank" (67). See below. */
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"",
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/* 64 - 66 */
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"ibcr", "ibnr", "tbr",
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/* 67: register bank number, the user visible pseudo register. */
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"bank",
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/* double precision (pseudo) 68 - 75 */
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"dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
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};
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if (reg_nr < 0)
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return NULL;
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if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
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return NULL;
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return register_names[reg_nr];
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}
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static const char *
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sh_sh2a_nofpu_register_name (int reg_nr)
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{
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static char *register_names[] = {
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/* general registers 0-15 */
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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/* 16 - 22 */
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"pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
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/* 23, 24 */
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"", "",
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/* floating point registers 25 - 40 */
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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/* 41, 42 */
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"", "",
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/* 43 - 62. Banked registers. The bank number used is determined by
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the bank register (63). */
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"r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
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"r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b",
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"machb", "ivnb", "prb", "gbrb", "maclb",
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/* 63: register bank number, not a real register but used to
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communicate the register bank currently get/set. This register
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is hidden to the user, who manipulates it using the pseudo
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register called "bank" (67). See below. */
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"",
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/* 64 - 66 */
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"ibcr", "ibnr", "tbr",
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/* 67: register bank number, the user visible pseudo register. */
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"bank",
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/* double precision (pseudo) 68 - 75 */
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"", "", "", "", "", "", "", "",
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};
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};
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if (reg_nr < 0)
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if (reg_nr < 0)
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return NULL;
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return NULL;
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@ -170,6 +254,7 @@ sh_sh_dsp_register_name (int reg_nr)
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"", "",
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"", "",
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"rs", "re", "", "", "", "", "", "",
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"rs", "re", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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};
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};
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if (reg_nr < 0)
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if (reg_nr < 0)
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return NULL;
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return NULL;
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@ -192,6 +277,7 @@ sh_sh3_dsp_register_name (int reg_nr)
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"rs", "re", "", "", "", "", "", "",
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"rs", "re", "", "", "", "", "", "",
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"r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
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"r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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};
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};
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if (reg_nr < 0)
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if (reg_nr < 0)
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return NULL;
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return NULL;
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@ -220,6 +306,9 @@ sh_sh4_register_name (int reg_nr)
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
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/* bank 1 51 - 58 */
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/* bank 1 51 - 58 */
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
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"", "", "", "", "", "", "", "",
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/* pseudo bank register. */
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"",
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/* double precision (pseudo) 59 - 66 */
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/* double precision (pseudo) 59 - 66 */
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"dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
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"dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
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/* vectors (pseudo) 67 - 70 */
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/* vectors (pseudo) 67 - 70 */
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@ -254,6 +343,9 @@ sh_sh4_nofpu_register_name (int reg_nr)
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
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/* bank 1 51 - 58 */
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/* bank 1 51 - 58 */
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
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"", "", "", "", "", "", "", "",
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/* pseudo bank register. */
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"",
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/* double precision (pseudo) 59 - 66 -- not for nofpu target */
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/* double precision (pseudo) 59 - 66 -- not for nofpu target */
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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/* vectors (pseudo) 67 - 70 -- not for nofpu target */
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/* vectors (pseudo) 67 - 70 -- not for nofpu target */
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@ -280,6 +372,7 @@ sh_sh4al_dsp_register_name (int reg_nr)
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"rs", "re", "", "", "", "", "", "",
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"rs", "re", "", "", "", "", "", "",
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"r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
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"r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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};
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};
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if (reg_nr < 0)
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if (reg_nr < 0)
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return NULL;
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return NULL;
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@ -1250,6 +1343,141 @@ sh2e_show_regs (void)
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printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"), (long) read_register (FP0_REGNUM + 8), (long) read_register (FP0_REGNUM + 9), (long) read_register (FP0_REGNUM + 10), (long) read_register (FP0_REGNUM + 11), (long) read_register (FP0_REGNUM + 12), (long) read_register (FP0_REGNUM + 13), (long) read_register (FP0_REGNUM + 14), (long) read_register (FP0_REGNUM + 15));
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printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"), (long) read_register (FP0_REGNUM + 8), (long) read_register (FP0_REGNUM + 9), (long) read_register (FP0_REGNUM + 10), (long) read_register (FP0_REGNUM + 11), (long) read_register (FP0_REGNUM + 12), (long) read_register (FP0_REGNUM + 13), (long) read_register (FP0_REGNUM + 14), (long) read_register (FP0_REGNUM + 15));
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}
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}
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static void
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sh2a_show_regs (void)
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{
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int pr = read_register (FPSCR_REGNUM) & 0x80000;
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printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
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paddr (read_register (PC_REGNUM)),
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(long) read_register (SR_REGNUM),
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(long) read_register (PR_REGNUM),
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(long) read_register (MACH_REGNUM),
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(long) read_register (MACL_REGNUM));
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printf_filtered ("GBR=%08lx VBR=%08lx TBR=%08lx",
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(long) read_register (GBR_REGNUM),
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(long) read_register (VBR_REGNUM),
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(long) read_register (TBR_REGNUM));
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printf_filtered (" FPUL=%08lx FPSCR=%08lx\n",
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(long) read_register (FPUL_REGNUM),
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(long) read_register (FPSCR_REGNUM));
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printf_filtered ("R0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
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(long) read_register (0), (long) read_register (1),
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(long) read_register (2), (long) read_register (3),
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(long) read_register (4), (long) read_register (5),
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(long) read_register (6), (long) read_register (7));
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printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
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(long) read_register (8), (long) read_register (9),
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(long) read_register (10), (long) read_register (11),
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(long) read_register (12), (long) read_register (13),
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(long) read_register (14), (long) read_register (15));
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printf_filtered ((pr
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? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
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:
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"FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
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(long) read_register (FP0_REGNUM + 0),
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(long) read_register (FP0_REGNUM + 1),
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||||||
|
(long) read_register (FP0_REGNUM + 2),
|
||||||
|
(long) read_register (FP0_REGNUM + 3),
|
||||||
|
(long) read_register (FP0_REGNUM + 4),
|
||||||
|
(long) read_register (FP0_REGNUM + 5),
|
||||||
|
(long) read_register (FP0_REGNUM + 6),
|
||||||
|
(long) read_register (FP0_REGNUM + 7));
|
||||||
|
printf_filtered ((pr ?
|
||||||
|
"DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n" :
|
||||||
|
"FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
|
||||||
|
(long) read_register (FP0_REGNUM + 8),
|
||||||
|
(long) read_register (FP0_REGNUM + 9),
|
||||||
|
(long) read_register (FP0_REGNUM + 10),
|
||||||
|
(long) read_register (FP0_REGNUM + 11),
|
||||||
|
(long) read_register (FP0_REGNUM + 12),
|
||||||
|
(long) read_register (FP0_REGNUM + 13),
|
||||||
|
(long) read_register (FP0_REGNUM + 14),
|
||||||
|
(long) read_register (FP0_REGNUM + 15));
|
||||||
|
printf_filtered ("BANK=%-3d\n", (int) read_register (BANK_REGNUM));
|
||||||
|
printf_filtered ("R0b - R7b %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 0),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 1),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 2),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 3),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 4),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 5),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 6),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 7));
|
||||||
|
printf_filtered ("R8b - R14b %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 8),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 9),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 10),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 11),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 12),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 13),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 14));
|
||||||
|
printf_filtered ("MACHb=%08lx IVNb=%08lx PRb=%08lx GBRb=%08lx MACLb=%08lx\n",
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 15),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 16),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 17),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 18),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 19));
|
||||||
|
}
|
||||||
|
|
||||||
|
static void
|
||||||
|
sh2a_nofpu_show_regs (void)
|
||||||
|
{
|
||||||
|
int pr = read_register (FPSCR_REGNUM) & 0x80000;
|
||||||
|
printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
|
||||||
|
paddr (read_register (PC_REGNUM)),
|
||||||
|
(long) read_register (SR_REGNUM),
|
||||||
|
(long) read_register (PR_REGNUM),
|
||||||
|
(long) read_register (MACH_REGNUM),
|
||||||
|
(long) read_register (MACL_REGNUM));
|
||||||
|
|
||||||
|
printf_filtered ("GBR=%08lx VBR=%08lx TBR=%08lx",
|
||||||
|
(long) read_register (GBR_REGNUM),
|
||||||
|
(long) read_register (VBR_REGNUM),
|
||||||
|
(long) read_register (TBR_REGNUM));
|
||||||
|
printf_filtered (" FPUL=%08lx FPSCR=%08lx\n",
|
||||||
|
(long) read_register (FPUL_REGNUM),
|
||||||
|
(long) read_register (FPSCR_REGNUM));
|
||||||
|
|
||||||
|
printf_filtered ("R0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
|
||||||
|
(long) read_register (0), (long) read_register (1),
|
||||||
|
(long) read_register (2), (long) read_register (3),
|
||||||
|
(long) read_register (4), (long) read_register (5),
|
||||||
|
(long) read_register (6), (long) read_register (7));
|
||||||
|
printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
|
||||||
|
(long) read_register (8), (long) read_register (9),
|
||||||
|
(long) read_register (10), (long) read_register (11),
|
||||||
|
(long) read_register (12), (long) read_register (13),
|
||||||
|
(long) read_register (14), (long) read_register (15));
|
||||||
|
|
||||||
|
printf_filtered ("BANK=%-3d\n", (int) read_register (BANK_REGNUM));
|
||||||
|
printf_filtered ("R0b - R7b %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 0),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 1),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 2),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 3),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 4),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 5),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 6),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 7));
|
||||||
|
printf_filtered ("R8b - R14b %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 8),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 9),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 10),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 11),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 12),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 13),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 14));
|
||||||
|
printf_filtered ("MACHb=%08lx IVNb=%08lx PRb=%08lx GBRb=%08lx MACLb=%08lx\n",
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 15),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 16),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 17),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 18),
|
||||||
|
(long) read_register (R0_BANK0_REGNUM + 19));
|
||||||
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
sh3e_show_regs (void)
|
sh3e_show_regs (void)
|
||||||
{
|
{
|
||||||
|
|
@ -1471,6 +1699,18 @@ sh_show_regs_command (char *args, int from_tty)
|
||||||
(*sh_show_regs) ();
|
(*sh_show_regs) ();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static struct type *
|
||||||
|
sh_sh2a_register_type (struct gdbarch *gdbarch, int reg_nr)
|
||||||
|
{
|
||||||
|
if ((reg_nr >= FP0_REGNUM
|
||||||
|
&& (reg_nr <= FP_LAST_REGNUM)) || (reg_nr == FPUL_REGNUM))
|
||||||
|
return builtin_type_float;
|
||||||
|
else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
|
||||||
|
return builtin_type_double;
|
||||||
|
else
|
||||||
|
return builtin_type_int;
|
||||||
|
}
|
||||||
|
|
||||||
/* Return the GDB type object for the "standard" data type
|
/* Return the GDB type object for the "standard" data type
|
||||||
of data in register N. */
|
of data in register N. */
|
||||||
static struct type *
|
static struct type *
|
||||||
|
|
@ -1685,6 +1925,12 @@ do_dr_register_info (struct gdbarch *gdbarch, struct ui_file *file,
|
||||||
(int) read_register (first_fp_reg_num),
|
(int) read_register (first_fp_reg_num),
|
||||||
(int) read_register (first_fp_reg_num + 1));
|
(int) read_register (first_fp_reg_num + 1));
|
||||||
}
|
}
|
||||||
|
static void
|
||||||
|
do_bank_register_info (struct gdbarch *gdbarch, struct ui_file *file)
|
||||||
|
{
|
||||||
|
fprintf_filtered (file, "bank %d\n",
|
||||||
|
(int) read_register (BANK_REGNUM));
|
||||||
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
sh_print_pseudo_register (struct gdbarch *gdbarch, struct ui_file *file,
|
sh_print_pseudo_register (struct gdbarch *gdbarch, struct ui_file *file,
|
||||||
|
|
@ -1693,6 +1939,8 @@ sh_print_pseudo_register (struct gdbarch *gdbarch, struct ui_file *file,
|
||||||
if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
|
if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
|
||||||
internal_error (__FILE__, __LINE__,
|
internal_error (__FILE__, __LINE__,
|
||||||
"Invalid pseudo register number %d\n", regnum);
|
"Invalid pseudo register number %d\n", regnum);
|
||||||
|
else if (regnum == PSEUDO_BANK_REGNUM)
|
||||||
|
do_bank_register_info (gdbarch, file);
|
||||||
else if (regnum >= DR0_REGNUM && regnum <= DR_LAST_REGNUM)
|
else if (regnum >= DR0_REGNUM && regnum <= DR_LAST_REGNUM)
|
||||||
do_dr_register_info (gdbarch, file, regnum);
|
do_dr_register_info (gdbarch, file, regnum);
|
||||||
else if (regnum >= FV0_REGNUM && regnum <= FV_LAST_REGNUM)
|
else if (regnum >= FV0_REGNUM && regnum <= FV_LAST_REGNUM)
|
||||||
|
|
@ -1815,6 +2063,11 @@ sh_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
|
||||||
sh_do_register (gdbarch, file, regnum); /* All other regs */
|
sh_do_register (gdbarch, file, regnum); /* All other regs */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (regnum == PSEUDO_BANK_REGNUM
|
||||||
|
&& REGISTER_NAME (regnum)
|
||||||
|
&& *REGISTER_NAME (regnum))
|
||||||
|
sh_print_pseudo_register (gdbarch, file, regnum++);
|
||||||
|
|
||||||
if (fpregs)
|
if (fpregs)
|
||||||
while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
|
while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
|
||||||
{
|
{
|
||||||
|
|
@ -1883,6 +2136,35 @@ sh_dsp_register_sim_regno (int nr)
|
||||||
return nr;
|
return nr;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int
|
||||||
|
sh_sh2a_register_sim_regno (int nr)
|
||||||
|
{
|
||||||
|
switch (nr)
|
||||||
|
{
|
||||||
|
case TBR_REGNUM:
|
||||||
|
return SIM_SH_TBR_REGNUM;
|
||||||
|
case IBNR_REGNUM:
|
||||||
|
return SIM_SH_IBNR_REGNUM;
|
||||||
|
case IBCR_REGNUM:
|
||||||
|
return SIM_SH_IBCR_REGNUM;
|
||||||
|
case BANK_REGNUM:
|
||||||
|
return SIM_SH_BANK_REGNUM;
|
||||||
|
case MACLB_REGNUM:
|
||||||
|
return SIM_SH_BANK_MACL_REGNUM;
|
||||||
|
case GBRB_REGNUM:
|
||||||
|
return SIM_SH_BANK_GBR_REGNUM;
|
||||||
|
case PRB_REGNUM:
|
||||||
|
return SIM_SH_BANK_PR_REGNUM;
|
||||||
|
case IVNB_REGNUM:
|
||||||
|
return SIM_SH_BANK_IVN_REGNUM;
|
||||||
|
case MACHB_REGNUM:
|
||||||
|
return SIM_SH_BANK_MACH_REGNUM;
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
return legacy_register_sim_regno (nr);
|
||||||
|
}
|
||||||
|
|
||||||
static struct sh_frame_cache *
|
static struct sh_frame_cache *
|
||||||
sh_alloc_frame_cache (void)
|
sh_alloc_frame_cache (void)
|
||||||
{
|
{
|
||||||
|
|
@ -2150,6 +2432,12 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
||||||
case bfd_mach_sh2e:
|
case bfd_mach_sh2e:
|
||||||
sh_show_regs = sh2e_show_regs;
|
sh_show_regs = sh2e_show_regs;
|
||||||
break;
|
break;
|
||||||
|
case bfd_mach_sh2a:
|
||||||
|
sh_show_regs = sh2a_show_regs;
|
||||||
|
break;
|
||||||
|
case bfd_mach_sh2a_nofpu:
|
||||||
|
sh_show_regs = sh2a_nofpu_show_regs;
|
||||||
|
break;
|
||||||
case bfd_mach_sh_dsp:
|
case bfd_mach_sh_dsp:
|
||||||
sh_show_regs = sh_dsp_show_regs;
|
sh_show_regs = sh_dsp_show_regs;
|
||||||
break;
|
break;
|
||||||
|
|
@ -2263,6 +2551,29 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
||||||
set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu);
|
set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
case bfd_mach_sh2a:
|
||||||
|
set_gdbarch_register_name (gdbarch, sh_sh2a_register_name);
|
||||||
|
set_gdbarch_register_type (gdbarch, sh_sh2a_register_type);
|
||||||
|
set_gdbarch_register_sim_regno (gdbarch, sh_sh2a_register_sim_regno);
|
||||||
|
|
||||||
|
set_gdbarch_fp0_regnum (gdbarch, 25);
|
||||||
|
set_gdbarch_num_pseudo_regs (gdbarch, 9);
|
||||||
|
set_gdbarch_pseudo_register_read (gdbarch, sh_pseudo_register_read);
|
||||||
|
set_gdbarch_pseudo_register_write (gdbarch, sh_pseudo_register_write);
|
||||||
|
set_gdbarch_store_return_value (gdbarch, sh3e_sh4_store_return_value);
|
||||||
|
set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
|
||||||
|
set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case bfd_mach_sh2a_nofpu:
|
||||||
|
set_gdbarch_register_name (gdbarch, sh_sh2a_nofpu_register_name);
|
||||||
|
set_gdbarch_register_sim_regno (gdbarch, sh_sh2a_register_sim_regno);
|
||||||
|
|
||||||
|
set_gdbarch_num_pseudo_regs (gdbarch, 1);
|
||||||
|
set_gdbarch_pseudo_register_read (gdbarch, sh_pseudo_register_read);
|
||||||
|
set_gdbarch_pseudo_register_write (gdbarch, sh_pseudo_register_write);
|
||||||
|
break;
|
||||||
|
|
||||||
case bfd_mach_sh_dsp:
|
case bfd_mach_sh_dsp:
|
||||||
set_gdbarch_register_name (gdbarch, sh_sh_dsp_register_name);
|
set_gdbarch_register_name (gdbarch, sh_sh_dsp_register_name);
|
||||||
set_gdbarch_register_sim_regno (gdbarch, sh_dsp_register_sim_regno);
|
set_gdbarch_register_sim_regno (gdbarch, sh_dsp_register_sim_regno);
|
||||||
|
|
@ -2295,7 +2606,7 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
||||||
set_gdbarch_register_name (gdbarch, sh_sh4_register_name);
|
set_gdbarch_register_name (gdbarch, sh_sh4_register_name);
|
||||||
set_gdbarch_register_type (gdbarch, sh_sh4_register_type);
|
set_gdbarch_register_type (gdbarch, sh_sh4_register_type);
|
||||||
set_gdbarch_fp0_regnum (gdbarch, 25);
|
set_gdbarch_fp0_regnum (gdbarch, 25);
|
||||||
set_gdbarch_num_pseudo_regs (gdbarch, 12);
|
set_gdbarch_num_pseudo_regs (gdbarch, 13);
|
||||||
set_gdbarch_pseudo_register_read (gdbarch, sh_pseudo_register_read);
|
set_gdbarch_pseudo_register_read (gdbarch, sh_pseudo_register_read);
|
||||||
set_gdbarch_pseudo_register_write (gdbarch, sh_pseudo_register_write);
|
set_gdbarch_pseudo_register_write (gdbarch, sh_pseudo_register_write);
|
||||||
set_gdbarch_store_return_value (gdbarch, sh3e_sh4_store_return_value);
|
set_gdbarch_store_return_value (gdbarch, sh3e_sh4_store_return_value);
|
||||||
|
|
|
||||||
|
|
@ -64,11 +64,23 @@ enum
|
||||||
RE_REGNUM = 44,
|
RE_REGNUM = 44,
|
||||||
DSP_R0_BANK_REGNUM = 51,
|
DSP_R0_BANK_REGNUM = 51,
|
||||||
DSP_R7_BANK_REGNUM = 58,
|
DSP_R7_BANK_REGNUM = 58,
|
||||||
|
/* sh2a register */
|
||||||
|
R0_BANK0_REGNUM = 43,
|
||||||
|
MACHB_REGNUM = 58,
|
||||||
|
IVNB_REGNUM = 59,
|
||||||
|
PRB_REGNUM = 60,
|
||||||
|
GBRB_REGNUM = 61,
|
||||||
|
MACLB_REGNUM = 62,
|
||||||
|
BANK_REGNUM = 63,
|
||||||
|
IBCR_REGNUM = 64,
|
||||||
|
IBNR_REGNUM = 65,
|
||||||
|
TBR_REGNUM = 66,
|
||||||
|
PSEUDO_BANK_REGNUM = 67,
|
||||||
/* Floating point pseudo registers */
|
/* Floating point pseudo registers */
|
||||||
DR0_REGNUM = 59,
|
DR0_REGNUM = 68,
|
||||||
DR_LAST_REGNUM = 66,
|
DR_LAST_REGNUM = 75,
|
||||||
FV0_REGNUM = 67,
|
FV0_REGNUM = 76,
|
||||||
FV_LAST_REGNUM = 70
|
FV_LAST_REGNUM = 79
|
||||||
};
|
};
|
||||||
|
|
||||||
extern gdbarch_init_ftype sh64_gdbarch_init;
|
extern gdbarch_init_ftype sh64_gdbarch_init;
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue