* Makefile.in: Delete stuff moved to ../common/Make-common.in.
(SIM_{OBJS,EXTRA_LIBS,EXTRA_LIBDEPS,EXTRA_ALL,EXTRA_INSTALL}): Define. (SIM_{EXTRA_CLEAN,EXTRA_CFLAGS}): Define. * configure.in: Simplify using macros in ../common/aclocal.m4. Call AC_CHECK_HEADERS(stdlib.h). * configure: Regenerated. * config.in: New file. * func.c (sim_set_callbacks): Delete, moved to * interf.c (sim_set_callbacks): here. (sim_callback): New global. Rewrite all calls to printf_filtered to go through callback. (sim_size,sim_trace): New functions. (sim_{insert,remove}_breakpoint): #if 0 out. * sis.c: #include "config.h". #include <stdlib.h> if present. (main): Coerce fprintf arg to INIT_DISASSEMBLE_INFO to fprintf_ftype. * sis.h: #include "callback.h".
This commit is contained in:
parent
27bc3f8ecb
commit
d70e3e2b7b
5 changed files with 338 additions and 186 deletions
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@ -29,6 +29,7 @@ NEWS
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README.erc32
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README.gdb
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README.sis
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config.in
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configure
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configure.in
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end.c
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@ -1,6 +1,29 @@
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Wed Nov 20 01:30:12 1996 Doug Evans <dje@canuck.cygnus.com>
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* Makefile.in: Delete stuff moved to ../common/Make-common.in.
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(SIM_{OBJS,EXTRA_LIBS,EXTRA_LIBDEPS,EXTRA_ALL,EXTRA_INSTALL}): Define.
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(SIM_{EXTRA_CLEAN,EXTRA_CFLAGS}): Define.
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* configure.in: Simplify using macros in ../common/aclocal.m4.
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Call AC_CHECK_HEADERS(stdlib.h).
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* configure: Regenerated.
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* config.in: New file.
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* func.c (sim_set_callbacks): Delete, moved to
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* interf.c (sim_set_callbacks): here.
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(sim_callback): New global.
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Rewrite all calls to printf_filtered to go through callback.
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(sim_size,sim_trace): New functions.
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(sim_{insert,remove}_breakpoint): #if 0 out.
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* sis.c: #include "config.h". #include <stdlib.h> if present.
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(main): Coerce fprintf arg to INIT_DISASSEMBLE_INFO to fprintf_ftype.
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* sis.h: #include "callback.h".
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Thu Oct 3 16:12:03 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
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* Makefile.in (clean): Move config.log to distclean.
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Wed Oct 2 16:57:57 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
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* Makefile.in (clean): Remove config.log.
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* Makefile.in (clean): Also remove config.log.
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Sat Sep 14 00:00:46 1996 Ian Lance Taylor <ian@cygnus.com>
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@ -1,5 +1,5 @@
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# Makefile template for Configure for the erc32sim library.
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# Copyright (C) 1993 Free Software Foundation, Inc.
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# Copyright (C) 1993, 1996 Free Software Foundation, Inc.
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# Written by Cygnus Support
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# Modified by J.Gaisler ESA/ESTEC
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#
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@ -15,181 +15,53 @@
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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VPATH = @srcdir@
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srcdir = @srcdir@
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# SIM_AC_OUTPUT combines this with ../common/Make-common.in to produce the
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# real Makefile.
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prefix = @prefix@
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exec_prefix = @exec_prefix@
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## Begin config
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SIM_OBJS = exec.o erc32.o func.o help.o float.o interf.o
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SIM_EXTRA_LIBS = ../../readline/libreadline.a -ltermcap -lm
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SIM_EXTRA_LIBDEPS = ../../readline/libreadline.a
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SIM_EXTRA_ALL = sis
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SIM_EXTRA_INSTALL = install-sis
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SIM_EXTRA_CLEAN = clean-sis
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host_alias = @host_alias@
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target_alias = @target_alias@
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program_transform_name = @program_transform_name@
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bindir = @bindir@
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libdir = @libdir@
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tooldir = $(exec_prefix)/$(target_alias)
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datadir = @datadir@
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mandir = @mandir@
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man1dir = $(mandir)/man1
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man2dir = $(mandir)/man2
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man3dir = $(mandir)/man3
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man4dir = $(mandir)/man4
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man5dir = $(mandir)/man5
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man6dir = $(mandir)/man6
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man7dir = $(mandir)/man7
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man8dir = $(mandir)/man8
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man9dir = $(mandir)/man9
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infodir = @infodir@
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includedir = @includedir@
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SHELL = /bin/sh
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INSTALL = @INSTALL@
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INSTALL_PROGRAM = @INSTALL_PROGRAM@
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INSTALL_DATA = @INSTALL_DATA@
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INSTALL_XFORM = $(INSTALL) -t='$(program_transform_name)'
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INSTALL_XFORM1= $(INSTALL_XFORM) -b=.1
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AR = @AR@
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AR_FLAGS = rc
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CC = @CC@
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CFLAGS = @CFLAGS@
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MAKEINFO = makeinfo
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RANLIB = @RANLIB@
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CC_FOR_BUILD = @CC_FOR_BUILD@
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#
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# UARTS run at about 115200 baud (simulator time). Add -DFAST_UART to
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# CFLAGS if faster (infinite) UART speed is desired. Might affect the
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# behaviour of UART interrupt routines ...
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#
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SIM_EXTRA_CFLAGS = -DSTAT -DFAST_UART -DIUREV0 -DMECREV0
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## End config
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CFLAGS2 = -g -O3 -DSTAT -DFAST_UART -DIUREV0 -DMECREV0
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# `sis' doesn't need interf.o.
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SIS_OFILES = exec.o erc32.o func.o help.o float.o
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INCDIR = $(srcdir)/../../include
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CSEARCH = -I. -I$(srcdir) -I$(INCDIR) -I../../bfd -I$(srcdir)/../../bfd \
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-I$(srcdir)/../../gdb -I$(srcdir)/../../gdb/config
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DEP = mkdep
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sis: sis.o $(SIS_OFILES) $(COMMON_OBJS) $(LIBDEPS)
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$(CC) $(ALL_CFLAGS) -o sis \
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sis.o $(SIS_OFILES) $(COMMON_OBJS) $(EXTRA_LIBS)
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TARGETLIB = libsim.a
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CFILES = sis.c exec.c erc32.c interf.c run.c help.c float.c
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OFILES = exec.o erc32.o func.o help.o float.o
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all: end.h sis run $(TARGETLIB)
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end : $(srcdir)/end.c
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# FIXME: This computes the build host's endianness, doesn't it?
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# There is AC_C_BIGENDIAN but it doesn't handle float endianness.
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# [Are int/float endians every different on a sparc?]
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end: $(srcdir)/end.c
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$(CC_FOR_BUILD) $(srcdir)/end.c -o end
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end.h : end
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end.h: end
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./end > end.h
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sis: sis.o $(OFILES)
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$(CC) $(CFLAGS) $(CLAGS2) -o sis sis.o $(OFILES) \
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../../opcodes/libopcodes.a ../../readline/libreadline.a \
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../../bfd/libbfd.a ../../libiberty/libiberty.a \
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-ltermcap -lm
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# Copy the files into directories where they will be run.
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install-sis:
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$(INSTALL_XFORM) sis $(bindir)/sis
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run: run.o interf.o $(OFILES)
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$(CC) $(CFLAGS) $(CLAGS2) -o run run.o interf.o $(OFILES) \
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../../opcodes/libopcodes.a ../../readline/libreadline.a \
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../../bfd/libbfd.a ../../libiberty/libiberty.a \
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-ltermcap -lm
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clean:
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rm -f *.o libsim.a sis run end end.h config.log
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distclean: clean
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rm -rf Makefile config.status sysdep.h
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#### host and target dependent Makefile fragments come in here.
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###
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FLAGS_TO_PASS = \
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"against=$(against)" \
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"AR=$(AR)" \
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"AR_FLAGS=$(AR_FLAGS)" \
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"CC=$(CC)" \
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"CFLAGS=$(CFLAGS)" \
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"RANLIB=$(RANLIB)" \
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"MAKEINFO=$(MAKEINFO)" \
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"INSTALL=$(INSTALL)" \
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"INSTALL_DATA=$(INSTALL_DATA)" \
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"INSTALL_PROGRAM=$(INSTALL_PROGRAM)" \
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"BISON=$(BISON)"
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$(OFILES) sis.o interf.o : end.h sis.h
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.c.o:
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$(CC) -c $(CFLAGS) $(CFLAGS2) $(HDEFINES) $(TDEFINES) $(CSEARCH) $(CSWITCHES) $<
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# C source files that correspond to .o's.
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STAGESTUFF = $(TARGETLIB) $(OFILES)
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all: $(TARGETLIB)
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.NOEXPORT:
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check:
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info:
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clean-info:
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install-info:
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# HDEPFILES comes from the host config; TDEPFILES from the target config.
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$(TARGETLIB): $(OFILES) interf.o
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rm -f $(TARGETLIB)
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$(AR) $(AR_FLAGS) $(TARGETLIB) $(OFILES) interf.o
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$(RANLIB) $(TARGETLIB)
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clean-sis:
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rm -f sis end end.h
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# Circumvent Sun Make bug with VPATH.
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sparc-opc.o: sparc-opc.c
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tags etags: TAGS
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TAGS: force
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etags $(INCDIR)/*.h $(srcdir)/*.h $(srcdir)/*.c
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sis.o: sis.c sis.h end.h
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exec.o: exec.c sis.h end.h
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erc32.o: erc32.c sis.h end.h
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exec.o: exec.c sis.h end.h
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float.o: float.c sis.h end.h
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func.o: func.c
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help.o: help.c
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interf.o: interf.c sis.h end.h
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run.o: run.c
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help.o: help.c
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float.o: float.c sis.h end.h
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# Mark everything as depending on config.status, since the timestamp on
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# sysdep.h might actually move backwards if we reconfig and relink it
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# to a different hosts/h-xxx.h file. This will force a recompile anyway.
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RECONFIG = config.status
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# Dummy target to force execution of dependent targets.
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#
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force:
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# Copy the files into directories where they will be run.
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install:
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$(INSTALL_XFORM) sis $(bindir)/sis ; \
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n=`echo sis | sed '$(program_transform_name)'`; \
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rm -f $(bindir)/sis; \
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ln $(bindir)/$$n $(bindir)/sis \
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|| $(INSTALL_PROGRAM) sis $(bindir)/sis; \
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test -d $(tooldir) || mkdir $(tooldir); \
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test -d $(tooldir)/bin || mkdir $(tooldir)/bin; \
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rm -f $(tooldir)/bin/sis; \
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ln $(bindir)/$$n $(tooldir)/bin/sis \
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|| $(INSTALL_PROGRAM) sis $(tooldir)/bin/sis; \
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|
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|
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Makefile: $(srcdir)/Makefile.in
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$(SHELL) ./config.status
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sis.o: sis.c sis.h end.h
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|
|
|
@ -2,29 +2,8 @@ dnl Process this file with autoconf to produce a configure script.
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AC_PREREQ(2.5)dnl
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AC_INIT(Makefile.in)
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AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../..)
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AC_CANONICAL_SYSTEM
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AC_ARG_PROGRAM
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AC_PROG_CC
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AC_PROG_INSTALL
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SIM_AC_COMMON
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. ${srcdir}/../../bfd/configure.host
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AC_CHECK_HEADERS(stdlib.h)
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||||
|
||||
AC_SUBST(CFLAGS)
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||||
AC_SUBST(HDEFINES)
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||||
AR=${AR-ar}
|
||||
AC_SUBST(AR)
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||||
AC_PROG_RANLIB
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||||
|
||||
# Put a plausible default for CC_FOR_BUILD in Makefile.
|
||||
AC_C_CROSS
|
||||
if test -z "$CC_FOR_BUILD"; then
|
||||
if test "x$cross_compiling" = "xno"; then
|
||||
CC_FOR_BUILD='$(CC)'
|
||||
else
|
||||
CC_FOR_BUILD=gcc
|
||||
fi
|
||||
fi
|
||||
AC_SUBST(CC_FOR_BUILD)
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||||
|
||||
AC_OUTPUT(Makefile)
|
||||
SIM_AC_OUTPUT
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||||
|
|
277
sim/erc32/sis.c
Normal file
277
sim/erc32/sis.c
Normal file
|
@ -0,0 +1,277 @@
|
|||
/*
|
||||
* This file is part of SIS.
|
||||
*
|
||||
* SIS, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler, European
|
||||
* Space Agency
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it under
|
||||
* the terms of the GNU General Public License as published by the Free
|
||||
* Software Foundation; either version 2 of the License, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc., 675
|
||||
* Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "config.h"
|
||||
|
||||
#include <signal.h>
|
||||
#include <string.h>
|
||||
#ifdef HAVE_STDLIB_H
|
||||
#include <stdlib.h>
|
||||
#endif
|
||||
#include <stdio.h>
|
||||
#include "sis.h"
|
||||
#include <dis-asm.h>
|
||||
|
||||
#ifndef fprintf
|
||||
extern fprintf();
|
||||
#endif
|
||||
|
||||
#define VAL(x) strtol(x,(char *)NULL,0)
|
||||
|
||||
extern char *readline(char *prompt); /* GNU readline function */
|
||||
|
||||
/* Command history buffer length - MUST be binary */
|
||||
#define HIST_LEN 64
|
||||
|
||||
extern struct disassemble_info dinfo;
|
||||
extern struct pstate sregs;
|
||||
extern struct estate ebase;
|
||||
|
||||
extern int ctrl_c;
|
||||
extern int nfp;
|
||||
extern int sis_verbose;
|
||||
extern char *sis_version;
|
||||
extern struct estate ebase;
|
||||
extern struct evcell evbuf[];
|
||||
extern struct irqcell irqarr[];
|
||||
extern int irqpend, ext_irl;
|
||||
extern char uart_dev1[];
|
||||
extern char uart_dev2[];
|
||||
|
||||
#ifdef IUREV0
|
||||
extern int iurev0;
|
||||
#endif
|
||||
|
||||
#ifdef MECREV0
|
||||
extern int mecrev0;
|
||||
#endif
|
||||
|
||||
run_sim(sregs, go, icount, dis)
|
||||
struct pstate *sregs;
|
||||
int go;
|
||||
unsigned int icount;
|
||||
int dis;
|
||||
{
|
||||
int mexc, ws;
|
||||
|
||||
sregs->starttime = time(NULL);
|
||||
while (!sregs->err_mode & (go || (icount > 0))) {
|
||||
if (sregs->bptnum && check_bpt(sregs))
|
||||
return (BPT_HIT);
|
||||
sregs->bphit = 0;
|
||||
sregs->fhold = 0;
|
||||
sregs->hold = 0;
|
||||
sregs->icnt = 0;
|
||||
|
||||
sregs->asi = 9 - ((sregs->psr & 0x080) >> 7);
|
||||
|
||||
#ifdef IUREV0
|
||||
if (iurev0 && sregs->rett_err) {
|
||||
sregs->asi &= ~0x1;
|
||||
sregs->asi |= ((sregs->psr & 0x040) >> 6);
|
||||
}
|
||||
#endif
|
||||
|
||||
mexc = memory_read(sregs->asi, sregs->pc, &sregs->inst, &sregs->hold);
|
||||
|
||||
if (sregs->annul) {
|
||||
sregs->annul = 0;
|
||||
sregs->icnt = 1;
|
||||
sregs->pc = sregs->npc;
|
||||
sregs->npc = sregs->npc + 4;
|
||||
mexc = 0; /* Traps ignored during annul */
|
||||
} else {
|
||||
check_interrupts(sregs);
|
||||
if (sregs->trap) {
|
||||
sregs->err_mode = execute_trap(sregs);
|
||||
} else {
|
||||
if (mexc) {
|
||||
sregs->trap = I_ACC_EXC;
|
||||
} else {
|
||||
if (sregs->histlen) {
|
||||
sregs->histbuf[sregs->histind].addr = sregs->pc;
|
||||
sregs->histbuf[sregs->histind].time = ebase.simtime;
|
||||
sregs->histind++;
|
||||
if (sregs->histind >= sregs->histlen)
|
||||
sregs->histind = 0;
|
||||
}
|
||||
if (dis) {
|
||||
printf(" %8u ", ebase.simtime);
|
||||
dis_mem(sregs->pc, 1, &dinfo);
|
||||
}
|
||||
dispatch_instruction(sregs);
|
||||
}
|
||||
icount--;
|
||||
}
|
||||
if (sregs->trap) {
|
||||
sregs->err_mode = execute_trap(sregs);
|
||||
}
|
||||
}
|
||||
advance_time(sregs);
|
||||
if (ctrl_c) {
|
||||
go = icount = 0;
|
||||
}
|
||||
}
|
||||
sregs->tottime += time(NULL) - sregs->starttime;
|
||||
if (sregs->err_mode)
|
||||
error_mode(sregs->pc);
|
||||
if (sregs->err_mode)
|
||||
return (ERROR);
|
||||
if (ctrl_c) {
|
||||
ctrl_c = 0;
|
||||
return (CTRL_C);
|
||||
}
|
||||
return (TIME_OUT);
|
||||
}
|
||||
|
||||
main(argc, argv)
|
||||
int argc;
|
||||
char **argv;
|
||||
{
|
||||
|
||||
int cont = 1;
|
||||
int stat = 1;
|
||||
int freq = 14;
|
||||
int copt = 0;
|
||||
|
||||
char lastcmd[128] = "reg";
|
||||
char *cmd, *cfile, *bacmd;
|
||||
char *cmdq[HIST_LEN];
|
||||
int cmdi = 0;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 64; i++)
|
||||
cmdq[i] = 0;
|
||||
printf("\n SIS - SPARC intruction simulator %s, copyright Jiri Gaisler 1995\n", sis_version);
|
||||
printf(" Bug-reports to jgais@wd.estec.esa.nl\n\n");
|
||||
while (stat < argc) {
|
||||
if (argv[stat][0] == '-') {
|
||||
if (strcmp(argv[stat], "-v") == 0) {
|
||||
sis_verbose = 1;
|
||||
} else if (strcmp(argv[stat], "-c") == 0) {
|
||||
if ((stat + 1) < argc) {
|
||||
copt = 1;
|
||||
cfile = argv[++stat];
|
||||
}
|
||||
} else if (strcmp(argv[stat], "-nfp") == 0)
|
||||
nfp = 1;
|
||||
#ifdef IUREV0
|
||||
else if (strcmp(argv[stat], "-iurev0") == 0)
|
||||
iurev0 = 1;
|
||||
#endif
|
||||
#ifdef MECREV0
|
||||
else if (strcmp(argv[stat], "-mecrev0") == 0)
|
||||
mecrev0 = 1;
|
||||
#endif
|
||||
else if (strcmp(argv[stat], "-uart1") == 0) {
|
||||
if ((stat + 1) < argc)
|
||||
strcpy(uart_dev1, argv[++stat]);
|
||||
} else if (strcmp(argv[stat], "-uart2") == 0) {
|
||||
if ((stat + 1) < argc)
|
||||
strcpy(uart_dev2, argv[++stat]);
|
||||
} else if (strcmp(argv[stat], "-freq") == 0) {
|
||||
if ((stat + 1) < argc)
|
||||
freq = VAL(argv[++stat]);
|
||||
} else {
|
||||
printf("unknown option %s\n", argv[stat]);
|
||||
usage();
|
||||
exit(1);
|
||||
}
|
||||
} else {
|
||||
bfd_load(argv[stat]);
|
||||
}
|
||||
stat++;
|
||||
}
|
||||
#ifdef IUREV0
|
||||
if (iurev0)
|
||||
printf(" simulating IU rev.0 jmpl/restore bug\n");
|
||||
#endif
|
||||
#ifdef MECREV0
|
||||
if (iurev0)
|
||||
printf(" simulating MEC rev.0 timer and uart interrupt bug\n");
|
||||
#endif
|
||||
if (nfp)
|
||||
printf("FPU disabled\n");
|
||||
sregs.freq = freq;
|
||||
|
||||
INIT_DISASSEMBLE_INFO(dinfo, stdout, (fprintf_ftype) fprintf);
|
||||
|
||||
using_history();
|
||||
init_signals();
|
||||
ebase.simtime = 0;
|
||||
reset_all();
|
||||
init_bpt(&sregs);
|
||||
init_sim();
|
||||
#ifdef STAT
|
||||
reset_stat(&sregs);
|
||||
#endif
|
||||
|
||||
if (copt) {
|
||||
bacmd = (char *) malloc(256);
|
||||
strcpy(bacmd, "batch ");
|
||||
strcat(bacmd, cfile);
|
||||
exec_cmd(&sregs, bacmd);
|
||||
}
|
||||
while (cont) {
|
||||
|
||||
if (cmdq[cmdi] != 0) {
|
||||
remove_history(cmdq[cmdi]);
|
||||
free(cmdq[cmdi]);
|
||||
cmdq[cmdi] = 0;
|
||||
}
|
||||
cmdq[cmdi] = readline("sis> ");
|
||||
if (cmdq[cmdi] && *cmdq[cmdi])
|
||||
add_history(cmdq[cmdi]);
|
||||
if (cmdq[cmdi])
|
||||
stat = exec_cmd(&sregs, cmdq[cmdi]);
|
||||
else {
|
||||
puts("\n");
|
||||
exit(0);
|
||||
}
|
||||
switch (stat) {
|
||||
case OK:
|
||||
break;
|
||||
case CTRL_C:
|
||||
printf("\b\bInterrupt!\n");
|
||||
case TIME_OUT:
|
||||
printf(" Stopped at time %d\n", ebase.simtime);
|
||||
break;
|
||||
case BPT_HIT:
|
||||
printf("breakpoint at 0x%08x reached\n", sregs.pc);
|
||||
sregs.bphit = 1;
|
||||
break;
|
||||
case ERROR:
|
||||
printf("IU in error mode (%d)\n", sregs.trap);
|
||||
stat = 0;
|
||||
printf(" %8d ", ebase.simtime);
|
||||
dis_mem(sregs.pc, 1, &dinfo);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
ctrl_c = 0;
|
||||
stat = OK;
|
||||
|
||||
cmdi = (cmdi + 1) & (HIST_LEN - 1);
|
||||
|
||||
}
|
||||
}
|
Loading…
Reference in a new issue