Fix all failing FPXX tests for tx39-elf.
ld/testsuite/ * ld-mips-elf/attr-gnu-4-00.d: Relax check for ISA extension. * ld-mips-elf/attr-gnu-4-01.d: Likewise. * ld-mips-elf/attr-gnu-4-02.d: Likewise. * ld-mips-elf/attr-gnu-4-03.d: Likewise. * ld-mips-elf/attr-gnu-4-08.d: Likewise. * ld-mips-elf/attr-gnu-4-10.d: Likewise. * ld-mips-elf/attr-gnu-4-11.d: Likewise. * ld-mips-elf/attr-gnu-4-18.d: Likewise. * ld-mips-elf/attr-gnu-4-20.d: Likewise. * ld-mips-elf/attr-gnu-4-22.d: Likewise. * ld-mips-elf/attr-gnu-4-28.d: Likewise. * ld-mips-elf/attr-gnu-4-30.d: Likewise. * ld-mips-elf/attr-gnu-4-33.d: Likewise. * ld-mips-elf/attr-gnu-4-38.d: Likewise. * ld-mips-elf/attr-gnu-4-44.d: Likewise.
This commit is contained in:
parent
6e8ec71244
commit
d340a82588
16 changed files with 33 additions and 15 deletions
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@ -1,3 +1,21 @@
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2014-12-19 Matthew Fortune <matthew.fortune@imgtec.com>
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* ld-mips-elf/attr-gnu-4-00.d: Relax check for ISA extension.
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* ld-mips-elf/attr-gnu-4-01.d: Likewise.
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* ld-mips-elf/attr-gnu-4-02.d: Likewise.
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* ld-mips-elf/attr-gnu-4-03.d: Likewise.
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* ld-mips-elf/attr-gnu-4-08.d: Likewise.
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* ld-mips-elf/attr-gnu-4-10.d: Likewise.
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* ld-mips-elf/attr-gnu-4-11.d: Likewise.
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* ld-mips-elf/attr-gnu-4-18.d: Likewise.
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* ld-mips-elf/attr-gnu-4-20.d: Likewise.
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* ld-mips-elf/attr-gnu-4-22.d: Likewise.
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* ld-mips-elf/attr-gnu-4-28.d: Likewise.
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* ld-mips-elf/attr-gnu-4-30.d: Likewise.
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* ld-mips-elf/attr-gnu-4-33.d: Likewise.
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* ld-mips-elf/attr-gnu-4-38.d: Likewise.
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* ld-mips-elf/attr-gnu-4-44.d: Likewise.
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2014-12-19 Matthew Fortune <matthew.fortune@imgtec.com>
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* ld-mips-elf/mips-elf.exp: Update undefweak-overflow tests.
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@ -10,7 +10,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Hard or soft float
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -14,7 +14,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Hard float \(double precision\)
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -14,7 +14,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Hard float \(single precision\)
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -15,7 +15,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Soft float
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -14,7 +14,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: \?\?\? \(8\)
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -35,7 +35,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Hard float \(double precision\)
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -14,7 +14,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Hard float \(double precision\)
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -15,7 +15,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Hard float \(double precision\)
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -14,7 +14,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Hard float \(single precision\)
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -14,7 +14,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Hard float \(single precision\)
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -15,7 +15,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Hard float \(single precision\)
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -14,7 +14,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Soft float
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -14,7 +14,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Soft float
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -15,7 +15,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Soft float
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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@ -14,7 +14,7 @@ GPR size: .*
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CPR1 size: .*
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CPR2 size: 0
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FP ABI: Hard float \(MIPS32r2 64-bit FPU 12 callee-saved\)
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ISA Extension: None
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ISA Extension: .*
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ASEs:
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None
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FLAGS 1: 0000000.
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