* testsuite/gas/aarch64/diagnostic.s: Update.
	* testsuite/gas/aarch64/diagnostic.l: Ditto.
	* testsuite/gas/aarch64/movi.s: Add new tests.
	* testsuite/gas/aarch64/movi.d: Update.

opcodes/

	* aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Remove assertion.
	* aarch64-opc.c (operand_general_constraint_met_p): Relax the range
	check from [0, 255] to [-128, 255].
This commit is contained in:
Yufeng Zhang 2013-05-13 22:28:27 +00:00
parent 55fb6d274d
commit d2865ed314
8 changed files with 27 additions and 7 deletions

View file

@ -1,3 +1,10 @@
2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com>
* testsuite/gas/aarch64/diagnostic.s: Update.
* testsuite/gas/aarch64/diagnostic.l: Ditto.
* testsuite/gas/aarch64/movi.s: Add new tests.
* testsuite/gas/aarch64/movi.d: Update.
2013-05-09 Andrew Pinski <apinski@cavium.com>
* config/tc-mips.c (struct mips_set_options): New ase_virt field.

View file

@ -38,8 +38,8 @@
[^:]*:40: Error: invalid shift amount at operand 3 -- `shll v1.4s,v2.4h,#32'
[^:]*:41: Error: immediate value out of range 0 to 31 at operand 3 -- `shl v1.2s,v2.2s,32'
[^:]*:42: Error: immediate value out of range 1 to 8 at operand 3 -- `sqshrn2 v2.16b,v3.8h,#17'
[^:]*:43: Error: immediate value out of range 0 to 255 at operand 2 -- `movi v1.4h,256'
[^:]*:44: Error: immediate value out of range 0 to 255 at operand 2 -- `movi v1.4h,-1'
[^:]*:43: Error: immediate value out of range -128 to 255 at operand 2 -- `movi v1.4h,256'
[^:]*:44: Error: immediate value out of range -128 to 255 at operand 2 -- `movi v1.4h,-129'
[^:]*:45: Error: invalid shift operator at operand 2 -- `movi v1.4h,255,msl#8'
[^:]*:46: Error: invalid value for immediate at operand 2 -- `movi d0,256'
[^:]*:47: Error: immediate value should be a multiple of 8 at operand 2 -- `movi v1.4h,255,lsl#7'

View file

@ -41,7 +41,7 @@
shl v1.2s, v2.2s, 32
sqshrn2 v2.16b, v3.8h, #17
movi v1.4h, 256
movi v1.4h, -1
movi v1.4h, -129
movi v1.4h, 255, msl #8
movi d0, 256
movi v1.4h, 255, lsl #7

View file

@ -8713,3 +8713,6 @@ Disassembly of section \.text:
8804: 6f07e7e0 movi v0.2d, #0xffffffffffffffff
8808: 6f07e7e0 movi v0.2d, #0xffffffffffffffff
880c: 2f07e7ff movi d31, #0xffffffffffffffff
8810: 0f04e403 movi v3.8b, #0x80
8814: 0f04e423 movi v3.8b, #0x81
8818: 0f07e7e3 movi v3.8b, #0xff

View file

@ -113,3 +113,8 @@
movi v0.2d, bignum
movi d31, 18446744073709551615
.set bignum, 0xffffffffffffffff
// Allow -128 to 255 in #<imm8>
movi v3.8b, -128
movi v3.8b, -127
movi v3.8b, -1

View file

@ -1,3 +1,9 @@
2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Remove assertion.
* aarch64-opc.c (operand_general_constraint_met_p): Relax the range
check from [0, 255] to [-128, 255].
2013-05-09 Andrew Pinski <apinski@cavium.com>
* mips-dis.c (mips_arch_choices): Add INSN_VIRT to mips32r2.

View file

@ -370,7 +370,6 @@ aarch64_ins_advsimd_imm_modified (const aarch64_operand *self ATTRIBUTE_UNUSED,
imm = aarch64_shrink_expanded_imm8 (imm);
assert ((int)imm >= 0);
}
assert (imm <= 255);
insert_fields (code, imm, 0, 2, FLD_defgh, FLD_abc);
if (kind == AARCH64_MOD_NONE)

View file

@ -1724,10 +1724,10 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
assert (idx == 1);
if (aarch64_get_qualifier_esize (opnds[0].qualifier) != 8)
{
/* uimm8 */
if (!value_in_range_p (opnd->imm.value, 0, 255))
/* uimm8 or simm8 */
if (!value_in_range_p (opnd->imm.value, -128, 255))
{
set_imm_out_of_range_error (mismatch_detail, idx, 0, 255);
set_imm_out_of_range_error (mismatch_detail, idx, -128, 255);
return 0;
}
}