* elfxx-mips.c (LA25_LUI_MICROMIPS_1, LA25_LUI_MICROMIPS_2):
Remove macros, folding them into... (LA25_LUI_MICROMIPS): ... this new macro. (LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise into... (LA25_J_MICROMIPS): ... this new macro. (LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise into... (LA25_ADDIU_MICROMIPS): ... this new macro. (bfd_put_micromips_32, bfd_get_micromips_32): New functions. (mips_elf_create_la25_stub): Use them. (check_br32_dslot, check_br32, check_relocated_bzc): Likewise. (_bfd_mips_elf_relax_section): Likewise.
This commit is contained in:
parent
1969df8919
commit
d21911eadd
2 changed files with 60 additions and 45 deletions
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@ -1,3 +1,18 @@
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2012-08-09 Maciej W. Rozycki <macro@codesourcery.com>
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* elfxx-mips.c (LA25_LUI_MICROMIPS_1, LA25_LUI_MICROMIPS_2):
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Remove macros, folding them into...
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(LA25_LUI_MICROMIPS): ... this new macro.
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(LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise into...
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(LA25_J_MICROMIPS): ... this new macro.
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(LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise
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into...
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(LA25_ADDIU_MICROMIPS): ... this new macro.
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(bfd_put_micromips_32, bfd_get_micromips_32): New functions.
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(mips_elf_create_la25_stub): Use them.
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(check_br32_dslot, check_br32, check_relocated_bzc): Likewise.
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(_bfd_mips_elf_relax_section): Likewise.
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2012-08-09 Alan Modra <amodra@gmail.com>
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Tom Tromey <tromey@redhat.com>
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@ -306,12 +306,12 @@ struct mips_elf_la25_stub {
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#define LA25_LUI(VAL) (0x3c190000 | (VAL)) /* lui t9,VAL */
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#define LA25_J(VAL) (0x08000000 | (((VAL) >> 2) & 0x3ffffff)) /* j VAL */
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#define LA25_ADDIU(VAL) (0x27390000 | (VAL)) /* addiu t9,t9,VAL */
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#define LA25_LUI_MICROMIPS_1(VAL) (0x41b9) /* lui t9,VAL */
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#define LA25_LUI_MICROMIPS_2(VAL) (VAL)
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#define LA25_J_MICROMIPS_1(VAL) (0xd400 | (((VAL) >> 17) & 0x3ff)) /* j VAL */
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#define LA25_J_MICROMIPS_2(VAL) ((VAL) >> 1)
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#define LA25_ADDIU_MICROMIPS_1(VAL) (0x3339) /* addiu t9,t9,VAL */
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#define LA25_ADDIU_MICROMIPS_2(VAL) (VAL)
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#define LA25_LUI_MICROMIPS(VAL) \
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(0x41b90000 | (VAL)) /* lui t9,VAL */
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#define LA25_J_MICROMIPS(VAL) \
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(0xd4000000 | (((VAL) >> 1) & 0x3ffffff)) /* j VAL */
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#define LA25_ADDIU_MICROMIPS(VAL) \
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(0x33390000 | (VAL)) /* addiu t9,t9,VAL */
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/* This structure is passed to mips_elf_sort_hash_table_f when sorting
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the dynamic symbols. */
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@ -1013,6 +1013,23 @@ static const bfd_vma mips_vxworks_shared_plt_entry[] =
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0x24180000 /* li t8, <pltindex> */
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};
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/* microMIPS 32-bit opcode helper installer. */
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static void
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bfd_put_micromips_32 (const bfd *abfd, bfd_vma opcode, bfd_byte *ptr)
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{
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bfd_put_16 (abfd, (opcode >> 16) & 0xffff, ptr);
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bfd_put_16 (abfd, opcode & 0xffff, ptr + 2);
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}
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/* microMIPS 32-bit opcode helper retriever. */
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static bfd_vma
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bfd_get_micromips_32 (const bfd *abfd, const bfd_byte *ptr)
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{
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return (bfd_get_16 (abfd, ptr) << 16) | bfd_get_16 (abfd, ptr + 2);
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}
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/* Look up an entry in a MIPS ELF linker hash table. */
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#define mips_elf_link_hash_lookup(table, string, create, copy, follow) \
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@ -9777,14 +9794,12 @@ mips_elf_create_la25_stub (void **slot, void *data)
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loc += offset;
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if (ELF_ST_IS_MICROMIPS (stub->h->root.other))
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{
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bfd_put_16 (hti->output_bfd, LA25_LUI_MICROMIPS_1 (target_high),
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loc);
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bfd_put_16 (hti->output_bfd, LA25_LUI_MICROMIPS_2 (target_high),
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loc + 2);
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bfd_put_16 (hti->output_bfd, LA25_ADDIU_MICROMIPS_1 (target_low),
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loc + 4);
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bfd_put_16 (hti->output_bfd, LA25_ADDIU_MICROMIPS_2 (target_low),
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loc + 6);
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bfd_put_micromips_32 (hti->output_bfd,
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LA25_LUI_MICROMIPS (target_high),
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loc);
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bfd_put_micromips_32 (hti->output_bfd,
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LA25_ADDIU_MICROMIPS (target_low),
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loc + 4);
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}
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else
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{
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@ -9798,16 +9813,12 @@ mips_elf_create_la25_stub (void **slot, void *data)
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loc += offset;
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if (ELF_ST_IS_MICROMIPS (stub->h->root.other))
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{
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bfd_put_16 (hti->output_bfd, LA25_LUI_MICROMIPS_1 (target_high),
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loc);
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bfd_put_16 (hti->output_bfd, LA25_LUI_MICROMIPS_2 (target_high),
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loc + 2);
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bfd_put_16 (hti->output_bfd, LA25_J_MICROMIPS_1 (target), loc + 4);
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bfd_put_16 (hti->output_bfd, LA25_J_MICROMIPS_2 (target), loc + 6);
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bfd_put_16 (hti->output_bfd, LA25_ADDIU_MICROMIPS_1 (target_low),
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loc + 8);
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bfd_put_16 (hti->output_bfd, LA25_ADDIU_MICROMIPS_2 (target_low),
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loc + 10);
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bfd_put_micromips_32 (hti->output_bfd,
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LA25_LUI_MICROMIPS (target_high), loc);
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bfd_put_micromips_32 (hti->output_bfd,
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LA25_J_MICROMIPS (target), loc + 4);
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bfd_put_micromips_32 (hti->output_bfd,
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LA25_ADDIU_MICROMIPS (target_low), loc + 8);
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bfd_put_32 (hti->output_bfd, 0, loc + 12);
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}
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else
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@ -12340,7 +12351,7 @@ check_br32_dslot (bfd *abfd, bfd_byte *ptr)
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unsigned long opcode;
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int bdsize;
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opcode = (bfd_get_16 (abfd, ptr) << 16) | bfd_get_16 (abfd, ptr + 2);
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opcode = bfd_get_micromips_32 (abfd, ptr);
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if (find_match (opcode, ds_insns_32_bd32) >= 0)
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/* 32-bit branch/jump with a 32-bit delay slot. */
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bdsize = 4;
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@ -12385,7 +12396,7 @@ check_br32 (bfd *abfd, bfd_byte *ptr, unsigned long reg)
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{
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unsigned long opcode;
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opcode = (bfd_get_16 (abfd, ptr) << 16) | bfd_get_16 (abfd, ptr + 2);
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opcode = bfd_get_micromips_32 (abfd, ptr);
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if (MATCH (opcode, j_insn_32)
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/* J */
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|| MATCH (opcode, bc_insn_32)
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@ -12417,9 +12428,7 @@ check_relocated_bzc (bfd *abfd, const bfd_byte *ptr, bfd_vma offset,
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const Elf_Internal_Rela *irel;
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unsigned long opcode;
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opcode = bfd_get_16 (abfd, ptr);
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opcode <<= 16;
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opcode |= bfd_get_16 (abfd, ptr + 2);
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opcode = bfd_get_micromips_32 (abfd, ptr);
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if (find_match (opcode, bzc_insns_32) < 0)
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return FALSE;
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@ -12577,8 +12586,7 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec,
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if (irel->r_offset + 4 > sec->size)
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continue;
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opcode = bfd_get_16 (abfd, ptr ) << 16;
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opcode |= bfd_get_16 (abfd, ptr + 2);
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opcode = bfd_get_micromips_32 (abfd, ptr);
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/* This is the pc-relative distance from the instruction the
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relocation is applied to, to the symbol referred. */
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@ -12660,8 +12668,7 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec,
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continue;
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}
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nextopc = bfd_get_16 (abfd, contents + irel[1].r_offset ) << 16;
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nextopc |= bfd_get_16 (abfd, contents + irel[1].r_offset + 2);
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nextopc = bfd_get_micromips_32 (abfd, contents + irel[1].r_offset);
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/* Give up unless the same register is used with both
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relocations. */
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@ -12702,10 +12709,8 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec,
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nextopc = (addiupc_insn.match
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| ADDIUPC_REG_FIELD (OP32_TREG (nextopc)));
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bfd_put_16 (abfd, (nextopc >> 16) & 0xffff,
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contents + irel[1].r_offset);
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bfd_put_16 (abfd, nextopc & 0xffff,
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contents + irel[1].r_offset + 2);
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bfd_put_micromips_32 (abfd, nextopc,
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contents + irel[1].r_offset);
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}
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/* Can't do anything, give up, sigh... */
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@ -12739,8 +12744,7 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec,
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| BZC32_REG_FIELD (reg)
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| (opcode & 0xffff)); /* Addend value. */
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bfd_put_16 (abfd, (opcode >> 16) & 0xffff, ptr);
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bfd_put_16 (abfd, opcode & 0xffff, ptr + 2);
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bfd_put_micromips_32 (abfd, opcode, ptr);
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/* Delete the 16-bit delay slot NOP: two bytes from
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irel->offset + 4. */
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@ -12805,8 +12809,7 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec,
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unsigned long n32opc;
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bfd_boolean relaxed = FALSE;
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n32opc = bfd_get_16 (abfd, ptr + 4) << 16;
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n32opc |= bfd_get_16 (abfd, ptr + 6);
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n32opc = bfd_get_micromips_32 (abfd, ptr + 4);
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if (MATCH (n32opc, nop_insn_32))
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{
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@ -12833,10 +12836,7 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec,
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{
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/* JAL with 32-bit delay slot that is changed to a JALS
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with 16-bit delay slot. */
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bfd_put_16 (abfd, (jal_insn_32_bd16.match >> 16) & 0xffff,
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ptr);
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bfd_put_16 (abfd, jal_insn_32_bd16.match & 0xffff,
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ptr + 2);
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bfd_put_micromips_32 (abfd, jal_insn_32_bd16.match, ptr);
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/* Delete 2 bytes from irel->r_offset + 6. */
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delcnt = 2;
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