2004-09-03 Andrew Cagney <cagney@gnu.org>
* mips-tdep.c (temp_saved_regs): Delete. (set_reg_offset): Replace saved_regs parameter with this_cache. (heuristic_proc_desc, mips16_heuristic_proc_desc) (mips32_heuristic_proc_desc): Add this_cache parameter. (mips_insn32_frame_cache, mips_insn16_frame_cache) (after_prologue): Pass a NULL this_cache.
This commit is contained in:
Andrew Cagney
parent
9733cfe12b
commit
c9343fd1d0
2 changed files with 53 additions and 38 deletions
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@ -1,5 +1,12 @@
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2004-09-03 Andrew Cagney <cagney@gnu.org>
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* mips-tdep.c (temp_saved_regs): Delete.
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(set_reg_offset): Replace saved_regs parameter with this_cache.
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(heuristic_proc_desc, mips16_heuristic_proc_desc)
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(mips32_heuristic_proc_desc): Add this_cache parameter.
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(mips_insn32_frame_cache, mips_insn16_frame_cache)
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(after_prologue): Pass a NULL this_cache.
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* mips-tdep.c (mips_mdebug_frame_cache): Delete code handling
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non-kernel trap prologues.
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@ -58,7 +58,6 @@
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static const struct objfile_data *mips_pdr_data;
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static void set_reg_offset (CORE_ADDR *saved_regs, int regnum, CORE_ADDR off);
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static struct type *mips_register_type (struct gdbarch *gdbarch, int regnum);
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/* A useful bit in the CP0 status register (PS_REGNUM). */
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@ -420,8 +419,10 @@ mips_stack_argsize (struct gdbarch *gdbarch)
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#define VM_MIN_ADDRESS (CORE_ADDR)0x400000
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struct mips_frame_cache;
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static mips_extra_func_info_t heuristic_proc_desc (CORE_ADDR, CORE_ADDR,
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struct frame_info *);
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struct frame_info *,
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struct mips_frame_cache *);
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static mips_extra_func_info_t non_heuristic_proc_desc (CORE_ADDR pc,
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CORE_ADDR *addrptr);
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@ -912,7 +913,7 @@ after_prologue (CORE_ADDR pc)
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if (!proc_symbol || pc < val.pc)
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{
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mips_extra_func_info_t found_heuristic =
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heuristic_proc_desc (PROC_LOW_ADDR (proc_desc), pc, NULL);
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heuristic_proc_desc (PROC_LOW_ADDR (proc_desc), pc, NULL, NULL);
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if (found_heuristic)
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proc_desc = found_heuristic;
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}
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@ -922,7 +923,7 @@ after_prologue (CORE_ADDR pc)
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if (startaddr == 0)
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startaddr = heuristic_proc_start (pc);
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proc_desc = heuristic_proc_desc (startaddr, pc, NULL);
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proc_desc = heuristic_proc_desc (startaddr, pc, NULL, NULL);
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}
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if (proc_desc)
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@ -1815,7 +1816,11 @@ mips_insn16_frame_cache (struct frame_info *next_frame, void **this_cache)
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if (start_addr == 0)
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start_addr = heuristic_proc_start (pc);
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proc_desc = heuristic_proc_desc (start_addr, pc, next_frame);
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#ifdef NOT_YET
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proc_desc = heuristic_proc_desc (start_addr, pc, next_frame, this_cache);
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#else
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proc_desc = heuristic_proc_desc (start_addr, pc, next_frame, NULL);
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#endif
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}
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/* Extract the frame's base. */
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@ -2072,7 +2077,11 @@ mips_insn32_frame_cache (struct frame_info *next_frame, void **this_cache)
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if (start_addr == 0)
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start_addr = heuristic_proc_start (pc);
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proc_desc = heuristic_proc_desc (start_addr, pc, next_frame);
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#ifdef NOT_YET
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proc_desc = heuristic_proc_desc (start_addr, pc, next_frame, this_cache);
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#else
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proc_desc = heuristic_proc_desc (start_addr, pc, next_frame, NULL);
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#endif
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}
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if (proc_desc == NULL)
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@ -2435,13 +2444,6 @@ mips_software_single_step (enum target_signal sig, int insert_breakpoints_p)
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static struct mips_extra_func_info temp_proc_desc;
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/* This hack will go away once the get_prev_frame() code has been
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modified to set the frame's type first. That is BEFORE init extra
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frame info et.al. is called. This is because it will become
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possible to skip the init extra info call for sigtramp and dummy
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frames. */
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static CORE_ADDR *temp_saved_regs;
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/* Set a register's saved stack address in temp_saved_regs. If an
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address has already been set for this register, do nothing; this
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way we will only recognize the first save of a given register in a
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@ -2454,12 +2456,14 @@ static CORE_ADDR *temp_saved_regs;
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frame. */
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static void
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set_reg_offset (CORE_ADDR *saved_regs, int regno, CORE_ADDR offset)
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set_reg_offset (struct mips_frame_cache *this_cache, int regnum,
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CORE_ADDR offset)
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{
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if (saved_regs[regno] == 0)
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if (this_cache != NULL
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&& this_cache->saved_regs[regnum].addr == 0)
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{
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saved_regs[regno + 0 * NUM_REGS] = offset;
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saved_regs[regno + 1 * NUM_REGS] = offset;
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this_cache->saved_regs[regnum + 0 * NUM_REGS].addr = offset;
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this_cache->saved_regs[regnum + 1 * NUM_REGS].addr = offset;
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}
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}
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@ -2617,7 +2621,9 @@ mips16_get_imm (unsigned short prev_inst, /* previous instruction */
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static void
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mips16_heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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struct frame_info *next_frame, CORE_ADDR sp)
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CORE_ADDR sp,
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struct frame_info *next_frame,
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struct mips_frame_cache *this_cache)
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{
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CORE_ADDR cur_pc;
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CORE_ADDR frame_addr = 0; /* Value of $r17, used as frame pointer */
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@ -2655,26 +2661,26 @@ mips16_heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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offset = mips16_get_imm (prev_inst, inst, 8, 4, 0);
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reg = mips16_to_32_reg[(inst & 0x700) >> 8];
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PROC_REG_MASK (&temp_proc_desc) |= (1 << reg);
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set_reg_offset (temp_saved_regs, reg, sp + offset);
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set_reg_offset (this_cache, reg, sp + offset);
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}
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else if ((inst & 0xff00) == 0xf900) /* sd reg,n($sp) */
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{
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offset = mips16_get_imm (prev_inst, inst, 5, 8, 0);
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reg = mips16_to_32_reg[(inst & 0xe0) >> 5];
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PROC_REG_MASK (&temp_proc_desc) |= (1 << reg);
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set_reg_offset (temp_saved_regs, reg, sp + offset);
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set_reg_offset (this_cache, reg, sp + offset);
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}
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else if ((inst & 0xff00) == 0x6200) /* sw $ra,n($sp) */
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{
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offset = mips16_get_imm (prev_inst, inst, 8, 4, 0);
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PROC_REG_MASK (&temp_proc_desc) |= (1 << RA_REGNUM);
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set_reg_offset (temp_saved_regs, RA_REGNUM, sp + offset);
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set_reg_offset (this_cache, RA_REGNUM, sp + offset);
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}
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else if ((inst & 0xff00) == 0xfa00) /* sd $ra,n($sp) */
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{
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offset = mips16_get_imm (prev_inst, inst, 8, 8, 0);
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PROC_REG_MASK (&temp_proc_desc) |= (1 << RA_REGNUM);
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set_reg_offset (temp_saved_regs, RA_REGNUM, sp + offset);
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set_reg_offset (this_cache, RA_REGNUM, sp + offset);
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}
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else if (inst == 0x673d) /* move $s1, $sp */
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{
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@ -2693,14 +2699,14 @@ mips16_heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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offset = mips16_get_imm (prev_inst, inst, 5, 4, 0);
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reg = mips16_to_32_reg[(inst & 0xe0) >> 5];
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PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
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set_reg_offset (temp_saved_regs, reg, frame_addr + offset);
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set_reg_offset (this_cache, reg, frame_addr + offset);
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}
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else if ((inst & 0xFF00) == 0x7900) /* sd reg,offset($s1) */
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{
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offset = mips16_get_imm (prev_inst, inst, 5, 8, 0);
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reg = mips16_to_32_reg[(inst & 0xe0) >> 5];
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PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
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set_reg_offset (temp_saved_regs, reg, frame_addr + offset);
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set_reg_offset (this_cache, reg, frame_addr + offset);
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}
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else if ((inst & 0xf81f) == 0xe809 && (inst & 0x700) != 0x700) /* entry */
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entry_inst = inst; /* save for later processing */
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@ -2730,7 +2736,7 @@ mips16_heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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for (reg = 4, offset = 0; reg < areg_count + 4; reg++)
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{
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PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
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set_reg_offset (temp_saved_regs, reg, sp + offset);
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set_reg_offset (this_cache, reg, sp + offset);
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offset += mips_abi_regsize (current_gdbarch);
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}
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@ -2739,7 +2745,7 @@ mips16_heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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if (entry_inst & 0x20)
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{
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PROC_REG_MASK (&temp_proc_desc) |= 1 << RA_REGNUM;
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set_reg_offset (temp_saved_regs, RA_REGNUM, sp + offset);
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set_reg_offset (this_cache, RA_REGNUM, sp + offset);
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offset -= mips_abi_regsize (current_gdbarch);
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}
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@ -2747,7 +2753,7 @@ mips16_heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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for (reg = 16; reg < sreg_count + 16; reg++)
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{
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PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
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set_reg_offset (temp_saved_regs, reg, sp + offset);
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set_reg_offset (this_cache, reg, sp + offset);
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offset -= mips_abi_regsize (current_gdbarch);
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}
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}
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@ -2755,13 +2761,14 @@ mips16_heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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static void
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mips32_heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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struct frame_info *next_frame, CORE_ADDR sp)
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CORE_ADDR sp, struct frame_info *next_frame,
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struct mips_frame_cache *this_cache)
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{
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CORE_ADDR cur_pc;
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CORE_ADDR frame_addr = 0; /* Value of $r30. Used by gcc for frame-pointer */
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restart:
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temp_saved_regs = xrealloc (temp_saved_regs, SIZEOF_FRAME_SAVED_REGS);
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memset (temp_saved_regs, '\0', SIZEOF_FRAME_SAVED_REGS);
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this_cache = xrealloc (this_cache, SIZEOF_FRAME_SAVED_REGS);
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memset (this_cache, '\0', SIZEOF_FRAME_SAVED_REGS);
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PROC_FRAME_OFFSET (&temp_proc_desc) = 0;
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PROC_FRAME_ADJUST (&temp_proc_desc) = 0; /* offset of FP from SP */
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for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS_INSTLEN)
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@ -2792,14 +2799,14 @@ restart:
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else if ((high_word & 0xFFE0) == 0xafa0) /* sw reg,offset($sp) */
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{
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PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
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set_reg_offset (temp_saved_regs, reg, sp + low_word);
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set_reg_offset (this_cache, reg, sp + low_word);
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}
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else if ((high_word & 0xFFE0) == 0xffa0) /* sd reg,offset($sp) */
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{
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/* Irix 6.2 N32 ABI uses sd instructions for saving $gp and
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$ra. */
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PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
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set_reg_offset (temp_saved_regs, reg, sp + low_word);
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set_reg_offset (this_cache, reg, sp + low_word);
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}
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else if (high_word == 0x27be) /* addiu $30,$sp,size */
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{
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@ -2849,14 +2856,15 @@ restart:
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else if ((high_word & 0xFFE0) == 0xafc0) /* sw reg,offset($30) */
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{
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PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
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set_reg_offset (temp_saved_regs, reg, frame_addr + low_word);
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set_reg_offset (this_cache, reg, frame_addr + low_word);
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}
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}
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}
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static mips_extra_func_info_t
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heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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struct frame_info *next_frame)
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struct frame_info *next_frame,
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struct mips_frame_cache *this_cache)
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{
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CORE_ADDR sp;
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@ -2870,8 +2878,6 @@ heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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if (start_pc == 0)
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return NULL;
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memset (&temp_proc_desc, '\0', sizeof (temp_proc_desc));
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temp_saved_regs = xrealloc (temp_saved_regs, SIZEOF_FRAME_SAVED_REGS);
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memset (temp_saved_regs, '\0', SIZEOF_FRAME_SAVED_REGS);
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PROC_LOW_ADDR (&temp_proc_desc) = start_pc;
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PROC_FRAME_REG (&temp_proc_desc) = MIPS_SP_REGNUM;
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PROC_PC_REG (&temp_proc_desc) = RA_REGNUM;
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@ -2879,9 +2885,11 @@ heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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if (start_pc + 200 < limit_pc)
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limit_pc = start_pc + 200;
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if (pc_is_mips16 (start_pc))
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mips16_heuristic_proc_desc (start_pc, limit_pc, next_frame, sp);
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mips16_heuristic_proc_desc (start_pc, limit_pc, sp,
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next_frame, this_cache);
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else
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mips32_heuristic_proc_desc (start_pc, limit_pc, next_frame, sp);
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mips32_heuristic_proc_desc (start_pc, limit_pc, sp,
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next_frame, this_cache);
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return &temp_proc_desc;
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}
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