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2005-09-26  Jan Beulich  <jbeulich@novell.com>

	* amd64-tdep.h (AMD64_FCTRL_REGNUM, AMD64_FSTAT_REGNUM,
	AMD64_MXCSR_REGNUM): New.
	* amd64-tdep.c (amd64_dwarf_regmap): Add eflags, selector regs,
	mxcsr, fp control and status words.
	* i386-tdep.c (): Add selector regs, mxcsr, fp control and status
	words.
This commit is contained in:
Jan Beulich 2005-09-26 06:59:39 +00:00
parent 2af48f6826
commit c6f4c129c6
4 changed files with 56 additions and 3 deletions
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9
gdb/ChangeLog
View file

@ -1,3 +1,12 @@
2005-09-26 Jan Beulich <jbeulich@novell.com>
* amd64-tdep.h (AMD64_FCTRL_REGNUM, AMD64_FSTAT_REGNUM,
AMD64_MXCSR_REGNUM): New.
* amd64-tdep.c (amd64_dwarf_regmap): Add eflags, selector regs,
mxcsr, fp control and status words.
* i386-tdep.c (): Add selector regs, mxcsr, fp control and status
words.
2005-09-26 Paul Brook <paul@codesourcery.com>
* arm-tdep.c (arm_type_align): New function.

30
gdb/amd64-tdep.c
View file

@ -212,7 +212,35 @@ static int amd64_dwarf_regmap[] =
AMD64_ST0_REGNUM + 0, AMD64_ST0_REGNUM + 1,
AMD64_ST0_REGNUM + 2, AMD64_ST0_REGNUM + 3,
AMD64_ST0_REGNUM + 4, AMD64_ST0_REGNUM + 5,
AMD64_ST0_REGNUM + 6, AMD64_ST0_REGNUM + 7
AMD64_ST0_REGNUM + 6, AMD64_ST0_REGNUM + 7,
/* Control and Status Flags Register. */
AMD64_EFLAGS_REGNUM,
/* Selector Registers. */
AMD64_ES_REGNUM,
AMD64_CS_REGNUM,
AMD64_SS_REGNUM,
AMD64_DS_REGNUM,
AMD64_FS_REGNUM,
AMD64_GS_REGNUM,
-1,
-1,
/* Segment Base Address Registers. */
-1,
-1,
-1,
-1,
/* Special Selector Registers. */
-1,
-1,
/* Floating Point Control Registers. */
AMD64_MXCSR_REGNUM,
AMD64_FCTRL_REGNUM,
AMD64_FSTAT_REGNUM
};
static const int amd64_dwarf_regmap_len =

5
gdb/amd64-tdep.h
View file

@ -52,8 +52,11 @@ enum amd64_regnum
AMD64_FS_REGNUM, /* %fs */
AMD64_GS_REGNUM, /* %gs */
AMD64_ST0_REGNUM = 24, /* %st0 */
AMD64_FCTRL_REGNUM = AMD64_ST0_REGNUM + 8,
AMD64_FSTAT_REGNUM = AMD64_ST0_REGNUM + 9,
AMD64_XMM0_REGNUM = 40, /* %xmm0 */
AMD64_XMM1_REGNUM /* %xmm1 */
AMD64_XMM1_REGNUM, /* %xmm1 */
AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16
};
/* Number of general purpose registers. */

15
gdb/i386-tdep.c
View file

@ -225,12 +225,25 @@ i386_svr4_reg_to_regnum (int reg)
/* Floating-point registers. */
return reg - 11 + I387_ST0_REGNUM;
}
else if (reg >= 21)
else if (reg >= 21 && reg <= 36)
{
/* The SSE and MMX registers have the same numbers as with dbx. */
return i386_dbx_reg_to_regnum (reg);
}
switch (reg)
{
case 37: return I387_FCTRL_REGNUM;
case 38: return I387_FSTAT_REGNUM;
case 39: return I387_MXCSR_REGNUM;
case 40: return I386_ES_REGNUM;
case 41: return I386_CS_REGNUM;
case 42: return I386_SS_REGNUM;
case 43: return I386_DS_REGNUM;
case 44: return I386_FS_REGNUM;
case 45: return I386_GS_REGNUM;
}
/* This will hopefully provoke a warning. */
return NUM_REGS + NUM_PSEUDO_REGS;
}