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[BFD][AARCH64]Fix MOVW_SABS_G(0,1,2) relocation overflow check.

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For these three relocations, 17 bit signed value should be used, instead of
16 bit. The bitsize field is changed from 16 to 17, this field in aarch64
backend is used for overflow check only.

bfd/

2016-02-26  Renlin Li  <renlin.li@arm.com>

    * elfnn-aarch64.c (elfNN_aarch64_howto_table): Fix signed overflow
    check for MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2.

ld/

2016-02-26  Renlin Li  <renlin.li@arm.com>

    * testsuite/ld-aarch64/aarch64-elf.exp: Run new testcases.
    * testsuite/ld-aarch64/emit-relocs-270.d: Update to use new boundary.
    * testsuite/ld-aarch64/emit-relocs-271.d: Likewise.
    * testsuite/ld-aarch64/emit-relocs-272.d: Likewise.
    * testsuite/ld-aarch64/emit-relocs-270-overflow.d: New.
    * testsuite/ld-aarch64/emit-relocs-270-overflow.s: New.
    * testsuite/ld-aarch64/emit-relocs-271-overflow.d: New.
    * testsuite/ld-aarch64/emit-relocs-271-overflow.s: New.
    * testsuite/ld-aarch64/emit-relocs-272-overflow.d: New.
    * testsuite/ld-aarch64/emit-relocs-272-overflow.s: New.
This commit is contained in:
Renlin Li 2016-02-26 17:52:34 +00:00
parent bae420ef26
commit c5e3a3641e
13 changed files with 79 additions and 29 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
bfd/ChangeLog
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@ -1,3 +1,8 @@
2016-02-26 Renlin Li <renlin.li@arm.com>
* elfnn-aarch64.c (elfNN_aarch64_howto_table): Fix signed overflow
check for MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2.
2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19609

6
bfd/elfnn-aarch64.c
View file

@ -575,7 +575,7 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
HOWTO (AARCH64_R (MOVW_SABS_G0), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
17, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
@ -590,7 +590,7 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
HOWTO64 (AARCH64_R (MOVW_SABS_G1), /* type */
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
17, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
@ -605,7 +605,7 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
HOWTO64 (AARCH64_R (MOVW_SABS_G2), /* type */
32, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
17, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */

13
ld/ChangeLog
View file

@ -1,3 +1,16 @@
2016-02-26 Renlin Li <renlin.li@arm.com>
* testsuite/ld-aarch64/aarch64-elf.exp: Run new testcases.
* testsuite/ld-aarch64/emit-relocs-270.d: Update to use new boundary.
* testsuite/ld-aarch64/emit-relocs-271.d: Likewise.
* testsuite/ld-aarch64/emit-relocs-272.d: Likewise.
* testsuite/ld-aarch64/emit-relocs-270-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-270-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-271-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-271-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-272-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-272-overflow.s: New.
2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19609

3
ld/testsuite/ld-aarch64/aarch64-elf.exp
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@ -96,8 +96,11 @@ run_dump_test "emit-relocs-269"
run_dump_test "emit-relocs-269-bad"
run_dump_test "emit-relocs-270"
run_dump_test "emit-relocs-270-bad"
run_dump_test "emit-relocs-270-overflow"
run_dump_test "emit-relocs-271"
run_dump_test "emit-relocs-271-overflow"
run_dump_test "emit-relocs-272"
run_dump_test "emit-relocs-272-overflow"
run_dump_test "emit-relocs-273"
run_dump_test "emit-relocs-274"
run_dump_test "emit-relocs-275"

5
ld/testsuite/ld-aarch64/emit-relocs-270-overflow.d Normal file
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@ -0,0 +1,5 @@
#source: emit-relocs-270-overflow.s
#ld: -T relocs.ld --defsym tempy=0x10000 --defsym tempy1=-0x10001 -e0 --emit-relocs
#objdump: -dr
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_SABS_G0 against symbol `tempy' .*
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_SABS_G0 against symbol `tempy1' .*

6
ld/testsuite/ld-aarch64/emit-relocs-270-overflow.s Normal file
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@ -0,0 +1,6 @@
.comm gempy,4,4
.text
movz x4, :abs_g0_s:tempy
movz x5, :abs_g0_s:tempy1

17
ld/testsuite/ld-aarch64/emit-relocs-270.d
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@ -1,14 +1,13 @@
#source: emit-relocs-270.s
#ld: -T relocs.ld --defsym tempy=0x1012 --defsym tempy2=0x4500 --defsym tempy3=-292 -e0 --emit-relocs
#objdump: -dr -Mno-aliases
#ld: -T relocs.ld --defsym tempy=0xffff --defsym tempy2=0x4500 --defsym tempy3=-0x10000 -e0 --emit-relocs
#objdump: -dr
#...
+10000: 8a000000 and x0, x0, x0
+10004: 92400000 and x0, x0, #0x1
+10008: d2820244 movz x4, #0x1012
+10008: R_AARCH64_MOVW_SABS_G0 tempy
+1000c: d288a007 movz x7, #0x4500
+1000c: R_AARCH64_MOVW_SABS_G0 tempy2
+10010: 92802471 movn x17, #0x123
+10010: R_AARCH64_MOVW_SABS_G0 tempy3
+10008: d29fffe4 mov x4, #0xffff // #65535
10008: R_AARCH64_MOVW_SABS_G0 tempy
+1000c: d288a007 mov x7, #0x4500 // #17664
1000c: R_AARCH64_MOVW_SABS_G0 tempy2
+10010: 929ffff1 mov x17, #0xffffffffffff0000 // #-65536
10010: R_AARCH64_MOVW_SABS_G0 tempy3

5
ld/testsuite/ld-aarch64/emit-relocs-271-overflow.d Normal file
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@ -0,0 +1,5 @@
#source: emit-relocs-271-overflow.s
#ld: -T relocs.ld --defsym tempy=0x100000000 --defsym tempy1=-0x100000001 -e0 --emit-relocs
#objdump: -dr
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_SABS_G1 against symbol `tempy' .*
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_SABS_G1 against symbol `tempy1' .*

5
ld/testsuite/ld-aarch64/emit-relocs-271-overflow.s Normal file
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@ -0,0 +1,5 @@
.comm gempy,4,4
.text
movz x4, :abs_g1_s:tempy
movz x5, :abs_g1_s:tempy1

17
ld/testsuite/ld-aarch64/emit-relocs-271.d
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@ -1,14 +1,13 @@
#source: emit-relocs-271.s
#ld: -T relocs.ld --defsym tempy=0x1012 --defsym tempy2=0x674500 --defsym tempy3=-292 -e0 --emit-relocs
#objdump: -dr -Mno-aliases
#ld: -T relocs.ld --defsym tempy=0xffffffff --defsym tempy2=0x674500 --defsym tempy3=-0x100000000 -e0 --emit-relocs
#objdump: -dr
#...
+10000: 8a000000 and x0, x0, x0
+10004: 92400000 and x0, x0, #0x1
+10008: d2a00004 movz x4, #0x0, lsl #16
+10008: R_AARCH64_MOVW_SABS_G1 tempy
+1000c: d2a00ce7 movz x7, #0x67, lsl #16
+1000c: R_AARCH64_MOVW_SABS_G1 tempy2
+10010: 92a00011 movn x17, #0x0, lsl #16
+10010: R_AARCH64_MOVW_SABS_G1 tempy3
+10008: d2bfffe4 mov x4, #0xffff0000 // #4294901760
10008: R_AARCH64_MOVW_SABS_G1 tempy
+1000c: d2a00ce7 mov x7, #0x670000 // #6750208
1000c: R_AARCH64_MOVW_SABS_G1 tempy2
+10010: 92bffff1 mov x17, #0xffffffff0000ffff // #-4294901761
10010: R_AARCH64_MOVW_SABS_G1 tempy3

5
ld/testsuite/ld-aarch64/emit-relocs-272-overflow.d Normal file
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@ -0,0 +1,5 @@
#source: emit-relocs-272-overflow.s
#ld: -T relocs.ld --defsym tempy=0x1000000000000 --defsym tempy1=-0x1000000000001 -e0 --emit-relocs
#objdump: -dr
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_SABS_G2 against symbol `tempy' .*
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_SABS_G2 against symbol `tempy1' .*

5
ld/testsuite/ld-aarch64/emit-relocs-272-overflow.s Normal file
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@ -0,0 +1,5 @@
.comm gempy,4,4
.text
movz x4, :abs_g2_s:tempy
movz x5, :abs_g2_s:tempy1

16
ld/testsuite/ld-aarch64/emit-relocs-272.d
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@ -1,14 +1,14 @@
#source: emit-relocs-272.s
#ld: -T relocs.ld --defsym tempy=0x1012 --defsym tempy2=-12345678912345 --defsym tempy3=-292 -e0 --emit-relocs
#objdump: -dr -Mno-aliases
#ld: -T relocs.ld --defsym tempy=0xffffffffffff --defsym tempy2=-12345678912345 --defsym tempy3=-0x1000000000000 -e0 --emit-relocs
#objdump: -dr
#...
+10000: 8a000000 and x0, x0, x0
+10004: 92400000 and x0, x0, #0x1
+10008: d2c00004 movz x4, #0x0, lsl #32
+10008: R_AARCH64_MOVW_SABS_G2 tempy
+1000c: 92c16747 movn x7, #0xb3a, lsl #32
+1000c: R_AARCH64_MOVW_SABS_G2 tempy2
+10010: 92c00011 movn x17, #0x0, lsl #32
+10010: R_AARCH64_MOVW_SABS_G2 tempy3
+10008: d2dfffe4 mov x4, #0xffff00000000 // #281470681743360
10008: R_AARCH64_MOVW_SABS_G2 tempy
+1000c: 92c16747 mov x7, #0xfffff4c5ffffffff // #-12343736008705
1000c: R_AARCH64_MOVW_SABS_G2 tempy2
+10010: 92dffff1 mov x17, #0xffff0000ffffffff // #-281470681743361
10010: R_AARCH64_MOVW_SABS_G2 tempy3