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2004-11-12 Andrew Cagney <cagney@gnu.org>

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* d30v, fr30, mn10200, z8k: Delete directory.
This commit is contained in:
Andrew Cagney 2004-11-12 16:45:32 +00:00
parent 4fab48b9c4
commit c46ec85da2
73 changed files with 4 additions and 50546 deletions
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4
sim/ChangeLog
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@ -1,3 +1,7 @@
2004-11-12 Andrew Cagney <cagney@gnu.org>
* d30v, fr30, mn10200, z8k: Delete directory.
2004-03-10 Ben Elliston <bje@gnu.org>
* MAINTAINERS: Update my mail address.

1390
sim/d30v/ChangeLog
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217
sim/d30v/Makefile.in
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@ -1,217 +0,0 @@
# OBSOLETE # Mitsubishi Electric Corp. D30V Simulator.
# OBSOLETE # Copyright (C) 1997, Free Software Foundation, Inc.
# OBSOLETE # Contributed by Cygnus Support.
# OBSOLETE #
# OBSOLETE # This file is part of GDB, the GNU debugger.
# OBSOLETE #
# OBSOLETE # This program is free software; you can redistribute it and/or modify
# OBSOLETE # it under the terms of the GNU General Public License as published by
# OBSOLETE # the Free Software Foundation; either version 2, or (at your option)
# OBSOLETE # any later version.
# OBSOLETE #
# OBSOLETE # This program is distributed in the hope that it will be useful,
# OBSOLETE # but WITHOUT ANY WARRANTY; without even the implied warranty of
# OBSOLETE # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# OBSOLETE # GNU General Public License for more details.
# OBSOLETE #
# OBSOLETE # You should have received a copy of the GNU General Public License along
# OBSOLETE # with this program; if not, write to the Free Software Foundation, Inc.,
# OBSOLETE # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
# OBSOLETE
# OBSOLETE M4= @M4@
# OBSOLETE
# OBSOLETE
# OBSOLETE ## COMMON_PRE_CONFIG_FRAG
# OBSOLETE
# OBSOLETE # These variables are given default values in COMMON_PRE_CONFIG_FRAG.
# OBSOLETE # We override the ones we need to here.
# OBSOLETE # Not all of these need to be mentioned, only the necessary ones.
# OBSOLETE
# OBSOLETE # List of object files, less common parts.
# OBSOLETE SIM_OBJS = \
# OBSOLETE $(SIM_NEW_COMMON_OBJS) \
# OBSOLETE engine.o cpu.o \
# OBSOLETE s_support.o l_support.o \
# OBSOLETE s_idecode.o l_idecode.o \
# OBSOLETE s_semantics.o l_semantics.o \
# OBSOLETE sim-calls.o itable.o \
# OBSOLETE sim-hload.o \
# OBSOLETE sim-hrw.o \
# OBSOLETE sim-engine.o \
# OBSOLETE sim-stop.o \
# OBSOLETE sim-reason.o \
# OBSOLETE sim-resume.o
# OBSOLETE
# OBSOLETE # List of extra dependencies.
# OBSOLETE # Generally this consists of simulator specific files included by sim-main.h.
# OBSOLETE SIM_EXTRA_DEPS = itable.h s_idecode.h l_idecode.h cpu.h alu.h
# OBSOLETE
# OBSOLETE # List of generators
# OBSOLETE SIM_GEN=tmp-igen
# OBSOLETE
# OBSOLETE # List of extra flags to always pass to $(CC).
# OBSOLETE SIM_EXTRA_CFLAGS = @sim_trapdump@
# OBSOLETE
# OBSOLETE # List of main object files for `run'.
# OBSOLETE SIM_RUN_OBJS = nrun.o
# OBSOLETE
# OBSOLETE # Dependency of `clean' to clean any extra files.
# OBSOLETE SIM_EXTRA_CLEAN = clean-igen
# OBSOLETE
# OBSOLETE # This selects the d30v newlib/libgloss syscall definitions.
# OBSOLETE NL_TARGET=-DNL_TARGET_d30v
# OBSOLETE
# OBSOLETE ## COMMON_POST_CONFIG_FRAG
# OBSOLETE
# OBSOLETE MAIN_INCLUDE_DEPS = tconfig.h
# OBSOLETE INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS)
# OBSOLETE
# OBSOLETE # Rules need to build $(SIM_OBJS), plus whatever else the target wants.
# OBSOLETE
# OBSOLETE # ... target specific rules ...
# OBSOLETE
# OBSOLETE # Filter to eliminate known warnings
# OBSOLETE FILTER = 2>&1 | egrep -v "Discarding instruction|instruction field of type \`compute\' changed to \`cache\'|Instruction format is not 64 bits wide"
# OBSOLETE
# OBSOLETE BUILT_SRC_FROM_IGEN = \
# OBSOLETE s_icache.h \
# OBSOLETE s_icache.c \
# OBSOLETE s_idecode.h \
# OBSOLETE s_idecode.c \
# OBSOLETE s_semantics.h \
# OBSOLETE s_semantics.c \
# OBSOLETE s_model.h \
# OBSOLETE s_model.c \
# OBSOLETE s_support.h \
# OBSOLETE s_support.c \
# OBSOLETE l_icache.h \
# OBSOLETE l_icache.c \
# OBSOLETE l_idecode.h \
# OBSOLETE l_idecode.c \
# OBSOLETE l_semantics.h \
# OBSOLETE l_semantics.c \
# OBSOLETE l_model.h \
# OBSOLETE l_model.c \
# OBSOLETE l_support.h \
# OBSOLETE l_support.c \
# OBSOLETE itable.h itable.c
# OBSOLETE $(BUILT_SRC_FROM_IGEN): tmp-igen
# OBSOLETE #
# OBSOLETE
# OBSOLETE .PHONY: clean-igen
# OBSOLETE clean-igen:
# OBSOLETE rm -f $(BUILT_SRC_FROM_IGEN)
# OBSOLETE rm -f tmp-igen tmp-insns
# OBSOLETE
# OBSOLETE ../igen/igen:
# OBSOLETE cd ../igen && $(MAKE)
# OBSOLETE
# OBSOLETE tmp-igen: $(srcdir)/dc-short $(srcdir)/d30v-insns $(srcdir)/ic-d30v ../igen/igen
# OBSOLETE cd ../igen && $(MAKE)
# OBSOLETE echo "# 1 \"$(srcdir)/d30v-insns\"" > tmp-insns
# OBSOLETE $(M4) < $(srcdir)/d30v-insns >> tmp-insns
# OBSOLETE @echo "Generating short version ..."
# OBSOLETE ../igen/igen \
# OBSOLETE -G gen-zero-r0 \
# OBSOLETE -G direct-access \
# OBSOLETE -G default-nia-minus-one \
# OBSOLETE -G conditional-issue \
# OBSOLETE -G verify-slot \
# OBSOLETE -G field-widths \
# OBSOLETE -F short,emul \
# OBSOLETE -B 32 \
# OBSOLETE -P "s_" \
# OBSOLETE -o $(srcdir)/dc-short \
# OBSOLETE -k $(srcdir)/ic-d30v \
# OBSOLETE -n $(srcdir)/d30v-insns -i tmp-insns \
# OBSOLETE -n s_icache.h -hc tmp-icache.h \
# OBSOLETE -n s_icache.c -c tmp-icache.c \
# OBSOLETE -n s_semantics.h -hs tmp-semantics.h \
# OBSOLETE -n s_semantics.c -s tmp-semantics.c \
# OBSOLETE -n s_idecode.h -hd tmp-idecode.h \
# OBSOLETE -n s_idecode.c -d tmp-idecode.c \
# OBSOLETE -n s_model.h -hm tmp-model.h \
# OBSOLETE -n s_model.c -m tmp-model.c \
# OBSOLETE -n s_support.h -hf tmp-support.h \
# OBSOLETE -n s_support.c -f tmp-support.c $(FILTER)
# OBSOLETE $(srcdir)/../../move-if-change tmp-icache.h s_icache.h
# OBSOLETE $(srcdir)/../../move-if-change tmp-icache.c s_icache.c
# OBSOLETE $(srcdir)/../../move-if-change tmp-idecode.h s_idecode.h
# OBSOLETE $(srcdir)/../../move-if-change tmp-idecode.c s_idecode.c
# OBSOLETE $(srcdir)/../../move-if-change tmp-semantics.h s_semantics.h
# OBSOLETE $(srcdir)/../../move-if-change tmp-semantics.c s_semantics.c
# OBSOLETE $(srcdir)/../../move-if-change tmp-model.h s_model.h
# OBSOLETE $(srcdir)/../../move-if-change tmp-model.c s_model.c
# OBSOLETE $(srcdir)/../../move-if-change tmp-support.h s_support.h
# OBSOLETE $(srcdir)/../../move-if-change tmp-support.c s_support.c
# OBSOLETE @echo "Generating long version ..."
# OBSOLETE ../igen/igen \
# OBSOLETE -G gen-zero-r0 \
# OBSOLETE -G direct-access \
# OBSOLETE -G default-nia-minus-one \
# OBSOLETE -G conditional-issue \
# OBSOLETE -G field-widths \
# OBSOLETE -F long,emul \
# OBSOLETE -B 64 \
# OBSOLETE -P "l_" \
# OBSOLETE -o $(srcdir)/dc-short \
# OBSOLETE -k $(srcdir)/ic-d30v \
# OBSOLETE -i tmp-insns \
# OBSOLETE -n l_icache.h -hc tmp-icache.h \
# OBSOLETE -n l_icache.c -c tmp-icache.c \
# OBSOLETE -n l_semantics.h -hs tmp-semantics.h \
# OBSOLETE -n l_semantics.c -s tmp-semantics.c \
# OBSOLETE -n l_idecode.h -hd tmp-idecode.h \
# OBSOLETE -n l_idecode.c -d tmp-idecode.c \
# OBSOLETE -n l_model.h -hm tmp-model.h \
# OBSOLETE -n l_model.c -m tmp-model.c \
# OBSOLETE -n l_support.h -hf tmp-support.h \
# OBSOLETE -n l_support.c -f tmp-support.c $(FILTER)
# OBSOLETE $(srcdir)/../../move-if-change tmp-icache.h l_icache.h
# OBSOLETE $(srcdir)/../../move-if-change tmp-icache.c l_icache.c
# OBSOLETE $(srcdir)/../../move-if-change tmp-idecode.h l_idecode.h
# OBSOLETE $(srcdir)/../../move-if-change tmp-idecode.c l_idecode.c
# OBSOLETE $(srcdir)/../../move-if-change tmp-semantics.h l_semantics.h
# OBSOLETE $(srcdir)/../../move-if-change tmp-semantics.c l_semantics.c
# OBSOLETE $(srcdir)/../../move-if-change tmp-model.h l_model.h
# OBSOLETE $(srcdir)/../../move-if-change tmp-model.c l_model.c
# OBSOLETE $(srcdir)/../../move-if-change tmp-support.h l_support.h
# OBSOLETE $(srcdir)/../../move-if-change tmp-support.c l_support.c
# OBSOLETE @echo "Generating instruction database ..."
# OBSOLETE ../igen/igen \
# OBSOLETE -G field-widths \
# OBSOLETE -F short,long,emul \
# OBSOLETE -B 64 \
# OBSOLETE -o $(srcdir)/dc-short \
# OBSOLETE -k $(srcdir)/ic-d30v \
# OBSOLETE -i tmp-insns \
# OBSOLETE -n itable.h -ht tmp-itable.h \
# OBSOLETE -n itable.c -t tmp-itable.c $(FILTER)
# OBSOLETE $(srcdir)/../../move-if-change tmp-itable.h itable.h
# OBSOLETE $(srcdir)/../../move-if-change tmp-itable.c itable.c
# OBSOLETE touch tmp-igen
# OBSOLETE
# OBSOLETE ENGINE_H = \
# OBSOLETE sim-main.h \
# OBSOLETE $(srcdir)/../common/sim-basics.h \
# OBSOLETE config.h \
# OBSOLETE $(srcdir)/../common/sim-config.h \
# OBSOLETE $(srcdir)/../common/sim-inline.h \
# OBSOLETE $(srcdir)/../common/sim-types.h \
# OBSOLETE $(srcdir)/../common/sim-bits.h \
# OBSOLETE $(srcdir)/../common/sim-endian.h \
# OBSOLETE itable.h \
# OBSOLETE l_idecode.h s_idecode.h \
# OBSOLETE cpu.h \
# OBSOLETE alu.h \
# OBSOLETE $(srcdir)/../common/sim-alu.h \
# OBSOLETE $(srcdir)/../common/sim-core.h \
# OBSOLETE $(srcdir)/../common/sim-events.h \
# OBSOLETE
# OBSOLETE engine.o: engine.c $(ENGINE_H)
# OBSOLETE sim-calls.o: sim-calls.c $(ENGINE_H) $(srcdir)/../common/sim-utils.h $(srcdir)/../common/sim-options.h
# OBSOLETE cpu.o: cpu.c $(ENGINE_H)
# OBSOLETE s_support.o: s_support.c $(ENGINE_H)
# OBSOLETE l_support.o: l_support.c $(ENGINE_H)
# OBSOLETE s_semantics.o: s_semantics.c $(ENGINE_H)
# OBSOLETE l_semantics.o: l_semantics.c $(ENGINE_H)

15
sim/d30v/acconfig.h
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@ -1,15 +0,0 @@
/* Define to 1 if NLS is requested. */
#undef ENABLE_NLS
/* Define as 1 if you have catgets and don't want to use GNU gettext. */
#undef HAVE_CATGETS
/* Define as 1 if you have gettext and don't want to use GNU gettext. */
#undef HAVE_GETTEXT
/* Define as 1 if you have the stpcpy function. */
#undef HAVE_STPCPY
/* Define if your locale.h file contains LC_MESSAGES. */
#undef HAVE_LC_MESSAGES

106
sim/d30v/alu.h
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@ -1,106 +0,0 @@
/* OBSOLETE /* Mitsubishi Electric Corp. D30V Simulator. */
/* OBSOLETE Copyright (C) 1997, Free Software Foundation, Inc. */
/* OBSOLETE Contributed by Cygnus Support. */
/* OBSOLETE */
/* OBSOLETE This file is part of GDB, the GNU debugger. */
/* OBSOLETE */
/* OBSOLETE This program is free software; you can redistribute it and/or modify */
/* OBSOLETE it under the terms of the GNU General Public License as published by */
/* OBSOLETE the Free Software Foundation; either version 2, or (at your option) */
/* OBSOLETE any later version. */
/* OBSOLETE */
/* OBSOLETE This program is distributed in the hope that it will be useful, */
/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */
/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
/* OBSOLETE GNU General Public License for more details. */
/* OBSOLETE */
/* OBSOLETE You should have received a copy of the GNU General Public License along */
/* OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., */
/* OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE #ifndef _D30V_ALU_H_ */
/* OBSOLETE #define _D30V_ALU_H_ */
/* OBSOLETE */
/* OBSOLETE #define ALU_CARRY (PSW_VAL(PSW_C) != 0) */
/* OBSOLETE */
/* OBSOLETE #include "sim-alu.h" */
/* OBSOLETE */
/* OBSOLETE #define ALU16_END(TARG, HIGH) \ */
/* OBSOLETE { \ */
/* OBSOLETE unsigned32 mask, value; \ */
/* OBSOLETE if (ALU16_HAD_OVERFLOW) { \ */
/* OBSOLETE mask = BIT32 (PSW_V) | BIT32 (PSW_VA) | BIT32 (PSW_C); \ */
/* OBSOLETE value = BIT32 (PSW_V) | BIT32 (PSW_VA); \ */
/* OBSOLETE } \ */
/* OBSOLETE else { \ */
/* OBSOLETE mask = BIT32 (PSW_V) | BIT32 (PSW_C); \ */
/* OBSOLETE value = 0; \ */
/* OBSOLETE } \ */
/* OBSOLETE if (ALU16_HAD_CARRY_BORROW) \ */
/* OBSOLETE value |= BIT32 (PSW_C); \ */
/* OBSOLETE if (HIGH) \ */
/* OBSOLETE WRITE32_QUEUE_MASK (TARG, ALU16_OVERFLOW_RESULT<<16, 0xffff0000); \ */
/* OBSOLETE else \ */
/* OBSOLETE WRITE32_QUEUE_MASK (TARG, ALU16_OVERFLOW_RESULT, 0x0000ffff); \ */
/* OBSOLETE WRITE32_QUEUE_MASK (&PSW, value, mask); \ */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE #define ALU32_END(TARG) \ */
/* OBSOLETE { \ */
/* OBSOLETE unsigned32 mask, value; \ */
/* OBSOLETE if (ALU32_HAD_OVERFLOW) { \ */
/* OBSOLETE mask = BIT32 (PSW_V) | BIT32 (PSW_VA) | BIT32 (PSW_C); \ */
/* OBSOLETE value = BIT32 (PSW_V) | BIT32 (PSW_VA); \ */
/* OBSOLETE } \ */
/* OBSOLETE else { \ */
/* OBSOLETE mask = BIT32 (PSW_V) | BIT32 (PSW_C); \ */
/* OBSOLETE value = 0; \ */
/* OBSOLETE } \ */
/* OBSOLETE if (ALU32_HAD_CARRY_BORROW) \ */
/* OBSOLETE value |= BIT32 (PSW_C); \ */
/* OBSOLETE WRITE32_QUEUE (TARG, ALU32_OVERFLOW_RESULT); \ */
/* OBSOLETE WRITE32_QUEUE_MASK (&PSW, value, mask); \ */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE #define ALU_END(TARG) ALU32_END(TARG) */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE /* PSW & Flag manipulation */ */
/* OBSOLETE */
/* OBSOLETE #define PSW_SET(BIT,VAL) BLIT32(PSW, (BIT), (VAL)) */
/* OBSOLETE #define PSW_VAL(BIT) EXTRACTED32(PSW, (BIT), (BIT)) */
/* OBSOLETE */
/* OBSOLETE #define PSW_F(FLAG) (17 + ((FLAG) % 8) * 2) */
/* OBSOLETE #define PSW_FLAG_SET(FLAG,VAL) PSW_SET(PSW_F(FLAG), VAL) */
/* OBSOLETE #define PSW_FLAG_VAL(FLAG) PSW_VAL(PSW_F(FLAG)) */
/* OBSOLETE */
/* OBSOLETE #define PSW_SET_QUEUE(BIT,VAL) \ */
/* OBSOLETE do { \ */
/* OBSOLETE unsigned32 mask = BIT32 (BIT); \ */
/* OBSOLETE unsigned32 bitval = (VAL) ? mask : 0; \ */
/* OBSOLETE WRITE32_QUEUE_MASK (&PSW, bitval, mask); \ */
/* OBSOLETE } while (0) */
/* OBSOLETE */
/* OBSOLETE #define PSW_FLAG_SET_QUEUE(FLAG,VAL) \ */
/* OBSOLETE do { \ */
/* OBSOLETE unsigned32 mask = BIT32 (PSW_F (FLAG)); \ */
/* OBSOLETE unsigned32 bitval = (VAL) ? mask : 0; \ */
/* OBSOLETE WRITE32_QUEUE_MASK (&PSW, bitval, mask); \ */
/* OBSOLETE } while (0) */
/* OBSOLETE */
/* OBSOLETE /* Bring data in from the cold */ */
/* OBSOLETE */
/* OBSOLETE #define IMEM(EA) \ */
/* OBSOLETE (sim_core_read_8(STATE_CPU (sd, 0), cia, exec_map, (EA))) */
/* OBSOLETE */
/* OBSOLETE #define MEM(SIGN, EA, NR_BYTES) \ */
/* OBSOLETE ((SIGN##_##NR_BYTES) sim_core_read_unaligned_##NR_BYTES(STATE_CPU (sd, 0), cia, read_map, (EA))) */
/* OBSOLETE */
/* OBSOLETE #define STORE(EA, NR_BYTES, VAL) \ */
/* OBSOLETE do { \ */
/* OBSOLETE sim_core_write_unaligned_##NR_BYTES(STATE_CPU (sd, 0), cia, write_map, (EA), (VAL)); \ */
/* OBSOLETE } while (0) */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE #endif */

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sim/d30v/config.in
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@ -1,162 +0,0 @@
/* config.in. Generated automatically from configure.in by autoheader. */
/* Define if using alloca.c. */
#undef C_ALLOCA
/* Define to empty if the keyword does not work. */
#undef const
/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
This function is required for alloca.c support on those systems. */
#undef CRAY_STACKSEG_END
/* Define if you have alloca, as a function or macro. */
#undef HAVE_ALLOCA
/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
#undef HAVE_ALLOCA_H
/* Define if you have a working `mmap' system call. */
#undef HAVE_MMAP
/* Define as __inline if that's what the C compiler calls it. */
#undef inline
/* Define to `long' if <sys/types.h> doesn't define. */
#undef off_t
/* Define if you need to in order for stat and other things to work. */
#undef _POSIX_SOURCE
/* Define as the return type of signal handlers (int or void). */
#undef RETSIGTYPE
/* Define to `unsigned' if <sys/types.h> doesn't define. */
#undef size_t
/* If using the C implementation of alloca, define if you know the
direction of stack growth for your system; otherwise it will be
automatically deduced at run-time.
STACK_DIRECTION > 0 => grows toward higher addresses
STACK_DIRECTION < 0 => grows toward lower addresses
STACK_DIRECTION = 0 => direction of growth unknown
*/
#undef STACK_DIRECTION
/* Define if you have the ANSI C header files. */
#undef STDC_HEADERS
/* Define if your processor stores words with the most significant
byte first (like Motorola and SPARC, unlike Intel and VAX). */
#undef WORDS_BIGENDIAN
/* Define to 1 if NLS is requested. */
#undef ENABLE_NLS
/* Define as 1 if you have gettext and don't want to use GNU gettext. */
#undef HAVE_GETTEXT
/* Define as 1 if you have the stpcpy function. */
#undef HAVE_STPCPY
/* Define if your locale.h file contains LC_MESSAGES. */
#undef HAVE_LC_MESSAGES
/* Define if you have the __argz_count function. */
#undef HAVE___ARGZ_COUNT
/* Define if you have the __argz_next function. */
#undef HAVE___ARGZ_NEXT
/* Define if you have the __argz_stringify function. */
#undef HAVE___ARGZ_STRINGIFY
/* Define if you have the __setfpucw function. */
#undef HAVE___SETFPUCW
/* Define if you have the dcgettext function. */
#undef HAVE_DCGETTEXT
/* Define if you have the getcwd function. */
#undef HAVE_GETCWD
/* Define if you have the getpagesize function. */
#undef HAVE_GETPAGESIZE
/* Define if you have the getrusage function. */
#undef HAVE_GETRUSAGE
/* Define if you have the munmap function. */
#undef HAVE_MUNMAP
/* Define if you have the putenv function. */
#undef HAVE_PUTENV
/* Define if you have the setenv function. */
#undef HAVE_SETENV
/* Define if you have the setlocale function. */
#undef HAVE_SETLOCALE
/* Define if you have the sigaction function. */
#undef HAVE_SIGACTION
/* Define if you have the stpcpy function. */
#undef HAVE_STPCPY
/* Define if you have the strcasecmp function. */
#undef HAVE_STRCASECMP
/* Define if you have the strchr function. */
#undef HAVE_STRCHR
/* Define if you have the time function. */
#undef HAVE_TIME
/* Define if you have the <argz.h> header file. */
#undef HAVE_ARGZ_H
/* Define if you have the <fcntl.h> header file. */
#undef HAVE_FCNTL_H
/* Define if you have the <fpu_control.h> header file. */
#undef HAVE_FPU_CONTROL_H
/* Define if you have the <limits.h> header file. */
#undef HAVE_LIMITS_H
/* Define if you have the <locale.h> header file. */
#undef HAVE_LOCALE_H
/* Define if you have the <malloc.h> header file. */
#undef HAVE_MALLOC_H
/* Define if you have the <nl_types.h> header file. */
#undef HAVE_NL_TYPES_H
/* Define if you have the <stdlib.h> header file. */
#undef HAVE_STDLIB_H
/* Define if you have the <string.h> header file. */
#undef HAVE_STRING_H
/* Define if you have the <strings.h> header file. */
#undef HAVE_STRINGS_H
/* Define if you have the <sys/param.h> header file. */
#undef HAVE_SYS_PARAM_H
/* Define if you have the <sys/resource.h> header file. */
#undef HAVE_SYS_RESOURCE_H
/* Define if you have the <sys/time.h> header file. */
#undef HAVE_SYS_TIME_H
/* Define if you have the <time.h> header file. */
#undef HAVE_TIME_H
/* Define if you have the <unistd.h> header file. */
#undef HAVE_UNISTD_H
/* Define if you have the <values.h> header file. */
#undef HAVE_VALUES_H

4459
sim/d30v/configure vendored
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40
sim/d30v/configure.in
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@ -1,40 +0,0 @@
dnl Process this file with autoconf to produce a configure script.
sinclude(../common/aclocal.m4)
AC_PREREQ(2.5)dnl
AC_INIT(Makefile.in)
SIM_AC_COMMON
dnl Find a versionn of m4 to use as a preprocessor
AC_PATH_PROGS(M4, gm4 gnum4 m4, m4)
dnl Options available in this module
SIM_AC_OPTION_INLINE(0)
SIM_AC_OPTION_ENDIAN(BIG_ENDIAN)
SIM_AC_OPTION_ALIGNMENT(STRICT_ALIGNMENT)
SIM_AC_OPTION_HOSTENDIAN
SIM_AC_OPTION_WARNINGS
SIM_AC_OPTION_RESERVED_BITS(1)
AC_SUBST(M4)
#
# Enable making unknown traps dump out registers
#
AC_ARG_ENABLE(sim-trapdump,
[ --enable-sim-trapdump Make unknown traps dump the registers],
[case "${enableval}" in
yes) sim_trapdump="-DTRAPDUMP=1";;
no) sim_trapdump="-DTRAPDUMP=0";;
*) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-trapdump"); sim_trapdump="";;
esac
if test x"$silent" != x"yes" && test x"$sim_trapdump" != x""; then
echo "Setting sim_trapdump = $sim_trapdump" 6>&1
fi],[sim_trapdump=""])dnl
AC_SUBST(sim_trapdump)
dnl For UNIX emulation
AC_CHECK_HEADERS(stdlib.h unistd.h string.h strings.h)
SIM_AC_OUTPUT

172
sim/d30v/cpu.c
View file

@ -1,172 +0,0 @@
/* OBSOLETE /* Mitsubishi Electric Corp. D30V Simulator. */
/* OBSOLETE Copyright (C) 1997, Free Software Foundation, Inc. */
/* OBSOLETE Contributed by Cygnus Support. */
/* OBSOLETE */
/* OBSOLETE This file is part of GDB, the GNU debugger. */
/* OBSOLETE */
/* OBSOLETE This program is free software; you can redistribute it and/or modify */
/* OBSOLETE it under the terms of the GNU General Public License as published by */
/* OBSOLETE the Free Software Foundation; either version 2, or (at your option) */
/* OBSOLETE any later version. */
/* OBSOLETE */
/* OBSOLETE This program is distributed in the hope that it will be useful, */
/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */
/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
/* OBSOLETE GNU General Public License for more details. */
/* OBSOLETE */
/* OBSOLETE You should have received a copy of the GNU General Public License along */
/* OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., */
/* OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE #ifndef _CPU_C_ */
/* OBSOLETE #define _CPU_C_ */
/* OBSOLETE */
/* OBSOLETE #include "sim-main.h" */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE int */
/* OBSOLETE is_wrong_slot (SIM_DESC sd, */
/* OBSOLETE address_word cia, */
/* OBSOLETE itable_index index) */
/* OBSOLETE { */
/* OBSOLETE switch (STATE_CPU (sd, 0)->unit) */
/* OBSOLETE { */
/* OBSOLETE case memory_unit: */
/* OBSOLETE return !itable[index].option[itable_option_mu]; */
/* OBSOLETE case integer_unit: */
/* OBSOLETE return !itable[index].option[itable_option_iu]; */
/* OBSOLETE case any_unit: */
/* OBSOLETE return 0; */
/* OBSOLETE default: */
/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */
/* OBSOLETE "internal error - is_wrong_slot - bad switch"); */
/* OBSOLETE return -1; */
/* OBSOLETE } */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE int */
/* OBSOLETE is_condition_ok (SIM_DESC sd, */
/* OBSOLETE address_word cia, */
/* OBSOLETE int cond) */
/* OBSOLETE { */
/* OBSOLETE switch (cond) */
/* OBSOLETE { */
/* OBSOLETE case 0x0: */
/* OBSOLETE return 1; */
/* OBSOLETE case 0x1: */
/* OBSOLETE return PSW_VAL(PSW_F0); */
/* OBSOLETE case 0x2: */
/* OBSOLETE return !PSW_VAL(PSW_F0); */
/* OBSOLETE case 0x3: */
/* OBSOLETE return PSW_VAL(PSW_F1); */
/* OBSOLETE case 0x4: */
/* OBSOLETE return !PSW_VAL(PSW_F1); */
/* OBSOLETE case 0x5: */
/* OBSOLETE return PSW_VAL(PSW_F0) && PSW_VAL(PSW_F1); */
/* OBSOLETE case 0x6: */
/* OBSOLETE return PSW_VAL(PSW_F0) && !PSW_VAL(PSW_F1); */
/* OBSOLETE case 0x7: */
/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */
/* OBSOLETE "is_condition_ok - bad instruction condition bits"); */
/* OBSOLETE return 0; */
/* OBSOLETE default: */
/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */
/* OBSOLETE "internal error - is_condition_ok - bad switch"); */
/* OBSOLETE return -1; */
/* OBSOLETE } */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE /* If --trace-call, trace calls, remembering the current state of */
/* OBSOLETE registers. */ */
/* OBSOLETE */
/* OBSOLETE typedef struct _call_stack { */
/* OBSOLETE struct _call_stack *prev; */
/* OBSOLETE registers regs; */
/* OBSOLETE } call_stack; */
/* OBSOLETE */
/* OBSOLETE static call_stack *call_stack_head = (call_stack *)0; */
/* OBSOLETE static int call_depth = 0; */
/* OBSOLETE */
/* OBSOLETE void call_occurred (SIM_DESC sd, */
/* OBSOLETE sim_cpu *cpu, */
/* OBSOLETE address_word cia, */
/* OBSOLETE address_word nia) */
/* OBSOLETE { */
/* OBSOLETE call_stack *ptr = ZALLOC (call_stack); */
/* OBSOLETE ptr->regs = cpu->regs; */
/* OBSOLETE ptr->prev = call_stack_head; */
/* OBSOLETE call_stack_head = ptr; */
/* OBSOLETE */
/* OBSOLETE trace_one_insn (sd, cpu, nia, 1, "", 0, "call", */
/* OBSOLETE "Depth %3d, Return 0x%.8lx, Args 0x%.8lx 0x%.8lx", */
/* OBSOLETE ++call_depth, (unsigned long)cia+8, (unsigned long)GPR[2], */
/* OBSOLETE (unsigned long)GPR[3]); */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE /* If --trace-call, trace returns, checking if any saved register was changed. */ */
/* OBSOLETE */
/* OBSOLETE void return_occurred (SIM_DESC sd, */
/* OBSOLETE sim_cpu *cpu, */
/* OBSOLETE address_word cia, */
/* OBSOLETE address_word nia) */
/* OBSOLETE { */
/* OBSOLETE char buffer[1024]; */
/* OBSOLETE char *buf_ptr = buffer; */
/* OBSOLETE call_stack *ptr = call_stack_head; */
/* OBSOLETE int regno; */
/* OBSOLETE char *prefix = ", Registers that differ: "; */
/* OBSOLETE */
/* OBSOLETE *buf_ptr = '\0'; */
/* OBSOLETE for (regno = 34; regno <= 63; regno++) { */
/* OBSOLETE if (cpu->regs.general_purpose[regno] != ptr->regs.general_purpose[regno]) { */
/* OBSOLETE sprintf (buf_ptr, "%sr%d", prefix, regno); */
/* OBSOLETE buf_ptr += strlen (buf_ptr); */
/* OBSOLETE prefix = " "; */
/* OBSOLETE } */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE if (cpu->regs.accumulator[1] != ptr->regs.accumulator[1]) { */
/* OBSOLETE sprintf (buf_ptr, "%sa1", prefix); */
/* OBSOLETE buf_ptr += strlen (buf_ptr); */
/* OBSOLETE prefix = " "; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "", 0, "return", */
/* OBSOLETE "Depth %3d, Return 0x%.8lx, Ret. 0x%.8lx 0x%.8lx%s", */
/* OBSOLETE call_depth--, (unsigned long)nia, (unsigned long)GPR[2], */
/* OBSOLETE (unsigned long)GPR[3], buffer); */
/* OBSOLETE */
/* OBSOLETE call_stack_head = ptr->prev; */
/* OBSOLETE zfree (ptr); */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE /* Read/write functions for system call interface. */ */
/* OBSOLETE int */
/* OBSOLETE d30v_read_mem (host_callback *cb, */
/* OBSOLETE struct cb_syscall *sc, */
/* OBSOLETE unsigned long taddr, */
/* OBSOLETE char *buf, */
/* OBSOLETE int bytes) */
/* OBSOLETE { */
/* OBSOLETE SIM_DESC sd = (SIM_DESC) sc->p1; */
/* OBSOLETE sim_cpu *cpu = STATE_CPU (sd, 0); */
/* OBSOLETE */
/* OBSOLETE return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes); */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE int */
/* OBSOLETE d30v_write_mem (host_callback *cb, */
/* OBSOLETE struct cb_syscall *sc, */
/* OBSOLETE unsigned long taddr, */
/* OBSOLETE const char *buf, */
/* OBSOLETE int bytes) */
/* OBSOLETE { */
/* OBSOLETE SIM_DESC sd = (SIM_DESC) sc->p1; */
/* OBSOLETE sim_cpu *cpu = STATE_CPU (sd, 0); */
/* OBSOLETE */
/* OBSOLETE return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE #endif /* _CPU_C_ */ */

249
sim/d30v/cpu.h
View file

@ -1,249 +0,0 @@
/* OBSOLETE /* Mitsubishi Electric Corp. D30V Simulator. */
/* OBSOLETE Copyright (C) 1997, Free Software Foundation, Inc. */
/* OBSOLETE Contributed by Cygnus Support. */
/* OBSOLETE */
/* OBSOLETE This file is part of GDB, the GNU debugger. */
/* OBSOLETE */
/* OBSOLETE This program is free software; you can redistribute it and/or modify */
/* OBSOLETE it under the terms of the GNU General Public License as published by */
/* OBSOLETE the Free Software Foundation; either version 2, or (at your option) */
/* OBSOLETE any later version. */
/* OBSOLETE */
/* OBSOLETE This program is distributed in the hope that it will be useful, */
/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */
/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
/* OBSOLETE GNU General Public License for more details. */
/* OBSOLETE */
/* OBSOLETE You should have received a copy of the GNU General Public License along */
/* OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., */
/* OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE #ifndef _CPU_H_ */
/* OBSOLETE #define _CPU_H_ */
/* OBSOLETE */
/* OBSOLETE enum { */
/* OBSOLETE NR_GENERAL_PURPOSE_REGISTERS = 64, */
/* OBSOLETE NR_CONTROL_REGISTERS = 64, */
/* OBSOLETE NR_ACCUMULATORS = 2, */
/* OBSOLETE STACK_POINTER_GPR = 63, */
/* OBSOLETE NR_STACK_POINTERS = 2, */
/* OBSOLETE }; */
/* OBSOLETE */
/* OBSOLETE enum { */
/* OBSOLETE processor_status_word_cr = 0, */
/* OBSOLETE backup_processor_status_word_cr = 1, */
/* OBSOLETE program_counter_cr = 2, */
/* OBSOLETE backup_program_counter_cr = 3, */
/* OBSOLETE debug_backup_processor_status_word_cr = 4, */
/* OBSOLETE debug_backup_program_counter_cr = 5, */
/* OBSOLETE reserved_6_cr = 6, */
/* OBSOLETE repeat_count_cr = 7, */
/* OBSOLETE repeat_start_address_cr = 8, */
/* OBSOLETE repeat_end_address_cr = 9, */
/* OBSOLETE modulo_start_address_cr = 10, */
/* OBSOLETE modulo_end_address_cr = 11, */
/* OBSOLETE instruction_break_address_cr = 14, */
/* OBSOLETE eit_vector_base_cr = 15, */
/* OBSOLETE }; */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE enum { */
/* OBSOLETE PSW_SM = 0, */
/* OBSOLETE PSW_EA = 2, */
/* OBSOLETE PSW_DB = 3, */
/* OBSOLETE PSW_DS = 4, */
/* OBSOLETE PSW_IE = 5, */
/* OBSOLETE PSW_RP = 6, */
/* OBSOLETE PSW_MD = 7, */
/* OBSOLETE PSW_F0 = 17, */
/* OBSOLETE PSW_F1 = 19, */
/* OBSOLETE PSW_F2 = 21, */
/* OBSOLETE PSW_F3 = 23, */
/* OBSOLETE PSW_S = 25, */
/* OBSOLETE PSW_V = 27, */
/* OBSOLETE PSW_VA = 29, */
/* OBSOLETE PSW_C = 31, */
/* OBSOLETE }; */
/* OBSOLETE */
/* OBSOLETE /* aliases for PSW flag numbers (F0..F7) */ */
/* OBSOLETE enum */
/* OBSOLETE { */
/* OBSOLETE PSW_S_FLAG = 4, */
/* OBSOLETE }; */
/* OBSOLETE */
/* OBSOLETE typedef struct _registers { */
/* OBSOLETE unsigned32 general_purpose[NR_GENERAL_PURPOSE_REGISTERS]; */
/* OBSOLETE /* keep track of the stack pointer */ */
/* OBSOLETE unsigned32 sp[NR_STACK_POINTERS]; /* swap with SP */ */
/* OBSOLETE unsigned32 current_sp; */
/* OBSOLETE unsigned32 control[NR_CONTROL_REGISTERS]; */
/* OBSOLETE unsigned64 accumulator[NR_ACCUMULATORS]; */
/* OBSOLETE } registers; */
/* OBSOLETE */
/* OBSOLETE typedef enum _cpu_units { */
/* OBSOLETE memory_unit, */
/* OBSOLETE integer_unit, */
/* OBSOLETE any_unit, */
/* OBSOLETE } cpu_units; */
/* OBSOLETE */
/* OBSOLETE /* In order to support parallel instructions, which one instruction can be */
/* OBSOLETE writing to a register that is used as input to another, queue up the */
/* OBSOLETE writes to the end of the instruction boundaries. */ */
/* OBSOLETE */
/* OBSOLETE #define MAX_WRITE32 16 */
/* OBSOLETE #define MAX_WRITE64 2 */
/* OBSOLETE */
/* OBSOLETE struct _write32 { */
/* OBSOLETE int num; /* # of 32-bit writes queued up */ */
/* OBSOLETE unsigned32 value[MAX_WRITE32]; /* value to write */ */
/* OBSOLETE unsigned32 mask[MAX_WRITE32]; /* mask to use */ */
/* OBSOLETE unsigned32 *ptr[MAX_WRITE32]; /* address to write to */ */
/* OBSOLETE }; */
/* OBSOLETE */
/* OBSOLETE struct _write64 { */
/* OBSOLETE int num; /* # of 64-bit writes queued up */ */
/* OBSOLETE unsigned64 value[MAX_WRITE64]; /* value to write */ */
/* OBSOLETE unsigned64 *ptr[MAX_WRITE64]; /* address to write to */ */
/* OBSOLETE }; */
/* OBSOLETE */
/* OBSOLETE struct _sim_cpu { */
/* OBSOLETE cpu_units unit; */
/* OBSOLETE registers regs; */
/* OBSOLETE sim_cpu_base base; */
/* OBSOLETE int trace_call_p; /* Whether to do call tracing. */ */
/* OBSOLETE int trace_trap_p; /* If unknown traps dump out the regs */ */
/* OBSOLETE int trace_action; /* trace bits at end of instructions */ */
/* OBSOLETE int left_kills_right_p; /* left insn kills insn in right slot of -> */ */
/* OBSOLETE int mvtsys_left_p; /* left insn was mvtsys */ */
/* OBSOLETE int did_trap; /* we did a trap & need to finish it */ */
/* OBSOLETE struct _write32 write32; /* queued up 32-bit writes */ */
/* OBSOLETE struct _write64 write64; /* queued up 64-bit writes */ */
/* OBSOLETE }; */
/* OBSOLETE */
/* OBSOLETE #define PC (STATE_CPU (sd, 0)->regs.control[program_counter_cr]) */
/* OBSOLETE #define PSW (STATE_CPU (sd, 0)->regs.control[processor_status_word_cr]) */
/* OBSOLETE #define PSWL (*AL2_4(&PSW)) */
/* OBSOLETE #define PSWH (*AH2_4(&PSW)) */
/* OBSOLETE #define DPSW (STATE_CPU (sd, 0)->regs.control[debug_backup_processor_status_word_cr]) */
/* OBSOLETE #define DPC (STATE_CPU (sd, 0)->regs.control[debug_backup_program_counter_cr]) */
/* OBSOLETE #define bPC (STATE_CPU (sd, 0)->regs.control[backup_program_counter_cr]) */
/* OBSOLETE #define bPSW (STATE_CPU (sd, 0)->regs.control[backup_processor_status_word_cr]) */
/* OBSOLETE #define RPT_C (STATE_CPU (sd, 0)->regs.control[repeat_count_cr]) */
/* OBSOLETE #define RPT_S (STATE_CPU (sd, 0)->regs.control[repeat_start_address_cr]) */
/* OBSOLETE #define RPT_E (STATE_CPU (sd, 0)->regs.control[repeat_end_address_cr]) */
/* OBSOLETE #define MOD_S (STATE_CPU (sd, 0)->regs.control[modulo_start_address_cr]) */
/* OBSOLETE #define MOD_E (STATE_CPU (sd, 0)->regs.control[modulo_end_address_cr]) */
/* OBSOLETE #define IBA (STATE_CPU (sd, 0)->regs.control[instruction_break_address_cr]) */
/* OBSOLETE #define EIT_VB (STATE_CPU (sd, 0)->regs.control[eit_vector_base_cr]) */
/* OBSOLETE #define GPR (STATE_CPU (sd, 0)->regs.general_purpose) */
/* OBSOLETE #define GPR_CLEAR(N) (GPR[(N)] = 0) */
/* OBSOLETE #define ACC (STATE_CPU (sd, 0)->regs.accumulator) */
/* OBSOLETE #define CREG (STATE_CPU (sd, 0)->regs.control) */
/* OBSOLETE #define SP (GPR[STACK_POINTER_GPR]) */
/* OBSOLETE #define TRACE_CALL_P (STATE_CPU (sd, 0)->trace_call_p) */
/* OBSOLETE #define TRACE_TRAP_P (STATE_CPU (sd, 0)->trace_trap_p) */
/* OBSOLETE #define TRACE_ACTION (STATE_CPU (sd, 0)->trace_action) */
/* OBSOLETE #define TRACE_ACTION_CALL 0x00000001 /* call occurred */ */
/* OBSOLETE #define TRACE_ACTION_RETURN 0x00000002 /* return occurred */ */
/* OBSOLETE */
/* OBSOLETE #define WRITE32 (STATE_CPU (sd, 0)->write32) */
/* OBSOLETE #define WRITE32_NUM (WRITE32.num) */
/* OBSOLETE #define WRITE32_PTR(N) (WRITE32.ptr[N]) */
/* OBSOLETE #define WRITE32_MASK(N) (WRITE32.mask[N]) */
/* OBSOLETE #define WRITE32_VALUE(N) (WRITE32.value[N]) */
/* OBSOLETE #define WRITE32_QUEUE(PTR, VALUE) WRITE32_QUEUE_MASK (PTR, VALUE, 0xffffffff) */
/* OBSOLETE */
/* OBSOLETE #define WRITE32_QUEUE_MASK(PTR, VALUE, MASK) \ */
/* OBSOLETE do { \ */
/* OBSOLETE int _num = WRITE32_NUM; \ */
/* OBSOLETE if (_num >= MAX_WRITE32) \ */
/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, \ */
/* OBSOLETE "Too many queued 32-bit writes"); \ */
/* OBSOLETE WRITE32_PTR(_num) = PTR; \ */
/* OBSOLETE WRITE32_VALUE(_num) = VALUE; \ */
/* OBSOLETE WRITE32_MASK(_num) = MASK; \ */
/* OBSOLETE WRITE32_NUM = _num+1; \ */
/* OBSOLETE } while (0) */
/* OBSOLETE */
/* OBSOLETE #define DID_TRAP (STATE_CPU (sd, 0)->did_trap) */
/* OBSOLETE */
/* OBSOLETE #define WRITE64 (STATE_CPU (sd, 0)->write64) */
/* OBSOLETE #define WRITE64_NUM (WRITE64.num) */
/* OBSOLETE #define WRITE64_PTR(N) (WRITE64.ptr[N]) */
/* OBSOLETE #define WRITE64_VALUE(N) (WRITE64.value[N]) */
/* OBSOLETE #define WRITE64_QUEUE(PTR, VALUE) \ */
/* OBSOLETE do { \ */
/* OBSOLETE int _num = WRITE64_NUM; \ */
/* OBSOLETE if (_num >= MAX_WRITE64) \ */
/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, \ */
/* OBSOLETE "Too many queued 64-bit writes"); \ */
/* OBSOLETE WRITE64_PTR(_num) = PTR; \ */
/* OBSOLETE WRITE64_VALUE(_num) = VALUE; \ */
/* OBSOLETE WRITE64_NUM = _num+1; \ */
/* OBSOLETE } while (0) */
/* OBSOLETE */
/* OBSOLETE #define DPSW_VALID 0xbf005555 */
/* OBSOLETE #define PSW_VALID 0xb7005555 */
/* OBSOLETE #define EIT_VALID 0xfffff000 /* From page 7-4 of D30V/MPEG arch. manual */ */
/* OBSOLETE #define EIT_VB_DEFAULT 0xfffff000 /* Value of the EIT_VB register after reset */ */
/* OBSOLETE */
/* OBSOLETE /* Verify that the instruction is in the correct slot */ */
/* OBSOLETE */
/* OBSOLETE #define IS_WRONG_SLOT is_wrong_slot(sd, cia, MY_INDEX) */
/* OBSOLETE extern int is_wrong_slot */
/* OBSOLETE (SIM_DESC sd, */
/* OBSOLETE address_word cia, */
/* OBSOLETE itable_index index); */
/* OBSOLETE */
/* OBSOLETE #define IS_CONDITION_OK is_condition_ok(sd, cia, CCC) */
/* OBSOLETE extern int is_condition_ok */
/* OBSOLETE (SIM_DESC sd, */
/* OBSOLETE address_word cia, */
/* OBSOLETE int cond); */
/* OBSOLETE */
/* OBSOLETE #define SIM_HAVE_BREAKPOINTS /* Turn on internal breakpoint module */ */
/* OBSOLETE */
/* OBSOLETE /* Internal breakpoint instruction is syscall 5 */ */
/* OBSOLETE #define SIM_BREAKPOINT {0x0e, 0x00, 0x00, 0x05} */
/* OBSOLETE #define SIM_BREAKPOINT_SIZE (4) */
/* OBSOLETE */
/* OBSOLETE /* Call occurred */ */
/* OBSOLETE extern void call_occurred */
/* OBSOLETE (SIM_DESC sd, */
/* OBSOLETE sim_cpu *cpu, */
/* OBSOLETE address_word cia, */
/* OBSOLETE address_word nia); */
/* OBSOLETE */
/* OBSOLETE /* Return occurred */ */
/* OBSOLETE extern void return_occurred */
/* OBSOLETE (SIM_DESC sd, */
/* OBSOLETE sim_cpu *cpu, */
/* OBSOLETE address_word cia, */
/* OBSOLETE address_word nia); */
/* OBSOLETE */
/* OBSOLETE /* Whether to do call tracing. */ */
/* OBSOLETE extern int d30v_call_trace_p; */
/* OBSOLETE */
/* OBSOLETE /* Read/write functions for system call interface. */ */
/* OBSOLETE extern int d30v_read_mem */
/* OBSOLETE (host_callback *cb, */
/* OBSOLETE struct cb_syscall *sc, */
/* OBSOLETE unsigned long taddr, */
/* OBSOLETE char *buf, */
/* OBSOLETE int bytes); */
/* OBSOLETE */
/* OBSOLETE extern int d30v_write_mem */
/* OBSOLETE (host_callback *cb, */
/* OBSOLETE struct cb_syscall *sc, */
/* OBSOLETE unsigned long taddr, */
/* OBSOLETE const char *buf, */
/* OBSOLETE int bytes); */
/* OBSOLETE */
/* OBSOLETE /* Process all of the queued up writes in order now */ */
/* OBSOLETE void unqueue_writes */
/* OBSOLETE (SIM_DESC sd, */
/* OBSOLETE sim_cpu *cpu, */
/* OBSOLETE address_word cia); */
/* OBSOLETE */
/* OBSOLETE #endif /* _CPU_H_ */ */

2421
sim/d30v/d30v-insns
View file

File diff suppressed because it is too large Load diff

22
sim/d30v/dc-short
View file

@ -1,22 +0,0 @@
# OBSOLETE //
# OBSOLETE // Mitsubishi Electric Corp. D30V Simulator.
# OBSOLETE // Copyright (C) 1997, Free Software Foundation, Inc.
# OBSOLETE // Contributed by Cygnus Solutions Inc.
# OBSOLETE //
# OBSOLETE // This file is part of GDB, the GNU debugger.
# OBSOLETE //
# OBSOLETE // This program is free software; you can redistribute it and/or modify
# OBSOLETE // it under the terms of the GNU General Public License as published by
# OBSOLETE // the Free Software Foundation; either version 2 of the License, or
# OBSOLETE // (at your option) any later version.
# OBSOLETE //
# OBSOLETE // This program is distributed in the hope that it will be useful,
# OBSOLETE // but WITHOUT ANY WARRANTY; without even the implied warranty of
# OBSOLETE // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# OBSOLETE // GNU General Public License for more details.
# OBSOLETE //
# OBSOLETE // You should have received a copy of the GNU General Public License
# OBSOLETE // along with this program; if not, write to the Free Software
# OBSOLETE // Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
# OBSOLETE //
# OBSOLETE switch: 4: 13: 4: 13

496
sim/d30v/engine.c
View file

@ -1,496 +0,0 @@
/* OBSOLETE /* This file is part of the program psim. */
/* OBSOLETE */
/* OBSOLETE Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> */
/* OBSOLETE Copyright (C) 1996, 1997, Free Software Foundation */
/* OBSOLETE */
/* OBSOLETE This program is free software; you can redistribute it and/or modify */
/* OBSOLETE it under the terms of the GNU General Public License as published by */
/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */
/* OBSOLETE (at your option) any later version. */
/* OBSOLETE */
/* OBSOLETE This program is distributed in the hope that it will be useful, */
/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */
/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
/* OBSOLETE GNU General Public License for more details. */
/* OBSOLETE */
/* OBSOLETE You should have received a copy of the GNU General Public License */
/* OBSOLETE along with this program; if not, write to the Free Software */
/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* OBSOLETE */
/* OBSOLETE */ */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE #ifndef ENGINE_C */
/* OBSOLETE #define ENGINE_C */
/* OBSOLETE */
/* OBSOLETE #include "sim-main.h" */
/* OBSOLETE */
/* OBSOLETE #include <stdio.h> */
/* OBSOLETE #include <ctype.h> */
/* OBSOLETE */
/* OBSOLETE #ifdef HAVE_STDLIB_H */
/* OBSOLETE #include <stdlib.h> */
/* OBSOLETE #endif */
/* OBSOLETE */
/* OBSOLETE #ifdef HAVE_STRING_H */
/* OBSOLETE #include <string.h> */
/* OBSOLETE #else */
/* OBSOLETE #ifdef HAVE_STRINGS_H */
/* OBSOLETE #include <strings.h> */
/* OBSOLETE #endif */
/* OBSOLETE #endif */
/* OBSOLETE */
/* OBSOLETE static void */
/* OBSOLETE do_stack_swap (SIM_DESC sd) */
/* OBSOLETE { */
/* OBSOLETE sim_cpu *cpu = STATE_CPU (sd, 0); */
/* OBSOLETE unsigned new_sp = (PSW_VAL(PSW_SM) != 0); */
/* OBSOLETE if (cpu->regs.current_sp != new_sp) */
/* OBSOLETE { */
/* OBSOLETE cpu->regs.sp[cpu->regs.current_sp] = SP; */
/* OBSOLETE cpu->regs.current_sp = new_sp; */
/* OBSOLETE SP = cpu->regs.sp[cpu->regs.current_sp]; */
/* OBSOLETE } */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE #if WITH_TRACE */
/* OBSOLETE /* Implement ALU tracing of 32-bit registers. */ */
/* OBSOLETE static void */
/* OBSOLETE trace_alu32 (SIM_DESC sd, */
/* OBSOLETE sim_cpu *cpu, */
/* OBSOLETE address_word cia, */
/* OBSOLETE unsigned32 *ptr) */
/* OBSOLETE { */
/* OBSOLETE unsigned32 value = *ptr; */
/* OBSOLETE */
/* OBSOLETE if (ptr >= &GPR[0] && ptr <= &GPR[NR_GENERAL_PURPOSE_REGISTERS]) */
/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */
/* OBSOLETE "Set register r%-2d = 0x%.8lx (%ld)", */
/* OBSOLETE ptr - &GPR[0], (long)value, (long)value); */
/* OBSOLETE */
/* OBSOLETE else if (ptr == &PSW || ptr == &bPSW || ptr == &DPSW) */
/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */
/* OBSOLETE "Set register %s = 0x%.8lx%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", */
/* OBSOLETE (ptr == &PSW) ? "psw" : ((ptr == &bPSW) ? "bpsw" : "dpsw"), */
/* OBSOLETE (long)value, */
/* OBSOLETE (value & (0x80000000 >> PSW_SM)) ? ", sm" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_EA)) ? ", ea" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_DB)) ? ", db" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_DS)) ? ", ds" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_IE)) ? ", ie" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_RP)) ? ", rp" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_MD)) ? ", md" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_F0)) ? ", f0" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_F1)) ? ", f1" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_F2)) ? ", f2" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_F3)) ? ", f3" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_S)) ? ", s" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_V)) ? ", v" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_VA)) ? ", va" : "", */
/* OBSOLETE (value & (0x80000000 >> PSW_C)) ? ", c" : ""); */
/* OBSOLETE */
/* OBSOLETE else if (ptr >= &CREG[0] && ptr <= &CREG[NR_CONTROL_REGISTERS]) */
/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */
/* OBSOLETE "Set register cr%d = 0x%.8lx (%ld)", */
/* OBSOLETE ptr - &CREG[0], (long)value, (long)value); */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE /* Implement ALU tracing of 32-bit registers. */ */
/* OBSOLETE static void */
/* OBSOLETE trace_alu64 (SIM_DESC sd, */
/* OBSOLETE sim_cpu *cpu, */
/* OBSOLETE address_word cia, */
/* OBSOLETE unsigned64 *ptr) */
/* OBSOLETE { */
/* OBSOLETE unsigned64 value = *ptr; */
/* OBSOLETE */
/* OBSOLETE if (ptr >= &ACC[0] && ptr <= &ACC[NR_ACCUMULATORS]) */
/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */
/* OBSOLETE "Set register a%-2d = 0x%.8lx 0x%.8lx", */
/* OBSOLETE ptr - &ACC[0], */
/* OBSOLETE (unsigned long)(unsigned32)(value >> 32), */
/* OBSOLETE (unsigned long)(unsigned32)value); */
/* OBSOLETE */
/* OBSOLETE } */
/* OBSOLETE #endif */
/* OBSOLETE */
/* OBSOLETE /* Process all of the queued up writes in order now */ */
/* OBSOLETE void */
/* OBSOLETE unqueue_writes (SIM_DESC sd, */
/* OBSOLETE sim_cpu *cpu, */
/* OBSOLETE address_word cia) */
/* OBSOLETE { */
/* OBSOLETE int i, num; */
/* OBSOLETE int did_psw = 0; */
/* OBSOLETE unsigned32 *psw_addr = &PSW; */
/* OBSOLETE */
/* OBSOLETE num = WRITE32_NUM; */
/* OBSOLETE for (i = 0; i < num; i++) */
/* OBSOLETE { */
/* OBSOLETE unsigned32 mask = WRITE32_MASK (i); */
/* OBSOLETE unsigned32 *ptr = WRITE32_PTR (i); */
/* OBSOLETE unsigned32 value = (*ptr & ~mask) | (WRITE32_VALUE (i) & mask); */
/* OBSOLETE int j; */
/* OBSOLETE */
/* OBSOLETE if (ptr == psw_addr) */
/* OBSOLETE { */
/* OBSOLETE /* If MU instruction was not a MVTSYS, resolve PSW */
/* OBSOLETE contention in favour of IU. */ */
/* OBSOLETE if(! STATE_CPU (sd, 0)->mvtsys_left_p) */
/* OBSOLETE { */
/* OBSOLETE /* Detect contention in parallel writes to the same PSW flags. */
/* OBSOLETE The hardware allows the updates from IU to prevail over */
/* OBSOLETE those from MU. */ */
/* OBSOLETE */
/* OBSOLETE unsigned32 flag_bits = */
/* OBSOLETE BIT32 (PSW_F0) | BIT32 (PSW_F1) | */
/* OBSOLETE BIT32 (PSW_F2) | BIT32 (PSW_F3) | */
/* OBSOLETE BIT32 (PSW_S) | BIT32 (PSW_V) | */
/* OBSOLETE BIT32 (PSW_VA) | BIT32 (PSW_C); */
/* OBSOLETE unsigned32 my_flag_bits = mask & flag_bits; */
/* OBSOLETE */
/* OBSOLETE for (j = i + 1; j < num; j++) */
/* OBSOLETE if (WRITE32_PTR (j) == psw_addr && /* write to PSW */ */
/* OBSOLETE WRITE32_MASK (j) & my_flag_bits) /* some of the same flags */ */
/* OBSOLETE { */
/* OBSOLETE /* Recompute local mask & value, to suppress this */
/* OBSOLETE earlier write to the same flag bits. */ */
/* OBSOLETE */
/* OBSOLETE unsigned32 new_mask = mask & ~(WRITE32_MASK (j) & my_flag_bits); */
/* OBSOLETE */
/* OBSOLETE /* There is a special case for the VA (accumulated */
/* OBSOLETE overflow) flag, in that it is only included in the */
/* OBSOLETE second instruction's mask if the overflow */
/* OBSOLETE occurred. Yet the hardware still suppresses the */
/* OBSOLETE first instruction's update to VA. So we kludge */
/* OBSOLETE this by inferring PSW_V -> PSW_VA for the second */
/* OBSOLETE instruction. */ */
/* OBSOLETE */
/* OBSOLETE if (WRITE32_MASK (j) & BIT32 (PSW_V)) */
/* OBSOLETE { */
/* OBSOLETE new_mask &= ~BIT32 (PSW_VA); */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE value = (*ptr & ~new_mask) | (WRITE32_VALUE (i) & new_mask); */
/* OBSOLETE } */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE did_psw = 1; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE *ptr = value; */
/* OBSOLETE */
/* OBSOLETE #if WITH_TRACE */
/* OBSOLETE if (TRACE_ALU_P (cpu)) */
/* OBSOLETE trace_alu32 (sd, cpu, cia, ptr); */
/* OBSOLETE #endif */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE num = WRITE64_NUM; */
/* OBSOLETE for (i = 0; i < num; i++) */
/* OBSOLETE { */
/* OBSOLETE unsigned64 *ptr = WRITE64_PTR (i); */
/* OBSOLETE *ptr = WRITE64_VALUE (i); */
/* OBSOLETE */
/* OBSOLETE #if WITH_TRACE */
/* OBSOLETE if (TRACE_ALU_P (cpu)) */
/* OBSOLETE trace_alu64 (sd, cpu, cia, ptr); */
/* OBSOLETE #endif */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE WRITE32_NUM = 0; */
/* OBSOLETE WRITE64_NUM = 0; */
/* OBSOLETE */
/* OBSOLETE if (DID_TRAP == 1) /* ordinary trap */ */
/* OBSOLETE { */
/* OBSOLETE bPSW = PSW; */
/* OBSOLETE PSW &= (BIT32 (PSW_DB) | BIT32 (PSW_SM)); */
/* OBSOLETE did_psw = 1; */
/* OBSOLETE } */
/* OBSOLETE else if (DID_TRAP == 2) /* debug trap */ */
/* OBSOLETE { */
/* OBSOLETE DPSW = PSW; */
/* OBSOLETE PSW &= BIT32 (PSW_DS); */
/* OBSOLETE PSW |= BIT32 (PSW_DS); */
/* OBSOLETE did_psw = 1; */
/* OBSOLETE } */
/* OBSOLETE DID_TRAP = 0; */
/* OBSOLETE */
/* OBSOLETE if (did_psw) */
/* OBSOLETE do_stack_swap (sd); */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE /* SIMULATE INSTRUCTIONS, various different ways of achieving the same */
/* OBSOLETE thing */ */
/* OBSOLETE */
/* OBSOLETE static address_word */
/* OBSOLETE do_long (SIM_DESC sd, */
/* OBSOLETE l_instruction_word instruction, */
/* OBSOLETE address_word cia) */
/* OBSOLETE { */
/* OBSOLETE address_word nia = l_idecode_issue(sd, */
/* OBSOLETE instruction, */
/* OBSOLETE cia); */
/* OBSOLETE */
/* OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); */
/* OBSOLETE return nia; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE static address_word */
/* OBSOLETE do_2_short (SIM_DESC sd, */
/* OBSOLETE s_instruction_word insn1, */
/* OBSOLETE s_instruction_word insn2, */
/* OBSOLETE cpu_units unit, */
/* OBSOLETE address_word cia) */
/* OBSOLETE { */
/* OBSOLETE address_word nia; */
/* OBSOLETE */
/* OBSOLETE /* run the first instruction */ */
/* OBSOLETE STATE_CPU (sd, 0)->unit = unit; */
/* OBSOLETE STATE_CPU (sd, 0)->left_kills_right_p = 0; */
/* OBSOLETE STATE_CPU (sd, 0)->mvtsys_left_p = 0; */
/* OBSOLETE nia = s_idecode_issue(sd, */
/* OBSOLETE insn1, */
/* OBSOLETE cia); */
/* OBSOLETE */
/* OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); */
/* OBSOLETE */
/* OBSOLETE /* Only do the second instruction if the PC has not changed */ */
/* OBSOLETE if ((nia == INVALID_INSTRUCTION_ADDRESS) && */
/* OBSOLETE (! STATE_CPU (sd, 0)->left_kills_right_p)) { */
/* OBSOLETE STATE_CPU (sd, 0)->unit = any_unit; */
/* OBSOLETE nia = s_idecode_issue (sd, */
/* OBSOLETE insn2, */
/* OBSOLETE cia); */
/* OBSOLETE */
/* OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE STATE_CPU (sd, 0)->left_kills_right_p = 0; */
/* OBSOLETE STATE_CPU (sd, 0)->mvtsys_left_p = 0; */
/* OBSOLETE return nia; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE static address_word */
/* OBSOLETE do_parallel (SIM_DESC sd, */
/* OBSOLETE s_instruction_word left_insn, */
/* OBSOLETE s_instruction_word right_insn, */
/* OBSOLETE address_word cia) */
/* OBSOLETE { */
/* OBSOLETE address_word nia_left; */
/* OBSOLETE address_word nia_right; */
/* OBSOLETE address_word nia; */
/* OBSOLETE */
/* OBSOLETE /* run the first instruction */ */
/* OBSOLETE STATE_CPU (sd, 0)->unit = memory_unit; */
/* OBSOLETE STATE_CPU (sd, 0)->left_kills_right_p = 0; */
/* OBSOLETE STATE_CPU (sd, 0)->mvtsys_left_p = 0; */
/* OBSOLETE nia_left = s_idecode_issue(sd, */
/* OBSOLETE left_insn, */
/* OBSOLETE cia); */
/* OBSOLETE */
/* OBSOLETE /* run the second instruction */ */
/* OBSOLETE STATE_CPU (sd, 0)->unit = integer_unit; */
/* OBSOLETE nia_right = s_idecode_issue(sd, */
/* OBSOLETE right_insn, */
/* OBSOLETE cia); */
/* OBSOLETE */
/* OBSOLETE /* merge the PC's */ */
/* OBSOLETE if (nia_left == INVALID_INSTRUCTION_ADDRESS) { */
/* OBSOLETE if (nia_right == INVALID_INSTRUCTION_ADDRESS) */
/* OBSOLETE nia = INVALID_INSTRUCTION_ADDRESS; */
/* OBSOLETE else */
/* OBSOLETE nia = nia_right; */
/* OBSOLETE } */
/* OBSOLETE else { */
/* OBSOLETE if (nia_right == INVALID_INSTRUCTION_ADDRESS) */
/* OBSOLETE nia = nia_left; */
/* OBSOLETE else { */
/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, "parallel jumps"); */
/* OBSOLETE nia = INVALID_INSTRUCTION_ADDRESS; */
/* OBSOLETE } */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); */
/* OBSOLETE return nia; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE typedef enum { */
/* OBSOLETE p_insn = 0, */
/* OBSOLETE long_insn = 3, */
/* OBSOLETE l_r_insn = 1, */
/* OBSOLETE r_l_insn = 2, */
/* OBSOLETE } instruction_types; */
/* OBSOLETE */
/* OBSOLETE STATIC_INLINE instruction_types */
/* OBSOLETE instruction_type(l_instruction_word insn) */
/* OBSOLETE { */
/* OBSOLETE int fm0 = MASKED64(insn, 0, 0) != 0; */
/* OBSOLETE int fm1 = MASKED64(insn, 32, 32) != 0; */
/* OBSOLETE return ((fm0 << 1) | fm1); */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE void */
/* OBSOLETE sim_engine_run (SIM_DESC sd, */
/* OBSOLETE int last_cpu_nr, */
/* OBSOLETE int nr_cpus, */
/* OBSOLETE int siggnal) */
/* OBSOLETE { */
/* OBSOLETE while (1) */
/* OBSOLETE { */
/* OBSOLETE address_word cia = PC; */
/* OBSOLETE address_word nia; */
/* OBSOLETE l_instruction_word insn = IMEM(cia); */
/* OBSOLETE int rp_was_set; */
/* OBSOLETE int rpt_c_was_nonzero; */
/* OBSOLETE */
/* OBSOLETE /* Before executing the instruction, we need to test whether or */
/* OBSOLETE not RPT_C is greater than zero, and save that state for use */
/* OBSOLETE after executing the instruction. In particular, we need to */
/* OBSOLETE not care whether the instruction changes RPT_C itself. */ */
/* OBSOLETE */
/* OBSOLETE rpt_c_was_nonzero = (RPT_C > 0); */
/* OBSOLETE */
/* OBSOLETE /* Before executing the instruction, we need to check to see if */
/* OBSOLETE we have to decrement RPT_C, the repeat count register. Do this */
/* OBSOLETE if PC == RPT_E, but only if we are in an active repeat block. */ */
/* OBSOLETE */
/* OBSOLETE if (PC == RPT_E && */
/* OBSOLETE (RPT_C > 0 || PSW_VAL (PSW_RP) != 0)) */
/* OBSOLETE { */
/* OBSOLETE RPT_C --; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE /* Now execute the instruction at PC */ */
/* OBSOLETE */
/* OBSOLETE switch (instruction_type (insn)) */
/* OBSOLETE { */
/* OBSOLETE case long_insn: */
/* OBSOLETE nia = do_long (sd, insn, cia); */
/* OBSOLETE break; */
/* OBSOLETE case r_l_insn: */
/* OBSOLETE /* L <- R */ */
/* OBSOLETE nia = do_2_short (sd, insn, insn >> 32, integer_unit, cia); */
/* OBSOLETE break; */
/* OBSOLETE case l_r_insn: */
/* OBSOLETE /* L -> R */ */
/* OBSOLETE nia = do_2_short (sd, insn >> 32, insn, memory_unit, cia); */
/* OBSOLETE break; */
/* OBSOLETE case p_insn: */
/* OBSOLETE nia = do_parallel (sd, insn >> 32, insn, cia); */
/* OBSOLETE break; */
/* OBSOLETE default: */
/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */
/* OBSOLETE "internal error - engine_run_until_stop - bad switch"); */
/* OBSOLETE nia = -1; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE if (TRACE_ACTION) */
/* OBSOLETE { */
/* OBSOLETE if (TRACE_ACTION & TRACE_ACTION_CALL) */
/* OBSOLETE call_occurred (sd, STATE_CPU (sd, 0), cia, nia); */
/* OBSOLETE */
/* OBSOLETE if (TRACE_ACTION & TRACE_ACTION_RETURN) */
/* OBSOLETE return_occurred (sd, STATE_CPU (sd, 0), cia, nia); */
/* OBSOLETE */
/* OBSOLETE TRACE_ACTION = 0; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE /* Check now to see if we need to reset the RP bit in the PSW. */
/* OBSOLETE There are three conditions for this, the RP bit is already */
/* OBSOLETE set (just a speed optimization), the instruction we just */
/* OBSOLETE executed is the last instruction in the loop, and the repeat */
/* OBSOLETE count is currently zero. */ */
/* OBSOLETE */
/* OBSOLETE rp_was_set = PSW_VAL (PSW_RP); */
/* OBSOLETE if (rp_was_set && (PC == RPT_E) && RPT_C == 0) */
/* OBSOLETE { */
/* OBSOLETE PSW_SET (PSW_RP, 0); */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE /* Now update the PC. If we just executed a jump instruction, */
/* OBSOLETE that takes precedence over everything else. Next comes */
/* OBSOLETE branching back to RPT_S as a result of a loop. Finally, the */
/* OBSOLETE default is to simply advance to the next inline */
/* OBSOLETE instruction. */ */
/* OBSOLETE */
/* OBSOLETE if (nia != INVALID_INSTRUCTION_ADDRESS) */
/* OBSOLETE { */
/* OBSOLETE PC = nia; */
/* OBSOLETE } */
/* OBSOLETE else if (rp_was_set && rpt_c_was_nonzero && (PC == RPT_E)) */
/* OBSOLETE { */
/* OBSOLETE PC = RPT_S; */
/* OBSOLETE } */
/* OBSOLETE else */
/* OBSOLETE { */
/* OBSOLETE PC = cia + 8; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE /* Check for DDBT (debugger debug trap) condition. Do this after */
/* OBSOLETE the repeat block checks so the excursion to the trap handler does */
/* OBSOLETE not alter looping state. */ */
/* OBSOLETE */
/* OBSOLETE if (cia == IBA && PSW_VAL (PSW_DB)) */
/* OBSOLETE { */
/* OBSOLETE DPC = PC; */
/* OBSOLETE PSW_SET (PSW_EA, 1); */
/* OBSOLETE DPSW = PSW; */
/* OBSOLETE /* clear all bits in PSW except SM */ */
/* OBSOLETE PSW &= BIT32 (PSW_SM); */
/* OBSOLETE /* add DS bit */ */
/* OBSOLETE PSW |= BIT32 (PSW_DS); */
/* OBSOLETE /* dispatch to DDBT handler */ */
/* OBSOLETE PC = 0xfffff128; /* debugger_debug_trap_address */ */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE /* process any events */ */
/* OBSOLETE /* FIXME - should L->R or L<-R insns count as two cycles? */ */
/* OBSOLETE if (sim_events_tick (sd)) */
/* OBSOLETE { */
/* OBSOLETE sim_events_process (sd); */
/* OBSOLETE } */
/* OBSOLETE } */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE /* d30v external interrupt handler. */
/* OBSOLETE */
/* OBSOLETE Note: This should be replaced by a proper interrupt delivery */
/* OBSOLETE mechanism. This interrupt mechanism discards later interrupts if */
/* OBSOLETE an earlier interrupt hasn't been delivered. */
/* OBSOLETE */
/* OBSOLETE Note: This interrupt mechanism does not reset its self when the */
/* OBSOLETE simulator is re-opened. */ */
/* OBSOLETE */
/* OBSOLETE void */
/* OBSOLETE d30v_interrupt_event (SIM_DESC sd, */
/* OBSOLETE void *data) */
/* OBSOLETE { */
/* OBSOLETE if (PSW_VAL (PSW_IE)) */
/* OBSOLETE /* interrupts not masked */ */
/* OBSOLETE { */
/* OBSOLETE /* scrub any pending interrupt */ */
/* OBSOLETE if (sd->pending_interrupt != NULL) */
/* OBSOLETE sim_events_deschedule (sd, sd->pending_interrupt); */
/* OBSOLETE /* deliver */ */
/* OBSOLETE bPSW = PSW; */
/* OBSOLETE bPC = PC; */
/* OBSOLETE PSW = 0; */
/* OBSOLETE PC = 0xfffff138; /* external interrupt */ */
/* OBSOLETE do_stack_swap (sd); */
/* OBSOLETE } */
/* OBSOLETE else if (sd->pending_interrupt == NULL) */
/* OBSOLETE /* interrupts masked and no interrupt pending */ */
/* OBSOLETE { */
/* OBSOLETE sd->pending_interrupt = sim_events_schedule (sd, 1, */
/* OBSOLETE d30v_interrupt_event, */
/* OBSOLETE data); */
/* OBSOLETE } */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE #endif */

80
sim/d30v/ic-d30v
View file

@ -1,80 +0,0 @@
# OBSOLETE # Instruction cache rules
# OBSOLETE #
# OBSOLETE # This file is part of the program psim.
# OBSOLETE #
# OBSOLETE # Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
# OBSOLETE #
# OBSOLETE # This program is free software; you can redistribute it and/or modify
# OBSOLETE # it under the terms of the GNU General Public License as published by
# OBSOLETE # the Free Software Foundation; either version 2 of the License, or
# OBSOLETE # (at your option) any later version.
# OBSOLETE #
# OBSOLETE # This program is distributed in the hope that it will be useful,
# OBSOLETE # but WITHOUT ANY WARRANTY; without even the implied warranty of
# OBSOLETE # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# OBSOLETE # GNU General Public License for more details.
# OBSOLETE #
# OBSOLETE # You should have received a copy of the GNU General Public License
# OBSOLETE # along with this program; if not, write to the Free Software
# OBSOLETE # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
# OBSOLETE #
# OBSOLETE compute:RA:RA::
# OBSOLETE compute:RA:Ra:signed32 *:(&GPR[RA])
# OBSOLETE compute:RA:RaH:signed16 *:AH2_4(Ra)
# OBSOLETE compute:RA:RaL:signed16 *:AL2_4(Ra)
# OBSOLETE compute:RA:val_Ra:signed32:(RA == 0 ? 0 : GPR[RA])
# OBSOLETE #
# OBSOLETE compute:RB:RB::
# OBSOLETE compute:RB:Rb:signed32:(RB == 0 ? 0 : GPR[RB])
# OBSOLETE compute:RB:RbU:unsigned32:(RB == 0 ? 0 : GPR[RB])
# OBSOLETE compute:RB:RbH:signed16:VH2_4(Rb)
# OBSOLETE compute:RB:RbL:signed16:VL2_4(Rb)
# OBSOLETE compute:RB:RbHU:unsigned16:VH2_4(Rb)
# OBSOLETE compute:RB:RbLU:unsigned16:VL2_4(Rb)
# OBSOLETE #
# OBSOLETE compute:RC:RC::
# OBSOLETE compute:RC:Rc:signed32:(RC == 0 ? 0 : GPR[RC])
# OBSOLETE compute:RC:RcU:unsigned32:(RC == 0 ? 0 : GPR[RC])
# OBSOLETE compute:RC:RcH:signed16:VH2_4(Rc)
# OBSOLETE compute:RC:RcL:signed16:VL2_4(Rc)
# OBSOLETE #
# OBSOLETE #
# OBSOLETE compute:IMM_6S:IMM_6S::
# OBSOLETE compute:IMM_6S:imm:signed32:SEXT32(IMM_6S, 32 - 6)
# OBSOLETE # NB - for short imm[HL] are the same value
# OBSOLETE compute:IMM_6S:immHL:signed32:((imm << 16) | MASKED32(imm, 16, 31))
# OBSOLETE compute:IMM_6S:immH:signed32:imm
# OBSOLETE compute:IMM_6S:immL:signed32:imm
# OBSOLETE compute:IMM_6S:imm_6:signed32:IMM_6S
# OBSOLETE compute:IMM_6S:imm_5:signed32:LSMASKED32(IMM_6S, 4, 0)
# OBSOLETE compute:IMM_6S:imm_6u:unsigned32:(IMM_6S & 0x3f)
# OBSOLETE #
# OBSOLETE compute:RC:pcdisp:signed32:(Rc & ~0x7)
# OBSOLETE compute:RC:pcaddr:signed32:pcdisp
# OBSOLETE #
# OBSOLETE compute:IMM_18S:IMM_18S::
# OBSOLETE compute:IMM_18S:pcdisp:signed32:(SEXT32(IMM_18S, 32 - 18) << 3)
# OBSOLETE compute:IMM_18S:pcaddr:signed32:pcdisp
# OBSOLETE compute:IMM_12S:IMM_12S::
# OBSOLETE compute:IMM_12S:pcdisp:signed32:(SEXT32(IMM_12S, 32 - 12) << 3)
# OBSOLETE compute:IMM_12S:pcaddr:signed32:pcdisp
# OBSOLETE #
# OBSOLETE compute:IMM_8L:IMM_8L::
# OBSOLETE compute:IMM_18L:IMM_18L::
# OBSOLETE compute:IMM_6L:IMM_6L::
# OBSOLETE compute:IMM_6L:imm:signed32:((((IMM_6L << 8) | IMM_8L) << 18) | IMM_18L)
# OBSOLETE compute:IMM_6L:immHL:signed32:imm
# OBSOLETE compute:IMM_6L:immH:signed32:EXTRACTED32(imm, 0, 15)
# OBSOLETE compute:IMM_6L:immL:signed32:EXTRACTED32(imm, 16, 31)
# OBSOLETE compute:IMM_6L:pcdisp:signed32:(imm & ~0x7)
# OBSOLETE compute:IMM_6L:pcaddr:signed32:pcdisp
# OBSOLETE #
# OBSOLETE #
# OBSOLETE compute:SRC_6:SRC_6::
# OBSOLETE compute:SRC_6:src:unsigned32:(XX == 2 ? SEXT32(SRC_6, 32 - 6) : GPR[SRC_6])
# OBSOLETE #
# OBSOLETE #
# OBSOLETE compute:AA:AA::
# OBSOLETE compute:AA:Aa:unsigned64*:((CPU)->regs.accumulator + AA)
# OBSOLETE compute:AB:AB::
# OBSOLETE compute:AB:Ab:unsigned64*:((CPU)->regs.accumulator + AB)

364
sim/d30v/sim-calls.c
View file

@ -1,364 +0,0 @@
/* OBSOLETE /* This file is part of the program psim. */
/* OBSOLETE */
/* OBSOLETE Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au> */
/* OBSOLETE Copyright (C) 1997, Free Software Foundation */
/* OBSOLETE */
/* OBSOLETE This program is free software; you can redistribute it and/or modify */
/* OBSOLETE it under the terms of the GNU General Public License as published by */
/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */
/* OBSOLETE (at your option) any later version. */
/* OBSOLETE */
/* OBSOLETE This program is distributed in the hope that it will be useful, */
/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */
/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
/* OBSOLETE GNU General Public License for more details. */
/* OBSOLETE */
/* OBSOLETE You should have received a copy of the GNU General Public License */
/* OBSOLETE along with this program; if not, write to the Free Software */
/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* OBSOLETE */
/* OBSOLETE */ */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE #include <stdarg.h> */
/* OBSOLETE #include <ctype.h> */
/* OBSOLETE */
/* OBSOLETE #include "sim-main.h" */
/* OBSOLETE #include "sim-options.h" */
/* OBSOLETE */
/* OBSOLETE #include "bfd.h" */
/* OBSOLETE #include "sim-utils.h" */
/* OBSOLETE */
/* OBSOLETE #ifdef HAVE_STDLIB_H */
/* OBSOLETE #include <stdlib.h> */
/* OBSOLETE #endif */
/* OBSOLETE */
/* OBSOLETE static unsigned long extmem_size = 1024*1024*8; /* 8 meg is the maximum listed in the arch. manual */ */
/* OBSOLETE */
/* OBSOLETE static const char * get_insn_name (sim_cpu *, int); */
/* OBSOLETE */
/* OBSOLETE #define SIM_ADDR unsigned */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE #define OPTION_TRACE_CALL 200 */
/* OBSOLETE #define OPTION_TRACE_TRAPDUMP 201 */
/* OBSOLETE #define OPTION_EXTMEM_SIZE 202 */
/* OBSOLETE */
/* OBSOLETE static SIM_RC */
/* OBSOLETE d30v_option_handler (SIM_DESC sd, */
/* OBSOLETE sim_cpu *cpu, */
/* OBSOLETE int opt, */
/* OBSOLETE char *arg, */
/* OBSOLETE int command_p) */
/* OBSOLETE { */
/* OBSOLETE char *suffix; */
/* OBSOLETE */
/* OBSOLETE switch (opt) */
/* OBSOLETE { */
/* OBSOLETE default: */
/* OBSOLETE break; */
/* OBSOLETE */
/* OBSOLETE case OPTION_TRACE_CALL: */
/* OBSOLETE if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0) */
/* OBSOLETE TRACE_CALL_P = 1; */
/* OBSOLETE else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0) */
/* OBSOLETE TRACE_CALL_P = 0; */
/* OBSOLETE else */
/* OBSOLETE { */
/* OBSOLETE sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg); */
/* OBSOLETE return SIM_RC_FAIL; */
/* OBSOLETE } */
/* OBSOLETE return SIM_RC_OK; */
/* OBSOLETE */
/* OBSOLETE case OPTION_TRACE_TRAPDUMP: */
/* OBSOLETE if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0) */
/* OBSOLETE TRACE_TRAP_P = 1; */
/* OBSOLETE else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0) */
/* OBSOLETE TRACE_TRAP_P = 0; */
/* OBSOLETE else */
/* OBSOLETE { */
/* OBSOLETE sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg); */
/* OBSOLETE return SIM_RC_FAIL; */
/* OBSOLETE } */
/* OBSOLETE return SIM_RC_OK; */
/* OBSOLETE */
/* OBSOLETE case OPTION_EXTMEM_SIZE: */
/* OBSOLETE if (arg == NULL || !isdigit (*arg)) */
/* OBSOLETE { */
/* OBSOLETE sim_io_eprintf (sd, "Invalid memory size `%s'", arg); */
/* OBSOLETE return SIM_RC_FAIL; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE suffix = arg; */
/* OBSOLETE extmem_size = strtol (arg, &suffix, 0); */
/* OBSOLETE if (*suffix == 'm' || *suffix == 'M') */
/* OBSOLETE extmem_size <<= 20; */
/* OBSOLETE else if (*suffix == 'k' || *suffix == 'K') */
/* OBSOLETE extmem_size <<= 10; */
/* OBSOLETE sim_do_commandf (sd, "memory delete 0x80000000"); */
/* OBSOLETE sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size); */
/* OBSOLETE */
/* OBSOLETE return SIM_RC_OK; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE sim_io_eprintf (sd, "Unknown option (%d)\n", opt); */
/* OBSOLETE return SIM_RC_FAIL; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE static const OPTION d30v_options[] = */
/* OBSOLETE { */
/* OBSOLETE { {"trace-call", optional_argument, NULL, OPTION_TRACE_CALL}, */
/* OBSOLETE '\0', "on|off", "Enable tracing of calls and returns, checking saved registers", */
/* OBSOLETE d30v_option_handler }, */
/* OBSOLETE { {"trace-trapdump", optional_argument, NULL, OPTION_TRACE_TRAPDUMP}, */
/* OBSOLETE '\0', "on|off", */
/* OBSOLETE #if TRAPDUMP */
/* OBSOLETE "Traps 0..30 dump out all of the registers (defaults on)", */
/* OBSOLETE #else */
/* OBSOLETE "Traps 0..30 dump out all of the registers", */
/* OBSOLETE #endif */
/* OBSOLETE d30v_option_handler }, */
/* OBSOLETE { {"extmem-size", required_argument, NULL, OPTION_EXTMEM_SIZE}, */
/* OBSOLETE '\0', "size", "Change size of external memory, default 8 meg", */
/* OBSOLETE d30v_option_handler }, */
/* OBSOLETE { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL } */
/* OBSOLETE }; */
/* OBSOLETE */
/* OBSOLETE /* Return name of an insn, used by insn profiling. */ */
/* OBSOLETE */
/* OBSOLETE static const char * */
/* OBSOLETE get_insn_name (sim_cpu *cpu, int i) */
/* OBSOLETE { */
/* OBSOLETE return itable[i].name; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE /* Structures used by the simulator, for gdb just have static structures */ */
/* OBSOLETE */
/* OBSOLETE SIM_DESC */
/* OBSOLETE sim_open (SIM_OPEN_KIND kind, */
/* OBSOLETE host_callback *callback, */
/* OBSOLETE struct _bfd *abfd, */
/* OBSOLETE char **argv) */
/* OBSOLETE { */
/* OBSOLETE SIM_DESC sd = sim_state_alloc (kind, callback); */
/* OBSOLETE */
/* OBSOLETE /* FIXME: watchpoints code shouldn't need this */ */
/* OBSOLETE STATE_WATCHPOINTS (sd)->pc = &(PC); */
/* OBSOLETE STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); */
/* OBSOLETE STATE_WATCHPOINTS (sd)->interrupt_handler = d30v_interrupt_event; */
/* OBSOLETE */
/* OBSOLETE /* Initialize the mechanism for doing insn profiling. */ */
/* OBSOLETE CPU_INSN_NAME (STATE_CPU (sd, 0)) = get_insn_name; */
/* OBSOLETE CPU_MAX_INSNS (STATE_CPU (sd, 0)) = nr_itable_entries; */
/* OBSOLETE */
/* OBSOLETE #ifdef TRAPDUMP */
/* OBSOLETE TRACE_TRAP_P = TRAPDUMP; */
/* OBSOLETE #endif */
/* OBSOLETE */
/* OBSOLETE if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) */
/* OBSOLETE return 0; */
/* OBSOLETE sim_add_option_table (sd, NULL, d30v_options); */
/* OBSOLETE */
/* OBSOLETE /* Memory and EEPROM */ */
/* OBSOLETE /* internal instruction RAM - fixed */ */
/* OBSOLETE sim_do_commandf (sd, "memory region 0,0x10000"); */
/* OBSOLETE /* internal data RAM - fixed */ */
/* OBSOLETE sim_do_commandf (sd, "memory region 0x20000000,0x8000"); */
/* OBSOLETE /* control register dummy area */ */
/* OBSOLETE sim_do_commandf (sd, "memory region 0x40000000,0x10000"); */
/* OBSOLETE /* external RAM */ */
/* OBSOLETE sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size); */
/* OBSOLETE /* EIT RAM */ */
/* OBSOLETE sim_do_commandf (sd, "memory region 0xfffff000,0x1000"); */
/* OBSOLETE */
/* OBSOLETE /* getopt will print the error message so we just have to exit if this fails. */
/* OBSOLETE FIXME: Hmmm... in the case of gdb we need getopt to call */
/* OBSOLETE print_filtered. */ */
/* OBSOLETE if (sim_parse_args (sd, argv) != SIM_RC_OK) */
/* OBSOLETE { */
/* OBSOLETE /* Uninstall the modules to avoid memory leaks, */
/* OBSOLETE file descriptor leaks, etc. */ */
/* OBSOLETE sim_module_uninstall (sd); */
/* OBSOLETE return 0; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE /* check for/establish the a reference program image */ */
/* OBSOLETE if (sim_analyze_program (sd, */
/* OBSOLETE (STATE_PROG_ARGV (sd) != NULL */
/* OBSOLETE ? *STATE_PROG_ARGV (sd) */
/* OBSOLETE : NULL), */
/* OBSOLETE abfd) != SIM_RC_OK) */
/* OBSOLETE { */
/* OBSOLETE sim_module_uninstall (sd); */
/* OBSOLETE return 0; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE /* establish any remaining configuration options */ */
/* OBSOLETE if (sim_config (sd) != SIM_RC_OK) */
/* OBSOLETE { */
/* OBSOLETE sim_module_uninstall (sd); */
/* OBSOLETE return 0; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE if (sim_post_argv_init (sd) != SIM_RC_OK) */
/* OBSOLETE { */
/* OBSOLETE /* Uninstall the modules to avoid memory leaks, */
/* OBSOLETE file descriptor leaks, etc. */ */
/* OBSOLETE sim_module_uninstall (sd); */
/* OBSOLETE return 0; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE return sd; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE void */
/* OBSOLETE sim_close (SIM_DESC sd, int quitting) */
/* OBSOLETE { */
/* OBSOLETE /* Uninstall the modules to avoid memory leaks, */
/* OBSOLETE file descriptor leaks, etc. */ */
/* OBSOLETE sim_module_uninstall (sd); */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE SIM_RC */
/* OBSOLETE sim_create_inferior (SIM_DESC sd, */
/* OBSOLETE struct _bfd *abfd, */
/* OBSOLETE char **argv, */
/* OBSOLETE char **envp) */
/* OBSOLETE { */
/* OBSOLETE /* clear all registers */ */
/* OBSOLETE memset (&STATE_CPU (sd, 0)->regs, 0, sizeof (STATE_CPU (sd, 0)->regs)); */
/* OBSOLETE EIT_VB = EIT_VB_DEFAULT; */
/* OBSOLETE STATE_CPU (sd, 0)->unit = any_unit; */
/* OBSOLETE sim_module_init (sd); */
/* OBSOLETE if (abfd != NULL) */
/* OBSOLETE PC = bfd_get_start_address (abfd); */
/* OBSOLETE else */
/* OBSOLETE PC = 0xfffff000; /* reset value */ */
/* OBSOLETE return SIM_RC_OK; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE void */
/* OBSOLETE sim_do_command (SIM_DESC sd, char *cmd) */
/* OBSOLETE { */
/* OBSOLETE if (sim_args_command (sd, cmd) != SIM_RC_OK) */
/* OBSOLETE sim_io_printf (sd, "Unknown command `%s'\n", cmd); */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE /* The following register definitions were ripped off from */
/* OBSOLETE gdb/config/tm-d30v.h. If any of those defs changes, this table needs to */
/* OBSOLETE be updated. */ */
/* OBSOLETE */
/* OBSOLETE #define NUM_REGS 86 */
/* OBSOLETE */
/* OBSOLETE #define R0_REGNUM 0 */
/* OBSOLETE #define FP_REGNUM 11 */
/* OBSOLETE #define LR_REGNUM 62 */
/* OBSOLETE #define SP_REGNUM 63 */
/* OBSOLETE #define SPI_REGNUM 64 /* Interrupt stack pointer */ */
/* OBSOLETE #define SPU_REGNUM 65 /* User stack pointer */ */
/* OBSOLETE #define CREGS_START 66 */
/* OBSOLETE */
/* OBSOLETE #define PSW_REGNUM (CREGS_START + 0) /* psw, bpsw, or dpsw??? */ */
/* OBSOLETE #define PSW_SM 0x80000000 /* Stack mode: 0 == interrupt (SPI), */
/* OBSOLETE 1 == user (SPU) */ */
/* OBSOLETE #define BPSW_REGNUM (CREGS_START + 1) /* Backup PSW (on interrupt) */ */
/* OBSOLETE #define PC_REGNUM (CREGS_START + 2) /* pc, bpc, or dpc??? */ */
/* OBSOLETE #define BPC_REGNUM (CREGS_START + 3) /* Backup PC (on interrupt) */ */
/* OBSOLETE #define DPSW_REGNUM (CREGS_START + 4) /* Backup PSW (on debug trap) */ */
/* OBSOLETE #define DPC_REGNUM (CREGS_START + 5) /* Backup PC (on debug trap) */ */
/* OBSOLETE #define RPT_C_REGNUM (CREGS_START + 7) /* Loop count */ */
/* OBSOLETE #define RPT_S_REGNUM (CREGS_START + 8) /* Loop start address*/ */
/* OBSOLETE #define RPT_E_REGNUM (CREGS_START + 9) /* Loop end address */ */
/* OBSOLETE #define MOD_S_REGNUM (CREGS_START + 10) */
/* OBSOLETE #define MOD_E_REGNUM (CREGS_START + 11) */
/* OBSOLETE #define IBA_REGNUM (CREGS_START + 14) /* Instruction break address */ */
/* OBSOLETE #define EIT_VB_REGNUM (CREGS_START + 15) /* Vector base address */ */
/* OBSOLETE #define INT_S_REGNUM (CREGS_START + 16) /* Interrupt status */ */
/* OBSOLETE #define INT_M_REGNUM (CREGS_START + 17) /* Interrupt mask */ */
/* OBSOLETE #define A0_REGNUM 84 */
/* OBSOLETE #define A1_REGNUM 85 */
/* OBSOLETE */
/* OBSOLETE int */
/* OBSOLETE sim_fetch_register (sd, regno, buf, length) */
/* OBSOLETE SIM_DESC sd; */
/* OBSOLETE int regno; */
/* OBSOLETE unsigned char *buf; */
/* OBSOLETE int length; */
/* OBSOLETE { */
/* OBSOLETE if (regno < A0_REGNUM) */
/* OBSOLETE { */
/* OBSOLETE unsigned32 reg; */
/* OBSOLETE */
/* OBSOLETE if (regno <= R0_REGNUM + 63) */
/* OBSOLETE reg = sd->cpu[0].regs.general_purpose[regno]; */
/* OBSOLETE else if (regno <= SPU_REGNUM) */
/* OBSOLETE reg = sd->cpu[0].regs.sp[regno - SPI_REGNUM]; */
/* OBSOLETE else */
/* OBSOLETE reg = sd->cpu[0].regs.control[regno - CREGS_START]; */
/* OBSOLETE */
/* OBSOLETE buf[0] = reg >> 24; */
/* OBSOLETE buf[1] = reg >> 16; */
/* OBSOLETE buf[2] = reg >> 8; */
/* OBSOLETE buf[3] = reg; */
/* OBSOLETE } */
/* OBSOLETE else if (regno < NUM_REGS) */
/* OBSOLETE { */
/* OBSOLETE unsigned32 reg; */
/* OBSOLETE */
/* OBSOLETE reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM] >> 32; */
/* OBSOLETE */
/* OBSOLETE buf[0] = reg >> 24; */
/* OBSOLETE buf[1] = reg >> 16; */
/* OBSOLETE buf[2] = reg >> 8; */
/* OBSOLETE buf[3] = reg; */
/* OBSOLETE */
/* OBSOLETE reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM]; */
/* OBSOLETE */
/* OBSOLETE buf[4] = reg >> 24; */
/* OBSOLETE buf[5] = reg >> 16; */
/* OBSOLETE buf[6] = reg >> 8; */
/* OBSOLETE buf[7] = reg; */
/* OBSOLETE } */
/* OBSOLETE else */
/* OBSOLETE abort (); */
/* OBSOLETE return -1; */
/* OBSOLETE } */
/* OBSOLETE */
/* OBSOLETE int */
/* OBSOLETE sim_store_register (sd, regno, buf, length) */
/* OBSOLETE SIM_DESC sd; */
/* OBSOLETE int regno; */
/* OBSOLETE unsigned char *buf; */
/* OBSOLETE int length; */
/* OBSOLETE { */
/* OBSOLETE if (regno < A0_REGNUM) */
/* OBSOLETE { */
/* OBSOLETE unsigned32 reg; */
/* OBSOLETE */
/* OBSOLETE reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; */
/* OBSOLETE */
/* OBSOLETE if (regno <= R0_REGNUM + 63) */
/* OBSOLETE sd->cpu[0].regs.general_purpose[regno] = reg; */
/* OBSOLETE else if (regno <= SPU_REGNUM) */
/* OBSOLETE sd->cpu[0].regs.sp[regno - SPI_REGNUM] = reg; */
/* OBSOLETE else */
/* OBSOLETE sd->cpu[0].regs.control[regno - CREGS_START] = reg; */
/* OBSOLETE } */
/* OBSOLETE else if (regno < NUM_REGS) */
/* OBSOLETE { */
/* OBSOLETE unsigned32 reg; */
/* OBSOLETE */
/* OBSOLETE reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; */
/* OBSOLETE */
/* OBSOLETE sd->cpu[0].regs.accumulator[regno - A0_REGNUM] = (unsigned64)reg << 32; */
/* OBSOLETE */
/* OBSOLETE reg = (buf[4] << 24) | (buf[5] << 16) | (buf[6] << 8) | buf[7]; */
/* OBSOLETE */
/* OBSOLETE sd->cpu[0].regs.accumulator[regno - A0_REGNUM] |= reg; */
/* OBSOLETE } */
/* OBSOLETE else */
/* OBSOLETE abort (); */
/* OBSOLETE return -1; */
/* OBSOLETE } */

82
sim/d30v/sim-main.h
View file

@ -1,82 +0,0 @@
/* OBSOLETE /* This file is part of the program psim. */
/* OBSOLETE */
/* OBSOLETE Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> */
/* OBSOLETE Copyright (C) 1997, 1998, Free Software Foundation */
/* OBSOLETE */
/* OBSOLETE This program is free software; you can redistribute it and/or modify */
/* OBSOLETE it under the terms of the GNU General Public License as published by */
/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */
/* OBSOLETE (at your option) any later version. */
/* OBSOLETE */
/* OBSOLETE This program is distributed in the hope that it will be useful, */
/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */
/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
/* OBSOLETE GNU General Public License for more details. */
/* OBSOLETE */
/* OBSOLETE You should have received a copy of the GNU General Public License */
/* OBSOLETE along with this program; if not, write to the Free Software */
/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* OBSOLETE */
/* OBSOLETE */ */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE #ifndef _SIM_MAIN_H_ */
/* OBSOLETE #define _SIM_MAIN_H_ */
/* OBSOLETE */
/* OBSOLETE /* This simulator suports watchpoints */ */
/* OBSOLETE #define WITH_WATCHPOINTS 1 */
/* OBSOLETE */
/* OBSOLETE #include "sim-basics.h" */
/* OBSOLETE #include "sim-signal.h" */
/* OBSOLETE */
/* OBSOLETE /* needed */ */
/* OBSOLETE typedef address_word sim_cia; */
/* OBSOLETE #define INVALID_INSTRUCTION_ADDRESS ((address_word) 0 - 1) */
/* OBSOLETE */
/* OBSOLETE /* This simulator doesn't cache anything so no saving of context is */
/* OBSOLETE needed during either of a halt or restart */ */
/* OBSOLETE #define SIM_ENGINE_HALT_HOOK(SD,CPU,CIA) while (0) */
/* OBSOLETE #define SIM_ENGINE_RESTART_HOOK(SD,CPU,CIA) while (0) */
/* OBSOLETE */
/* OBSOLETE #include "sim-base.h" */
/* OBSOLETE */
/* OBSOLETE /* These are generated files. */ */
/* OBSOLETE #include "itable.h" */
/* OBSOLETE #include "s_idecode.h" */
/* OBSOLETE #include "l_idecode.h" */
/* OBSOLETE */
/* OBSOLETE #include "cpu.h" */
/* OBSOLETE #include "alu.h" */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE struct sim_state { */
/* OBSOLETE */
/* OBSOLETE sim_event *pending_interrupt; */
/* OBSOLETE */
/* OBSOLETE /* the processors proper */ */
/* OBSOLETE sim_cpu cpu[MAX_NR_PROCESSORS]; */
/* OBSOLETE #if (WITH_SMP) */
/* OBSOLETE #define STATE_CPU(sd, n) (&(sd)->cpu[n]) */
/* OBSOLETE #else */
/* OBSOLETE #define STATE_CPU(sd, n) (&(sd)->cpu[0]) */
/* OBSOLETE #endif */
/* OBSOLETE */
/* OBSOLETE /* The base class. */ */
/* OBSOLETE sim_state_base base; */
/* OBSOLETE */
/* OBSOLETE }; */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE /* deliver an interrupt */ */
/* OBSOLETE sim_event_handler d30v_interrupt_event; */
/* OBSOLETE */
/* OBSOLETE */
/* OBSOLETE #ifdef HAVE_STRING_H */
/* OBSOLETE #include <string.h> */
/* OBSOLETE #else */
/* OBSOLETE #ifdef HAVE_STRINGS_H */
/* OBSOLETE #include <strings.h> */
/* OBSOLETE #endif */
/* OBSOLETE #endif */
/* OBSOLETE */
/* OBSOLETE #endif /* _SIM_MAIN_H_ */ */

8
sim/d30v/tconfig.in
View file

@ -1,8 +0,0 @@
/* D30V target configuration file. -*- C -*- */
/* Define this to enable the intrinsic breakpoint mechanism. */
#define SIM_HAVE_BREAKPOINTS
/* See sim-hload.c. We properly handle LMA. */
#define SIM_HANDLES_LMA 1

440
sim/fr30/ChangeLog
View file

@ -1,440 +0,0 @@
2002-07-16 Andrew Cagney <ac131313@redhat.com>
* Makefile.in: Make file obsolete.
* cpu.c, arch.h, arch.c, cpu.h, decode.h: Ditto.
* decode.c, fr30-sim.h, devices.c, fr30.c: Ditto.
* model.c, sem-switch.c, sim-if.c: Ditto.
* sim-main.h, traps.c, sem.c: Ditto.
* TODO, README: Ditto.
* configure.in: Ditto.
* configure: Regenerate.
2002-06-16 Andrew Cagney <ac131313@redhat.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
2001-11-14 Dave Brolley <brolley@redhat.com>
* arch.c: Regenerate.
* arch.h: Regenerate.
* cpu.c: Regenerate.
* cpu.h: Regenerate.
* cpuall.h: Regenerate.
* decode.c: Regenerate.
* decode.h: Regenerate.
* model.c: Regenerate.
* sem-switch.c: Regenerate.
* sem.c: Regenerate.
2001-07-05 Ben Elliston <bje@redhat.com>
* Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR).
(stamp-cpu): Likewise.
2001-03-05 Dave Brolley <brolley@redhat.com>
* arch.c: Regenerate.
* arch.h: Regenerate.
* cpu.c: Regenerate.
* cpu.h: Regenerate.
* cpuall.h: Regenerate.
* decode.c: Regenerate.
* decode.h: Regenerate.
* model.c: Regenerate.
* sem-switch.c: Regenerate.
* sem.c: Regenerate.
2001-01-12 Frank Ch. Eigler <fche@redhat.com>
* configure: Regenerated with sim_scache fix.
2000-11-18 Greg McGary <greg@mcgary.org>
* Makefile.in: remove `@true' commands for rules that have
$(CGEN_MAINT) as a prerequisite.
2000-10-06 Dave Brolley <brolley@redhat.com>
* sem.c: Regenerated.
* sem-switch.c: Regenerated.
2000-08-28 Dave Brolley <brolley@redhat.com>
* cpu.h: Regenerated.
* decode.c: Regenerated.
2000-08-21 Frank Ch. Eigler <fche@redhat.com>
* Makefile.in (fr30-clean): Add stamp-arch, stamp-cpu.
(stamp-arch, stamp-cpu): New targets.
Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
2000-03-30 Dave Brolley <brolley@redhat.com>
* configure: Regenerated.
1999-10-04 Doug Evans <devans@casey.cygnus.com>
* sem.c,sem-switch.c: Rebuild.
* traps.c (sim_engine_invalid_insn): New arg `vpc'. Change type of
result to SEM_PC. Return vpc.
Wed Sep 29 14:45:32 1999 Dave Brolley <brolley@cygnus.com>
* traps.c (sim_engine_invalid_insn): Return PC.
Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
1999-08-31 Doug Evans <devans@casey.cygnus.com>
* sem.c: Rebuild.
1999-08-09 Doug Evans <devans@casey.cygnus.com>
* cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
1999-08-04 Doug Evans <devans@casey.cygnus.com>
* cpu.h,cpuall.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild.
1999-07-06 Doug Evans <devans@casey.cygnus.com>
* cpu.h,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Fri Apr 16 16:50:31 1999 Doug Evans <devans@charmed.cygnus.com>
* devices.c (device_io_read_buffer): New arg `sd'.
(device_io_write_buffer): New arg `sd'.
(device_error): Give proper arg spec.
1999-04-10 Doug Evans <devans@casey.cygnus.com>
* cpu.h,sem-switch.c,sem.c: Rebuild.
1999-03-27 Doug Evans <devans@casey.cygnus.com>
* decode.c: Rebuild.
1999-03-22 Doug Evans <devans@casey.cygnus.com>
* arch.c,arch.h,model.c: Rebuild.
* fr30.c (fr30bf_fetch_register): Replace calls to a_fr30_h_* with
calls to fr30bf_h_*.
(fr30bf_store_register): Ditto.
* traps.c (setup_int): Ditto.
* sim-if.c (sim_open): Update call to fr30_cgen_cpu_open.
Mon Mar 22 13:13:05 1999 Dave Brolley <brolley@cygnus.com>
* configure.in: Use SIM_AC_OPTION_ALIGNMENT(FORCED_ALIGNMENT).
* configure: Regenerate.
* cpu.h: Regenerate.
1999-03-11 Doug Evans <devans@casey.cygnus.com>
* arch.c,arch.h,cpu.c,cpu.h: Rebuild.
* fr30-sim.h (GET_H_SBIT,SET_H_SBIT): Delete.
(GET_H_CCR,SET_H_CCR,GET_H_SCR,SET_H_SCR,GET_H_ILM,SET_H_ILM): Delete.
(GET_H_PS,SET_H_PS,GET_H_DR,SET_H_DR): Delete.
* sim-if.c (sim_open): Update call to fr30_cgen_cpu_open.
1999-02-25 Doug Evans <devans@casey.cygnus.com>
* cpu.h: Rebuild.
1999-02-09 Doug Evans <devans@casey.cygnus.com>
* Makefile.in (SIM_EXTRA_DEPS): Add fr30-desc.h, delete cpu-opc.h.
* configure.in (sim_link_files,sim_link_links): Delete.
* configure: Rebuild.
* decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
* fr30.c (fr30bf_model_fr30_1_u_cti): CGEN_INSN_ATTR renamed to
CGEN_INSN_ATTR_VALUE.
* mloop.in (extract-pbb): Ditto. Use idesc->length to get insn length.
* sim-if.c (sim_open): fr30_cgen_cpu_open renamed from
fr30_cgen_opcode_open. Set disassembler.
(sim_close): fr30_cgen_cpu_open renamed from fr30_cgen_opcode_open.
* sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include
fr30-desc.h,fr30-opc.h,fr30-sim.h.
1999-01-27 Doug Evans <devans@casey.cygnus.com>
* cpu.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild.
1999-01-15 Doug Evans <devans@casey.cygnus.com>
* cpu.h,decode.h,model.c: Regenerate.
* fr30.c (fr30bf_model_insn_before): Clear load_regs_pending.
(fr30bf_model_insn_after): Copy load_regs_pending to load_regs.
(fr30bf_model_fr30_1_u_exec): Check for load stalls.
(fr30bf_model_fr30_1_u_{cti,load,store}): Ditto.
1999-01-14 Doug Evans <devans@casey.cygnus.com>
* arch.c,arch.h,cpuall.h: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
* devices.c (device_io_write_buffer): Remove some m32r cruft.
* fr30-sim.h (FR30_MISC_PROFILE): Delete, plus supporting macros.
(EIT_*,MSPR_*,MLCR_*,MPMR_*): Delete, m32r cruft.
* fr30.c (fr30bf_model_insn_after): Update cycle counts.
(check_load_stall): New function.
(fr30bf_model_fr30_1_u_exec): Update argument list.
(fr30bf_model_fr30_1_u_{cti,load,store,ldm,stm}): New functions.
* sim-if.c (sim_open): Comment out memory mapped device allocation.
Delete FR30_MISC_PROFILE handling.
(print_fr30_misc_cpu): Delete.
* sim-main.h (_sim_cpu): Delete member fr30_misc_profile.
* traps.c (sim_engine_invalid_insn): PCADDR->IADDR.
1999-01-11 Doug Evans <devans@casey.cygnus.com>
* Makefile.in (fr30-clean): rm eng.h.
* sim-main.h: Delete inclusion of ansidecl.h.
Include sim-basics.h before cgen-types.h.
Delete inclusion of cgen-scache.h,cgen-cpu.h,cgen-trace.h,cpuall.h.
* cpu.h,sem-switch.c,sem.c: Regenerate.
1999-01-05 Doug Evans <devans@casey.cygnus.com>
* Makefile.in (MAIN_INCLUDE_DEPS): Delete.
(INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete.
(sim-if.o,arch.o,devices.o): Use SIM_MAIN_DEPS.
(FR30BF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS.
(mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies.
* cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
* fr30-sim.h (fr30bf_h_sbit_[gs]et_handler): Declare.
([GS]ET_H_SBIT): Define.
(fr30bf_h_ccr_[gs]et_handler): Declare.
([GS]ET_H_CCR): Define.
(fr30bf_h_scr_[gs]et_handler): Declare.
([GS]ET_H_SCR): Define.
(fr30bf_h_ilm_[gs]et_handler): Declare.
([GS]ET_H_ILM): Define.
(fr30bf_h_ps_[gs]et_handler): Declare.
([GS]ET_H_PS): Define.
(fr30bf_h_dr_[gs]et_handler): Declare.
([GS]ET_H_DR): Define.
* fr30.c (all register access fns): Rename to ..._handler.
(fr30bf_h_*_get_handler,fr30bf_h_*_set_handler): Rewrite to use
CPU or GET_H_FOO/SET_H_FOO access macros as appropriate.
* sim-if.c (sim_open): Model probing code moved to sim-model.c.
Fri Dec 18 17:09:34 1998 Dave Brolley <brolley@cygnus.com>
* fr30.c (fr30bf_store_register): Call a_fr30_h_dr_set for
dedicated registers.
Thu Dec 17 17:17:48 1998 Dave Brolley <brolley@cygnus.com>
* sem-switch.c,sem.c: Regenerate.
Tue Dec 15 17:39:59 1998 Dave Brolley <brolley@cygnus.com>
* traps.c (setup_int): Correct calls to SETMEMSI.
(fr30_int): Must calculate new pc after saving old one.
* fr30.c (fr30bf_h_sbit_get): New function.
(fr30bf_h_sbit_set): New function.
(fr30bf_h_ccr_set): Use fr30bf_h_sbit_set and move stack switching
logic to that function.
* cpu.[ch],decode.c,model.c,sem-switch.c,sem.c: Regenerate.
1998-12-14 Doug Evans <devans@casey.cygnus.com>
* configure.in: --enable-cgen-maint moved to common/aclocal.m4.
* configure: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* traps.c (setup_int): Use enums for register numbers.
(fr30_int): Ditto.
1998-12-14 Dave Brolley <brolley@cygnus.com>
* cpu.h,decode.[ch],model.c,sem-switch.c,sem.c: Regenerate.
Thu Dec 10 18:43:13 1998 Dave Brolley <brolley@cygnus.com>
* arch.[ch],cpu.[ch],decode.c,model.c,sem-switch.c,sem.c: Regenerate.
* fr30.c (fr30bf_h_scr_get): Implement as separate bits.
(fr30bf_h_scr_set): Implement as separate bits.
Wed Dec 9 13:25:37 1998 Doug Evans <devans@canuck.cygnus.com>
* cpu.h,decode.c,sem-switch.c,sem.c: Regenerate.
Tue Dec 8 13:15:23 1998 Dave Brolley <brolley@cygnus.com>
* cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
Mon Dec 7 14:35:23 1998 Dave Brolley <brolley@cygnus.com>
* traps.c (fr30_inte): New function.
* cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
1998-12-05 Doug Evans <devans@casey.cygnus.com>
* cpu.h,cpuall.h,decode.c,sem-switch.c,sem.c: Regenerate.
* mloop.in (extract): Make static inline. Rewrite.
(execute): Check ARGBUF_PROFILE_P before profiling.
Update calls to TRACE_INSN_INIT,TRACE_INSN_FINI.
Fri Dec 4 16:18:25 1998 Doug Evans <devans@canuck.cygnus.com>
* sem.c,sem-switch.c: Regenerate.
* cpu.h,decode.c: Regenerate.
Fri Dec 4 17:09:27 1998 Dave Brolley <brolley@cygnus.com>
* cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
Fri Dec 4 00:22:43 1998 Doug Evans <devans@canuck.cygnus.com>
* cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
Thu Dec 3 17:33:16 1998 Dave Brolley <brolley@cygnus.com>
* fr30.c (fr30bf_h_ccr_get): New function.
(fr30bf_h_ccr_set): New function.
(fr30bf_h_ps_get): Use ccr access function.
(fr30bf_h_ps_set): Use ccr access function.
(fr30bf_h_scr_get): New function.
(fr30bf_h_scr_set): New function.
(fr30bf_h_ilm_get): New function.
(fr30bf_h_ilm_set): New function
(fr30bf_h_ps_get): Implement src and ilm.
(fr30bf_h_ps_set): Implement src and ilm.
* arch.c,arch.h,cpu.h,decode.c,decode.h,model.c,
sem-switch.c,sem.c: Regenerate.
Thu Dec 3 00:15:11 1998 Doug Evans <devans@canuck.cygnus.com>
* cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
1998-11-30 Doug Evans <devans@casey.cygnus.com>
* mloop.in (extract-pbb): Add delay slot support.
* cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
Thu Nov 26 11:28:30 1998 Dave Brolley <brolley@cygnus.com>
* cpu.h,decode.c,model.c,sem.c,sem-switch.c: Regenerated.
Mon Nov 23 18:30:36 1998 Dave Brolley <brolley@cygnus.com>
* cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerated.
1998-11-20 Doug Evans <devans@tobor.to.cygnus.com>
* fr30-sim.h (*-REGNUM): Sync up with gdb.
* fr30.c (decode_gdb_dr_regnum): New function.
(fr30bf_fetch_register): Implement.
(fr30bf_store_register): Ditto.
(fr30bf_h_ps_get,fr30bf_h_ps_set): Ditto.
(fr30bf_h_dr_get,fr30bf_h_dr_set): New functions.
* sem-switch.c,sem.c: Rebuild.
* traps.c (setup_int): New function
(fr30_int): Handle all int insn processing here.
Don't save ps,pc if breakpoint trap.
* cpu.c,cpu.h,decode.c,sem-switch.c,sem.c: Regenerate.
Thu Nov 19 16:05:09 1998 Dave Brolley <brolley@cygnus.com>
* traps.c (fr30_int): Correct register usage.
* arch.c: Regenerated.
* arch.h: Regenerated.
* cpu.c: Regenerated.
* cpu.h: Regenerated.
* decode.c: Regenerated.
* decode.h: Regenerated.
* model.c: Regenerated.
* sem-switch.c: Regenerated.
* sem.c: Regenerated.
Wed Nov 18 21:39:37 1998 Dave Brolley <brolley@cygnus.com>
* fr30-sim.h (TRAP_SYSCALL, TRAP_BREAKPOINT): Redefine for fr30.
* fr30.c (fr30bf_h_ps_get): New function.
(fr30bf_h_ps_set): New function.
* mloop.in: Set up fast-pbb model for fr30.
* traps.c (fr30_int): New function.
* arch.c: Regenerated.
* arch.h: Regenerated.
* cpu.c: Regenerated.
* cpu.h: Regenerated.
* decode.c: Regenerated.
* model.c: Regenerated.
* sem-switch.c: Regenerated.
* sem.c: Regenerated.
1998-11-18 Doug Evans <devans@casey.cygnus.com>
* Makefile.in (FR30_OBJS): Delete extract.o.
(FR30BF_INCLUDE_DEPS): Add cgen-engine.h.
(extract.o): Delete rule for.
* mloop.in: Rewrite.
* cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
Wed Nov 18 11:31:21 1998 Dave Brolley <brolley@cygnus.com>
* sem-switch.c: Regenerated.
* sem.c: Regenerated.
Mon Nov 16 19:23:44 1998 Dave Brolley <brolley@cygnus.com>
* arch.c: Regenerated.
* arch.h: Regenerated.
* cpu.c: Regenerated.
* cpu.h: Regenerated.
* decode.c: Regenerated.
* decode.h: Regenerated.
* extract.c: Regenerated.
* model.c: Regenerated.
* sem-switch.c: Regenerated.
* sem.c: Regenerated.
Thu Nov 12 19:27:50 1998 Dave Brolley <brolley@cygnus.com>
* arch.c: Regenerated.
* arch.h: Regenerated.
* cpu.c: Regenerated.
* cpu.h: Regenerated.
* decode.c: Regenerated.
* decode.h: Regenerated.
* extract.c: Regenerated.
* model.c: Regenerated.
* sem-switch.c: Regenerated.
* sem.c: Regenerated.
* fr30.c: Get rid of unused functions.
Mon Nov 9 18:25:47 1998 Dave Brolley <brolley@cygnus.com>
* arch.c: Regenerated.
* arch.h: Regenerated.
* cpu.c: Regenerated.
* cpu.h: Regenerated.
* decode.c: Regenerated.
* decode.h: Regenerated.
* extract.c: Regenerated.
* model.c: Regenerated.
* sem-switch.c: Regenerated.
* sem.c: Regenerated.
* fr30.c: Get rid of m32r stuff. Flesh out fr30 stuff.
Thu Nov 5 15:26:22 1998 Dave Brolley <brolley@cygnus.com>
* cpu.h: Regenerated.
Tue Oct 27 15:39:48 1996 Dave Brolley <brolley@cygnus.com>
* Directory created.

107
sim/fr30/Makefile.in
View file

@ -1,107 +0,0 @@
# OBSOLETE # Makefile template for Configure for the fr30 simulator
# OBSOLETE # Copyright (C) 1998, 2000 Free Software Foundation, Inc.
# OBSOLETE # Contributed by Cygnus Support.
# OBSOLETE #
# OBSOLETE # This program is free software; you can redistribute it and/or modify
# OBSOLETE # it under the terms of the GNU General Public License as published by
# OBSOLETE # the Free Software Foundation; either version 2 of the License, or
# OBSOLETE # (at your option) any later version.
# OBSOLETE #
# OBSOLETE # This program is distributed in the hope that it will be useful,
# OBSOLETE # but WITHOUT ANY WARRANTY; without even the implied warranty of
# OBSOLETE # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# OBSOLETE # GNU General Public License for more details.
# OBSOLETE #
# OBSOLETE # You should have received a copy of the GNU General Public License along
# OBSOLETE # with this program; if not, write to the Free Software Foundation, Inc.,
# OBSOLETE # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
# OBSOLETE
# OBSOLETE ## COMMON_PRE_CONFIG_FRAG
# OBSOLETE
# OBSOLETE FR30_OBJS = fr30.o cpu.o decode.o sem.o model.o arch.o mloop.o
# OBSOLETE
# OBSOLETE CONFIG_DEVICES = dv-sockser.o
# OBSOLETE CONFIG_DEVICES =
# OBSOLETE
# OBSOLETE SIM_OBJS = \
# OBSOLETE $(SIM_NEW_COMMON_OBJS) \
# OBSOLETE sim-cpu.o \
# OBSOLETE sim-hload.o \
# OBSOLETE sim-hrw.o \
# OBSOLETE sim-model.o \
# OBSOLETE sim-reg.o \
# OBSOLETE cgen-utils.o cgen-trace.o cgen-scache.o \
# OBSOLETE cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
# OBSOLETE sim-if.o \
# OBSOLETE $(FR30_OBJS) \
# OBSOLETE traps.o devices.o \
# OBSOLETE $(CONFIG_DEVICES)
# OBSOLETE
# OBSOLETE # Extra headers included by sim-main.h.
# OBSOLETE SIM_EXTRA_DEPS = \
# OBSOLETE $(CGEN_INCLUDE_DEPS) \
# OBSOLETE arch.h cpuall.h fr30-sim.h $(srcdir)/../../opcodes/fr30-desc.h
# OBSOLETE
# OBSOLETE SIM_EXTRA_CFLAGS =
# OBSOLETE
# OBSOLETE SIM_RUN_OBJS = nrun.o
# OBSOLETE SIM_EXTRA_CLEAN = fr30-clean
# OBSOLETE
# OBSOLETE # This selects the fr30 newlib/libgloss syscall definitions.
# OBSOLETE NL_TARGET = -DNL_TARGET_fr30
# OBSOLETE
# OBSOLETE ## COMMON_POST_CONFIG_FRAG
# OBSOLETE
# OBSOLETE arch = fr30
# OBSOLETE
# OBSOLETE sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
# OBSOLETE
# OBSOLETE arch.o: arch.c $(SIM_MAIN_DEPS)
# OBSOLETE
# OBSOLETE devices.o: devices.c $(SIM_MAIN_DEPS)
# OBSOLETE
# OBSOLETE # FR30 objs
# OBSOLETE
# OBSOLETE FR30BF_INCLUDE_DEPS = \
# OBSOLETE $(CGEN_MAIN_CPU_DEPS) \
# OBSOLETE cpu.h decode.h eng.h
# OBSOLETE
# OBSOLETE fr30.o: fr30.c $(FR30BF_INCLUDE_DEPS)
# OBSOLETE
# OBSOLETE # FIXME: Use of `mono' is wip.
# OBSOLETE mloop.c eng.h: stamp-mloop
# OBSOLETE stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
# OBSOLETE $(SHELL) $(srccom)/genmloop.sh \
# OBSOLETE -mono -fast -pbb -switch sem-switch.c \
# OBSOLETE -cpu fr30bf -infile $(srcdir)/mloop.in
# OBSOLETE $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
# OBSOLETE $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
# OBSOLETE touch stamp-mloop
# OBSOLETE mloop.o: mloop.c sem-switch.c $(FR30BF_INCLUDE_DEPS)
# OBSOLETE
# OBSOLETE cpu.o: cpu.c $(FR30BF_INCLUDE_DEPS)
# OBSOLETE decode.o: decode.c $(FR30BF_INCLUDE_DEPS)
# OBSOLETE sem.o: sem.c $(FR30BF_INCLUDE_DEPS)
# OBSOLETE model.o: model.c $(FR30BF_INCLUDE_DEPS)
# OBSOLETE
# OBSOLETE fr30-clean:
# OBSOLETE rm -f mloop.c eng.h stamp-mloop
# OBSOLETE rm -f tmp-*
# OBSOLETE rm -f stamp-arch stamp-cpu
# OBSOLETE
# OBSOLETE # cgen support, enable with --enable-cgen-maint
# OBSOLETE CGEN_MAINT = ; @true
# OBSOLETE # The following line is commented in or out depending upon --enable-cgen-maint.
# OBSOLETE @CGEN_MAINT@CGEN_MAINT =
# OBSOLETE
# OBSOLETE stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/fr30.cpu
# OBSOLETE $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
# OBSOLETE FLAGS="with-scache with-profile=fn"
# OBSOLETE touch stamp-arch
# OBSOLETE arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
# OBSOLETE
# OBSOLETE stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/fr30.cpu
# OBSOLETE $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
# OBSOLETE cpu=fr30bf mach=fr30 SUFFIX= FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
# OBSOLETE touch stamp-cpu
# OBSOLETE cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu

14
sim/fr30/README
View file

@ -1,14 +0,0 @@
OBSOLETE This is the fr30 simulator directory.
OBSOLETE
OBSOLETE It is still work-in-progress. The current sources are reasonably
OBSOLETE well tested and lots of features are in. However, there's lots
OBSOLETE more yet to come.
OBSOLETE
OBSOLETE There are lots of machine generated files in the source directory!
OBSOLETE They are only generated if you configure with --enable-cgen-maint,
OBSOLETE similar in behaviour to Makefile.in, configure under automake/autoconf.
OBSOLETE
OBSOLETE For details on the generator, see ../../cgen.
OBSOLETE
OBSOLETE devo/cgen isn't part of the comp-tools module yet.
OBSOLETE You'll need to check it out manually (also akin to automake/autoconf).

14
sim/fr30/TODO
View file

@ -1,14 +0,0 @@
OBSOLETE m32r-inherited stuff?
OBSOLETE ----------------------
OBSOLETE - header file dependencies revisit
OBSOLETE - hooks cleanup
OBSOLETE - testsuites
OBSOLETE - FIXME's
OBSOLETE
OBSOLETE
OBSOLETE m32r stuff?
OBSOLETE ----------------------
OBSOLETE - memory accesses still test if profiling is on even in fast mode
OBSOLETE - have semantic code use G/SET_H_FOO if not default [incl fun-access]
OBSOLETE - have G/SET_H_FOO macros call function if fun-access
OBSOLETE - --> can always use G/S_H_FOO macros

34
sim/fr30/arch.c
View file

@ -1,34 +0,0 @@
// OBSOLETE /* Simulator support for fr30.
// OBSOLETE
// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN.
// OBSOLETE
// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
// OBSOLETE
// OBSOLETE This file is part of the GNU simulators.
// OBSOLETE
// OBSOLETE This program is free software; you can redistribute it and/or modify
// OBSOLETE it under the terms of the GNU General Public License as published by
// OBSOLETE the Free Software Foundation; either version 2, or (at your option)
// OBSOLETE any later version.
// OBSOLETE
// OBSOLETE This program is distributed in the hope that it will be useful,
// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of
// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// OBSOLETE GNU General Public License for more details.
// OBSOLETE
// OBSOLETE You should have received a copy of the GNU General Public License along
// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,
// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
// OBSOLETE
// OBSOLETE */
// OBSOLETE
// OBSOLETE #include "sim-main.h"
// OBSOLETE #include "bfd.h"
// OBSOLETE
// OBSOLETE const MACH *sim_machs[] =
// OBSOLETE {
// OBSOLETE #ifdef HAVE_CPU_FR30BF
// OBSOLETE & fr30_mach,
// OBSOLETE #endif
// OBSOLETE 0
// OBSOLETE };

45
sim/fr30/arch.h
View file

@ -1,45 +0,0 @@
// OBSOLETE /* Simulator header for fr30.
// OBSOLETE
// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN.
// OBSOLETE
// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
// OBSOLETE
// OBSOLETE This file is part of the GNU simulators.
// OBSOLETE
// OBSOLETE This program is free software; you can redistribute it and/or modify
// OBSOLETE it under the terms of the GNU General Public License as published by
// OBSOLETE the Free Software Foundation; either version 2, or (at your option)
// OBSOLETE any later version.
// OBSOLETE
// OBSOLETE This program is distributed in the hope that it will be useful,
// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of
// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// OBSOLETE GNU General Public License for more details.
// OBSOLETE
// OBSOLETE You should have received a copy of the GNU General Public License along
// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,
// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
// OBSOLETE
// OBSOLETE */
// OBSOLETE
// OBSOLETE #ifndef FR30_ARCH_H
// OBSOLETE #define FR30_ARCH_H
// OBSOLETE
// OBSOLETE #define TARGET_BIG_ENDIAN 1
// OBSOLETE
// OBSOLETE /* Enum declaration for model types. */
// OBSOLETE typedef enum model_type {
// OBSOLETE MODEL_FR30_1, MODEL_MAX
// OBSOLETE } MODEL_TYPE;
// OBSOLETE
// OBSOLETE #define MAX_MODELS ((int) MODEL_MAX)
// OBSOLETE
// OBSOLETE /* Enum declaration for unit types. */
// OBSOLETE typedef enum unit_type {
// OBSOLETE UNIT_NONE, UNIT_FR30_1_U_STM, UNIT_FR30_1_U_LDM, UNIT_FR30_1_U_STORE
// OBSOLETE , UNIT_FR30_1_U_LOAD, UNIT_FR30_1_U_CTI, UNIT_FR30_1_U_EXEC, UNIT_MAX
// OBSOLETE } UNIT_TYPE;
// OBSOLETE
// OBSOLETE #define MAX_UNITS (3)
// OBSOLETE
// OBSOLETE #endif /* FR30_ARCH_H */

162
sim/fr30/config.in
View file

@ -1,162 +0,0 @@
/* config.in. Generated automatically from configure.in by autoheader. */
/* Define if using alloca.c. */
#undef C_ALLOCA
/* Define to empty if the keyword does not work. */
#undef const
/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
This function is required for alloca.c support on those systems. */
#undef CRAY_STACKSEG_END
/* Define if you have alloca, as a function or macro. */
#undef HAVE_ALLOCA
/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
#undef HAVE_ALLOCA_H
/* Define if you have a working `mmap' system call. */
#undef HAVE_MMAP
/* Define as __inline if that's what the C compiler calls it. */
#undef inline
/* Define to `long' if <sys/types.h> doesn't define. */
#undef off_t
/* Define if you need to in order for stat and other things to work. */
#undef _POSIX_SOURCE
/* Define as the return type of signal handlers (int or void). */
#undef RETSIGTYPE
/* Define to `unsigned' if <sys/types.h> doesn't define. */
#undef size_t
/* If using the C implementation of alloca, define if you know the
direction of stack growth for your system; otherwise it will be
automatically deduced at run-time.
STACK_DIRECTION > 0 => grows toward higher addresses
STACK_DIRECTION < 0 => grows toward lower addresses
STACK_DIRECTION = 0 => direction of growth unknown
*/
#undef STACK_DIRECTION
/* Define if you have the ANSI C header files. */
#undef STDC_HEADERS
/* Define if your processor stores words with the most significant
byte first (like Motorola and SPARC, unlike Intel and VAX). */
#undef WORDS_BIGENDIAN
/* Define to 1 if NLS is requested. */
#undef ENABLE_NLS
/* Define as 1 if you have gettext and don't want to use GNU gettext. */
#undef HAVE_GETTEXT
/* Define as 1 if you have the stpcpy function. */
#undef HAVE_STPCPY
/* Define if your locale.h file contains LC_MESSAGES. */
#undef HAVE_LC_MESSAGES
/* Define if you have the __argz_count function. */
#undef HAVE___ARGZ_COUNT
/* Define if you have the __argz_next function. */
#undef HAVE___ARGZ_NEXT
/* Define if you have the __argz_stringify function. */
#undef HAVE___ARGZ_STRINGIFY
/* Define if you have the __setfpucw function. */
#undef HAVE___SETFPUCW
/* Define if you have the dcgettext function. */
#undef HAVE_DCGETTEXT
/* Define if you have the getcwd function. */
#undef HAVE_GETCWD
/* Define if you have the getpagesize function. */
#undef HAVE_GETPAGESIZE
/* Define if you have the getrusage function. */
#undef HAVE_GETRUSAGE
/* Define if you have the munmap function. */
#undef HAVE_MUNMAP
/* Define if you have the putenv function. */
#undef HAVE_PUTENV
/* Define if you have the setenv function. */
#undef HAVE_SETENV
/* Define if you have the setlocale function. */
#undef HAVE_SETLOCALE
/* Define if you have the sigaction function. */
#undef HAVE_SIGACTION
/* Define if you have the stpcpy function. */
#undef HAVE_STPCPY
/* Define if you have the strcasecmp function. */
#undef HAVE_STRCASECMP
/* Define if you have the strchr function. */
#undef HAVE_STRCHR
/* Define if you have the time function. */
#undef HAVE_TIME
/* Define if you have the <argz.h> header file. */
#undef HAVE_ARGZ_H
/* Define if you have the <fcntl.h> header file. */
#undef HAVE_FCNTL_H
/* Define if you have the <fpu_control.h> header file. */
#undef HAVE_FPU_CONTROL_H
/* Define if you have the <limits.h> header file. */
#undef HAVE_LIMITS_H
/* Define if you have the <locale.h> header file. */
#undef HAVE_LOCALE_H
/* Define if you have the <malloc.h> header file. */
#undef HAVE_MALLOC_H
/* Define if you have the <nl_types.h> header file. */
#undef HAVE_NL_TYPES_H
/* Define if you have the <stdlib.h> header file. */
#undef HAVE_STDLIB_H
/* Define if you have the <string.h> header file. */
#undef HAVE_STRING_H
/* Define if you have the <strings.h> header file. */
#undef HAVE_STRINGS_H
/* Define if you have the <sys/param.h> header file. */
#undef HAVE_SYS_PARAM_H
/* Define if you have the <sys/resource.h> header file. */
#undef HAVE_SYS_RESOURCE_H
/* Define if you have the <sys/time.h> header file. */
#undef HAVE_SYS_TIME_H
/* Define if you have the <time.h> header file. */
#undef HAVE_TIME_H
/* Define if you have the <unistd.h> header file. */
#undef HAVE_UNISTD_H
/* Define if you have the <values.h> header file. */
#undef HAVE_VALUES_H

0
sim/fr30/configure vendored
View file

16
sim/fr30/configure.in
View file

@ -1,16 +0,0 @@
dnl OBSOLETE dnl Process this file with autoconf to produce a configure script.
dnl OBSOLETE sinclude(../common/aclocal.m4)
dnl OBSOLETE AC_PREREQ(2.5)dnl
dnl OBSOLETE AC_INIT(Makefile.in)
dnl OBSOLETE
dnl OBSOLETE SIM_AC_COMMON
dnl OBSOLETE
dnl OBSOLETE SIM_AC_OPTION_ENDIAN(BIG_ENDIAN)
dnl OBSOLETE SIM_AC_OPTION_ALIGNMENT(FORCED_ALIGNMENT)
dnl OBSOLETE SIM_AC_OPTION_HOSTENDIAN
dnl OBSOLETE SIM_AC_OPTION_SCACHE(16384)
dnl OBSOLETE SIM_AC_OPTION_DEFAULT_MODEL(fr30-1)
dnl OBSOLETE SIM_AC_OPTION_ENVIRONMENT
dnl OBSOLETE SIM_AC_OPTION_CGEN_MAINT
dnl OBSOLETE
dnl OBSOLETE SIM_AC_OUTPUT

357
sim/fr30/cpu.c
View file

@ -1,357 +0,0 @@
// OBSOLETE /* Misc. support for CPU family fr30bf.
// OBSOLETE
// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN.
// OBSOLETE
// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
// OBSOLETE
// OBSOLETE This file is part of the GNU simulators.
// OBSOLETE
// OBSOLETE This program is free software; you can redistribute it and/or modify
// OBSOLETE it under the terms of the GNU General Public License as published by
// OBSOLETE the Free Software Foundation; either version 2, or (at your option)
// OBSOLETE any later version.
// OBSOLETE
// OBSOLETE This program is distributed in the hope that it will be useful,
// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of
// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// OBSOLETE GNU General Public License for more details.
// OBSOLETE
// OBSOLETE You should have received a copy of the GNU General Public License along
// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,
// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
// OBSOLETE
// OBSOLETE */
// OBSOLETE
// OBSOLETE #define WANT_CPU fr30bf
// OBSOLETE #define WANT_CPU_FR30BF
// OBSOLETE
// OBSOLETE #include "sim-main.h"
// OBSOLETE #include "cgen-ops.h"
// OBSOLETE
// OBSOLETE /* Get the value of h-pc. */
// OBSOLETE
// OBSOLETE USI
// OBSOLETE fr30bf_h_pc_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_pc);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-pc. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_pc_set (SIM_CPU *current_cpu, USI newval)
// OBSOLETE {
// OBSOLETE CPU (h_pc) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-gr. */
// OBSOLETE
// OBSOLETE SI
// OBSOLETE fr30bf_h_gr_get (SIM_CPU *current_cpu, UINT regno)
// OBSOLETE {
// OBSOLETE return CPU (h_gr[regno]);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-gr. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
// OBSOLETE {
// OBSOLETE CPU (h_gr[regno]) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-cr. */
// OBSOLETE
// OBSOLETE SI
// OBSOLETE fr30bf_h_cr_get (SIM_CPU *current_cpu, UINT regno)
// OBSOLETE {
// OBSOLETE return CPU (h_cr[regno]);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-cr. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_cr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
// OBSOLETE {
// OBSOLETE CPU (h_cr[regno]) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-dr. */
// OBSOLETE
// OBSOLETE SI
// OBSOLETE fr30bf_h_dr_get (SIM_CPU *current_cpu, UINT regno)
// OBSOLETE {
// OBSOLETE return GET_H_DR (regno);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-dr. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_dr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
// OBSOLETE {
// OBSOLETE SET_H_DR (regno, newval);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-ps. */
// OBSOLETE
// OBSOLETE USI
// OBSOLETE fr30bf_h_ps_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return GET_H_PS ();
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-ps. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_ps_set (SIM_CPU *current_cpu, USI newval)
// OBSOLETE {
// OBSOLETE SET_H_PS (newval);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-r13. */
// OBSOLETE
// OBSOLETE SI
// OBSOLETE fr30bf_h_r13_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_r13);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-r13. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_r13_set (SIM_CPU *current_cpu, SI newval)
// OBSOLETE {
// OBSOLETE CPU (h_r13) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-r14. */
// OBSOLETE
// OBSOLETE SI
// OBSOLETE fr30bf_h_r14_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_r14);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-r14. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_r14_set (SIM_CPU *current_cpu, SI newval)
// OBSOLETE {
// OBSOLETE CPU (h_r14) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-r15. */
// OBSOLETE
// OBSOLETE SI
// OBSOLETE fr30bf_h_r15_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_r15);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-r15. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_r15_set (SIM_CPU *current_cpu, SI newval)
// OBSOLETE {
// OBSOLETE CPU (h_r15) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-nbit. */
// OBSOLETE
// OBSOLETE BI
// OBSOLETE fr30bf_h_nbit_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_nbit);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-nbit. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_nbit_set (SIM_CPU *current_cpu, BI newval)
// OBSOLETE {
// OBSOLETE CPU (h_nbit) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-zbit. */
// OBSOLETE
// OBSOLETE BI
// OBSOLETE fr30bf_h_zbit_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_zbit);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-zbit. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_zbit_set (SIM_CPU *current_cpu, BI newval)
// OBSOLETE {
// OBSOLETE CPU (h_zbit) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-vbit. */
// OBSOLETE
// OBSOLETE BI
// OBSOLETE fr30bf_h_vbit_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_vbit);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-vbit. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_vbit_set (SIM_CPU *current_cpu, BI newval)
// OBSOLETE {
// OBSOLETE CPU (h_vbit) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-cbit. */
// OBSOLETE
// OBSOLETE BI
// OBSOLETE fr30bf_h_cbit_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_cbit);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-cbit. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_cbit_set (SIM_CPU *current_cpu, BI newval)
// OBSOLETE {
// OBSOLETE CPU (h_cbit) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-ibit. */
// OBSOLETE
// OBSOLETE BI
// OBSOLETE fr30bf_h_ibit_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_ibit);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-ibit. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_ibit_set (SIM_CPU *current_cpu, BI newval)
// OBSOLETE {
// OBSOLETE CPU (h_ibit) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-sbit. */
// OBSOLETE
// OBSOLETE BI
// OBSOLETE fr30bf_h_sbit_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return GET_H_SBIT ();
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-sbit. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_sbit_set (SIM_CPU *current_cpu, BI newval)
// OBSOLETE {
// OBSOLETE SET_H_SBIT (newval);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-tbit. */
// OBSOLETE
// OBSOLETE BI
// OBSOLETE fr30bf_h_tbit_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_tbit);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-tbit. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_tbit_set (SIM_CPU *current_cpu, BI newval)
// OBSOLETE {
// OBSOLETE CPU (h_tbit) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-d0bit. */
// OBSOLETE
// OBSOLETE BI
// OBSOLETE fr30bf_h_d0bit_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_d0bit);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-d0bit. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_d0bit_set (SIM_CPU *current_cpu, BI newval)
// OBSOLETE {
// OBSOLETE CPU (h_d0bit) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-d1bit. */
// OBSOLETE
// OBSOLETE BI
// OBSOLETE fr30bf_h_d1bit_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_d1bit);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-d1bit. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_d1bit_set (SIM_CPU *current_cpu, BI newval)
// OBSOLETE {
// OBSOLETE CPU (h_d1bit) = newval;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-ccr. */
// OBSOLETE
// OBSOLETE UQI
// OBSOLETE fr30bf_h_ccr_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return GET_H_CCR ();
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-ccr. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_ccr_set (SIM_CPU *current_cpu, UQI newval)
// OBSOLETE {
// OBSOLETE SET_H_CCR (newval);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-scr. */
// OBSOLETE
// OBSOLETE UQI
// OBSOLETE fr30bf_h_scr_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return GET_H_SCR ();
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-scr. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_scr_set (SIM_CPU *current_cpu, UQI newval)
// OBSOLETE {
// OBSOLETE SET_H_SCR (newval);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Get the value of h-ilm. */
// OBSOLETE
// OBSOLETE UQI
// OBSOLETE fr30bf_h_ilm_get (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return GET_H_ILM ();
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Set a value for h-ilm. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_ilm_set (SIM_CPU *current_cpu, UQI newval)
// OBSOLETE {
// OBSOLETE SET_H_ILM (newval);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Record trace results for INSN. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
// OBSOLETE int *indices, TRACE_RECORD *tr)
// OBSOLETE {
// OBSOLETE }

890
sim/fr30/cpu.h
View file

@ -1,890 +0,0 @@
// OBSOLETE /* CPU family header for fr30bf.
// OBSOLETE
// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN.
// OBSOLETE
// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
// OBSOLETE
// OBSOLETE This file is part of the GNU simulators.
// OBSOLETE
// OBSOLETE This program is free software; you can redistribute it and/or modify
// OBSOLETE it under the terms of the GNU General Public License as published by
// OBSOLETE the Free Software Foundation; either version 2, or (at your option)
// OBSOLETE any later version.
// OBSOLETE
// OBSOLETE This program is distributed in the hope that it will be useful,
// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of
// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// OBSOLETE GNU General Public License for more details.
// OBSOLETE
// OBSOLETE You should have received a copy of the GNU General Public License along
// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,
// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
// OBSOLETE
// OBSOLETE */
// OBSOLETE
// OBSOLETE #ifndef CPU_FR30BF_H
// OBSOLETE #define CPU_FR30BF_H
// OBSOLETE
// OBSOLETE /* Maximum number of instructions that are fetched at a time.
// OBSOLETE This is for LIW type instructions sets (e.g. m32r). */
// OBSOLETE #define MAX_LIW_INSNS 1
// OBSOLETE
// OBSOLETE /* Maximum number of instructions that can be executed in parallel. */
// OBSOLETE #define MAX_PARALLEL_INSNS 1
// OBSOLETE
// OBSOLETE /* CPU state information. */
// OBSOLETE typedef struct {
// OBSOLETE /* Hardware elements. */
// OBSOLETE struct {
// OBSOLETE /* program counter */
// OBSOLETE USI h_pc;
// OBSOLETE #define GET_H_PC() CPU (h_pc)
// OBSOLETE #define SET_H_PC(x) (CPU (h_pc) = (x))
// OBSOLETE /* general registers */
// OBSOLETE SI h_gr[16];
// OBSOLETE #define GET_H_GR(a1) CPU (h_gr)[a1]
// OBSOLETE #define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
// OBSOLETE /* coprocessor registers */
// OBSOLETE SI h_cr[16];
// OBSOLETE #define GET_H_CR(a1) CPU (h_cr)[a1]
// OBSOLETE #define SET_H_CR(a1, x) (CPU (h_cr)[a1] = (x))
// OBSOLETE /* dedicated registers */
// OBSOLETE SI h_dr[6];
// OBSOLETE #define GET_H_DR(index) fr30bf_h_dr_get_handler (current_cpu, index)
// OBSOLETE #define SET_H_DR(index, x) \
// OBSOLETE do { \
// OBSOLETE fr30bf_h_dr_set_handler (current_cpu, (index), (x));\
// OBSOLETE ;} while (0)
// OBSOLETE /* processor status */
// OBSOLETE USI h_ps;
// OBSOLETE #define GET_H_PS() fr30bf_h_ps_get_handler (current_cpu)
// OBSOLETE #define SET_H_PS(x) \
// OBSOLETE do { \
// OBSOLETE fr30bf_h_ps_set_handler (current_cpu, (x));\
// OBSOLETE ;} while (0)
// OBSOLETE /* General Register 13 explicitly required */
// OBSOLETE SI h_r13;
// OBSOLETE #define GET_H_R13() CPU (h_r13)
// OBSOLETE #define SET_H_R13(x) (CPU (h_r13) = (x))
// OBSOLETE /* General Register 14 explicitly required */
// OBSOLETE SI h_r14;
// OBSOLETE #define GET_H_R14() CPU (h_r14)
// OBSOLETE #define SET_H_R14(x) (CPU (h_r14) = (x))
// OBSOLETE /* General Register 15 explicitly required */
// OBSOLETE SI h_r15;
// OBSOLETE #define GET_H_R15() CPU (h_r15)
// OBSOLETE #define SET_H_R15(x) (CPU (h_r15) = (x))
// OBSOLETE /* negative bit */
// OBSOLETE BI h_nbit;
// OBSOLETE #define GET_H_NBIT() CPU (h_nbit)
// OBSOLETE #define SET_H_NBIT(x) (CPU (h_nbit) = (x))
// OBSOLETE /* zero bit */
// OBSOLETE BI h_zbit;
// OBSOLETE #define GET_H_ZBIT() CPU (h_zbit)
// OBSOLETE #define SET_H_ZBIT(x) (CPU (h_zbit) = (x))
// OBSOLETE /* overflow bit */
// OBSOLETE BI h_vbit;
// OBSOLETE #define GET_H_VBIT() CPU (h_vbit)
// OBSOLETE #define SET_H_VBIT(x) (CPU (h_vbit) = (x))
// OBSOLETE /* carry bit */
// OBSOLETE BI h_cbit;
// OBSOLETE #define GET_H_CBIT() CPU (h_cbit)
// OBSOLETE #define SET_H_CBIT(x) (CPU (h_cbit) = (x))
// OBSOLETE /* interrupt enable bit */
// OBSOLETE BI h_ibit;
// OBSOLETE #define GET_H_IBIT() CPU (h_ibit)
// OBSOLETE #define SET_H_IBIT(x) (CPU (h_ibit) = (x))
// OBSOLETE /* stack bit */
// OBSOLETE BI h_sbit;
// OBSOLETE #define GET_H_SBIT() fr30bf_h_sbit_get_handler (current_cpu)
// OBSOLETE #define SET_H_SBIT(x) \
// OBSOLETE do { \
// OBSOLETE fr30bf_h_sbit_set_handler (current_cpu, (x));\
// OBSOLETE ;} while (0)
// OBSOLETE /* trace trap bit */
// OBSOLETE BI h_tbit;
// OBSOLETE #define GET_H_TBIT() CPU (h_tbit)
// OBSOLETE #define SET_H_TBIT(x) (CPU (h_tbit) = (x))
// OBSOLETE /* division 0 bit */
// OBSOLETE BI h_d0bit;
// OBSOLETE #define GET_H_D0BIT() CPU (h_d0bit)
// OBSOLETE #define SET_H_D0BIT(x) (CPU (h_d0bit) = (x))
// OBSOLETE /* division 1 bit */
// OBSOLETE BI h_d1bit;
// OBSOLETE #define GET_H_D1BIT() CPU (h_d1bit)
// OBSOLETE #define SET_H_D1BIT(x) (CPU (h_d1bit) = (x))
// OBSOLETE /* condition code bits */
// OBSOLETE UQI h_ccr;
// OBSOLETE #define GET_H_CCR() fr30bf_h_ccr_get_handler (current_cpu)
// OBSOLETE #define SET_H_CCR(x) \
// OBSOLETE do { \
// OBSOLETE fr30bf_h_ccr_set_handler (current_cpu, (x));\
// OBSOLETE ;} while (0)
// OBSOLETE /* system condition bits */
// OBSOLETE UQI h_scr;
// OBSOLETE #define GET_H_SCR() fr30bf_h_scr_get_handler (current_cpu)
// OBSOLETE #define SET_H_SCR(x) \
// OBSOLETE do { \
// OBSOLETE fr30bf_h_scr_set_handler (current_cpu, (x));\
// OBSOLETE ;} while (0)
// OBSOLETE /* interrupt level mask */
// OBSOLETE UQI h_ilm;
// OBSOLETE #define GET_H_ILM() fr30bf_h_ilm_get_handler (current_cpu)
// OBSOLETE #define SET_H_ILM(x) \
// OBSOLETE do { \
// OBSOLETE fr30bf_h_ilm_set_handler (current_cpu, (x));\
// OBSOLETE ;} while (0)
// OBSOLETE } hardware;
// OBSOLETE #define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
// OBSOLETE } FR30BF_CPU_DATA;
// OBSOLETE
// OBSOLETE /* Cover fns for register access. */
// OBSOLETE USI fr30bf_h_pc_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_pc_set (SIM_CPU *, USI);
// OBSOLETE SI fr30bf_h_gr_get (SIM_CPU *, UINT);
// OBSOLETE void fr30bf_h_gr_set (SIM_CPU *, UINT, SI);
// OBSOLETE SI fr30bf_h_cr_get (SIM_CPU *, UINT);
// OBSOLETE void fr30bf_h_cr_set (SIM_CPU *, UINT, SI);
// OBSOLETE SI fr30bf_h_dr_get (SIM_CPU *, UINT);
// OBSOLETE void fr30bf_h_dr_set (SIM_CPU *, UINT, SI);
// OBSOLETE USI fr30bf_h_ps_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_ps_set (SIM_CPU *, USI);
// OBSOLETE SI fr30bf_h_r13_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_r13_set (SIM_CPU *, SI);
// OBSOLETE SI fr30bf_h_r14_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_r14_set (SIM_CPU *, SI);
// OBSOLETE SI fr30bf_h_r15_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_r15_set (SIM_CPU *, SI);
// OBSOLETE BI fr30bf_h_nbit_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_nbit_set (SIM_CPU *, BI);
// OBSOLETE BI fr30bf_h_zbit_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_zbit_set (SIM_CPU *, BI);
// OBSOLETE BI fr30bf_h_vbit_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_vbit_set (SIM_CPU *, BI);
// OBSOLETE BI fr30bf_h_cbit_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_cbit_set (SIM_CPU *, BI);
// OBSOLETE BI fr30bf_h_ibit_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_ibit_set (SIM_CPU *, BI);
// OBSOLETE BI fr30bf_h_sbit_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_sbit_set (SIM_CPU *, BI);
// OBSOLETE BI fr30bf_h_tbit_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_tbit_set (SIM_CPU *, BI);
// OBSOLETE BI fr30bf_h_d0bit_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_d0bit_set (SIM_CPU *, BI);
// OBSOLETE BI fr30bf_h_d1bit_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_d1bit_set (SIM_CPU *, BI);
// OBSOLETE UQI fr30bf_h_ccr_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_ccr_set (SIM_CPU *, UQI);
// OBSOLETE UQI fr30bf_h_scr_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_scr_set (SIM_CPU *, UQI);
// OBSOLETE UQI fr30bf_h_ilm_get (SIM_CPU *);
// OBSOLETE void fr30bf_h_ilm_set (SIM_CPU *, UQI);
// OBSOLETE
// OBSOLETE /* These must be hand-written. */
// OBSOLETE extern CPUREG_FETCH_FN fr30bf_fetch_register;
// OBSOLETE extern CPUREG_STORE_FN fr30bf_store_register;
// OBSOLETE
// OBSOLETE typedef struct {
// OBSOLETE UINT load_regs;
// OBSOLETE UINT load_regs_pending;
// OBSOLETE } MODEL_FR30_1_DATA;
// OBSOLETE
// OBSOLETE /* Instruction argument buffer. */
// OBSOLETE
// OBSOLETE union sem_fields {
// OBSOLETE struct { /* no operands */
// OBSOLETE int empty;
// OBSOLETE } fmt_empty;
// OBSOLETE struct { /* */
// OBSOLETE IADDR i_label9;
// OBSOLETE } sfmt_brad;
// OBSOLETE struct { /* */
// OBSOLETE UINT f_u8;
// OBSOLETE } sfmt_int;
// OBSOLETE struct { /* */
// OBSOLETE IADDR i_label12;
// OBSOLETE } sfmt_call;
// OBSOLETE struct { /* */
// OBSOLETE SI f_s10;
// OBSOLETE unsigned char in_h_gr_SI_15;
// OBSOLETE unsigned char out_h_gr_SI_15;
// OBSOLETE } sfmt_addsp;
// OBSOLETE struct { /* */
// OBSOLETE USI f_dir10;
// OBSOLETE unsigned char in_h_gr_SI_15;
// OBSOLETE unsigned char out_h_gr_SI_15;
// OBSOLETE } sfmt_dmovr15pi;
// OBSOLETE struct { /* */
// OBSOLETE UINT f_dir8;
// OBSOLETE unsigned char in_h_gr_SI_13;
// OBSOLETE unsigned char out_h_gr_SI_13;
// OBSOLETE } sfmt_dmovr13pib;
// OBSOLETE struct { /* */
// OBSOLETE USI f_dir9;
// OBSOLETE unsigned char in_h_gr_SI_13;
// OBSOLETE unsigned char out_h_gr_SI_13;
// OBSOLETE } sfmt_dmovr13pih;
// OBSOLETE struct { /* */
// OBSOLETE USI f_dir10;
// OBSOLETE unsigned char in_h_gr_SI_13;
// OBSOLETE unsigned char out_h_gr_SI_13;
// OBSOLETE } sfmt_dmovr13pi;
// OBSOLETE struct { /* */
// OBSOLETE UINT f_Rs2;
// OBSOLETE unsigned char in_h_gr_SI_15;
// OBSOLETE unsigned char out_h_gr_SI_15;
// OBSOLETE } sfmt_ldr15dr;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE UINT f_Ri;
// OBSOLETE UINT f_Rs1;
// OBSOLETE unsigned char in_Ri;
// OBSOLETE } sfmt_mov2dr;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE UINT f_Ri;
// OBSOLETE UINT f_Rs1;
// OBSOLETE unsigned char out_Ri;
// OBSOLETE } sfmt_movdr;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE UINT f_Ri;
// OBSOLETE UINT f_i32;
// OBSOLETE unsigned char out_Ri;
// OBSOLETE } sfmt_ldi32;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE UINT f_Ri;
// OBSOLETE UINT f_i20;
// OBSOLETE unsigned char out_Ri;
// OBSOLETE } sfmt_ldi20;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE UINT f_Ri;
// OBSOLETE UINT f_i8;
// OBSOLETE unsigned char out_Ri;
// OBSOLETE } sfmt_ldi8;
// OBSOLETE struct { /* */
// OBSOLETE USI f_u10;
// OBSOLETE unsigned char in_h_gr_SI_14;
// OBSOLETE unsigned char in_h_gr_SI_15;
// OBSOLETE unsigned char out_h_gr_SI_14;
// OBSOLETE unsigned char out_h_gr_SI_15;
// OBSOLETE } sfmt_enter;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE UINT f_Ri;
// OBSOLETE unsigned char in_Ri;
// OBSOLETE unsigned char in_h_gr_SI_15;
// OBSOLETE unsigned char out_h_gr_SI_15;
// OBSOLETE } sfmt_str15gr;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE UINT f_Ri;
// OBSOLETE USI f_udisp6;
// OBSOLETE unsigned char in_Ri;
// OBSOLETE unsigned char in_h_gr_SI_15;
// OBSOLETE } sfmt_str15;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE INT f_disp8;
// OBSOLETE UINT f_Ri;
// OBSOLETE unsigned char in_Ri;
// OBSOLETE unsigned char in_h_gr_SI_14;
// OBSOLETE } sfmt_str14b;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE SI f_disp9;
// OBSOLETE UINT f_Ri;
// OBSOLETE unsigned char in_Ri;
// OBSOLETE unsigned char in_h_gr_SI_14;
// OBSOLETE } sfmt_str14h;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE SI f_disp10;
// OBSOLETE UINT f_Ri;
// OBSOLETE unsigned char in_Ri;
// OBSOLETE unsigned char in_h_gr_SI_14;
// OBSOLETE } sfmt_str14;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE UINT f_Ri;
// OBSOLETE unsigned char in_h_gr_SI_15;
// OBSOLETE unsigned char out_Ri;
// OBSOLETE unsigned char out_h_gr_SI_15;
// OBSOLETE } sfmt_ldr15gr;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE UINT f_Ri;
// OBSOLETE USI f_udisp6;
// OBSOLETE unsigned char in_h_gr_SI_15;
// OBSOLETE unsigned char out_Ri;
// OBSOLETE } sfmt_ldr15;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE INT f_disp8;
// OBSOLETE UINT f_Ri;
// OBSOLETE unsigned char in_h_gr_SI_14;
// OBSOLETE unsigned char out_Ri;
// OBSOLETE } sfmt_ldr14ub;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE SI f_disp9;
// OBSOLETE UINT f_Ri;
// OBSOLETE unsigned char in_h_gr_SI_14;
// OBSOLETE unsigned char out_Ri;
// OBSOLETE } sfmt_ldr14uh;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE SI f_disp10;
// OBSOLETE UINT f_Ri;
// OBSOLETE unsigned char in_h_gr_SI_14;
// OBSOLETE unsigned char out_Ri;
// OBSOLETE } sfmt_ldr14;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE SI f_m4;
// OBSOLETE UINT f_Ri;
// OBSOLETE unsigned char in_Ri;
// OBSOLETE unsigned char out_Ri;
// OBSOLETE } sfmt_add2;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE UINT f_Ri;
// OBSOLETE UINT f_u4;
// OBSOLETE unsigned char in_Ri;
// OBSOLETE unsigned char out_Ri;
// OBSOLETE } sfmt_addi;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE SI* i_Rj;
// OBSOLETE UINT f_Ri;
// OBSOLETE UINT f_Rj;
// OBSOLETE unsigned char in_Ri;
// OBSOLETE unsigned char in_Rj;
// OBSOLETE unsigned char in_h_gr_SI_13;
// OBSOLETE } sfmt_str13;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE SI* i_Rj;
// OBSOLETE UINT f_Ri;
// OBSOLETE UINT f_Rj;
// OBSOLETE unsigned char in_Rj;
// OBSOLETE unsigned char in_h_gr_SI_13;
// OBSOLETE unsigned char out_Ri;
// OBSOLETE } sfmt_ldr13;
// OBSOLETE struct { /* */
// OBSOLETE SI* i_Ri;
// OBSOLETE SI* i_Rj;
// OBSOLETE UINT f_Ri;
// OBSOLETE UINT f_Rj;
// OBSOLETE unsigned char in_Ri;
// OBSOLETE unsigned char in_Rj;
// OBSOLETE unsigned char out_Ri;
// OBSOLETE } sfmt_add;
// OBSOLETE struct { /* */
// OBSOLETE UINT f_reglist_hi_st;
// OBSOLETE unsigned char in_h_gr_SI_10;
// OBSOLETE unsigned char in_h_gr_SI_11;
// OBSOLETE unsigned char in_h_gr_SI_12;
// OBSOLETE unsigned char in_h_gr_SI_13;
// OBSOLETE unsigned char in_h_gr_SI_14;
// OBSOLETE unsigned char in_h_gr_SI_15;
// OBSOLETE unsigned char in_h_gr_SI_8;
// OBSOLETE unsigned char in_h_gr_SI_9;
// OBSOLETE unsigned char out_h_gr_SI_15;
// OBSOLETE } sfmt_stm1;
// OBSOLETE struct { /* */
// OBSOLETE UINT f_reglist_hi_ld;
// OBSOLETE unsigned char in_h_gr_SI_15;
// OBSOLETE unsigned char out_h_gr_SI_10;
// OBSOLETE unsigned char out_h_gr_SI_11;
// OBSOLETE unsigned char out_h_gr_SI_12;
// OBSOLETE unsigned char out_h_gr_SI_13;
// OBSOLETE unsigned char out_h_gr_SI_14;
// OBSOLETE unsigned char out_h_gr_SI_15;
// OBSOLETE unsigned char out_h_gr_SI_8;
// OBSOLETE unsigned char out_h_gr_SI_9;
// OBSOLETE } sfmt_ldm1;
// OBSOLETE struct { /* */
// OBSOLETE UINT f_reglist_low_st;
// OBSOLETE unsigned char in_h_gr_SI_0;
// OBSOLETE unsigned char in_h_gr_SI_1;
// OBSOLETE unsigned char in_h_gr_SI_15;
// OBSOLETE unsigned char in_h_gr_SI_2;
// OBSOLETE unsigned char in_h_gr_SI_3;
// OBSOLETE unsigned char in_h_gr_SI_4;
// OBSOLETE unsigned char in_h_gr_SI_5;
// OBSOLETE unsigned char in_h_gr_SI_6;
// OBSOLETE unsigned char in_h_gr_SI_7;
// OBSOLETE unsigned char out_h_gr_SI_15;
// OBSOLETE } sfmt_stm0;
// OBSOLETE struct { /* */
// OBSOLETE UINT f_reglist_low_ld;
// OBSOLETE unsigned char in_h_gr_SI_15;
// OBSOLETE unsigned char out_h_gr_SI_0;
// OBSOLETE unsigned char out_h_gr_SI_1;
// OBSOLETE unsigned char out_h_gr_SI_15;
// OBSOLETE unsigned char out_h_gr_SI_2;
// OBSOLETE unsigned char out_h_gr_SI_3;
// OBSOLETE unsigned char out_h_gr_SI_4;
// OBSOLETE unsigned char out_h_gr_SI_5;
// OBSOLETE unsigned char out_h_gr_SI_6;
// OBSOLETE unsigned char out_h_gr_SI_7;
// OBSOLETE } sfmt_ldm0;
// OBSOLETE #if WITH_SCACHE_PBB
// OBSOLETE /* Writeback handler. */
// OBSOLETE struct {
// OBSOLETE /* Pointer to argbuf entry for insn whose results need writing back. */
// OBSOLETE const struct argbuf *abuf;
// OBSOLETE } write;
// OBSOLETE /* x-before handler */
// OBSOLETE struct {
// OBSOLETE /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
// OBSOLETE int first_p;
// OBSOLETE } before;
// OBSOLETE /* x-after handler */
// OBSOLETE struct {
// OBSOLETE int empty;
// OBSOLETE } after;
// OBSOLETE /* This entry is used to terminate each pbb. */
// OBSOLETE struct {
// OBSOLETE /* Number of insns in pbb. */
// OBSOLETE int insn_count;
// OBSOLETE /* Next pbb to execute. */
// OBSOLETE SCACHE *next;
// OBSOLETE SCACHE *branch_target;
// OBSOLETE } chain;
// OBSOLETE #endif
// OBSOLETE };
// OBSOLETE
// OBSOLETE /* The ARGBUF struct. */
// OBSOLETE struct argbuf {
// OBSOLETE /* These are the baseclass definitions. */
// OBSOLETE IADDR addr;
// OBSOLETE const IDESC *idesc;
// OBSOLETE char trace_p;
// OBSOLETE char profile_p;
// OBSOLETE /* ??? Temporary hack for skip insns. */
// OBSOLETE char skip_count;
// OBSOLETE char unused;
// OBSOLETE /* cpu specific data follows */
// OBSOLETE union sem semantic;
// OBSOLETE int written;
// OBSOLETE union sem_fields fields;
// OBSOLETE };
// OBSOLETE
// OBSOLETE /* A cached insn.
// OBSOLETE
// OBSOLETE ??? SCACHE used to contain more than just argbuf. We could delete the
// OBSOLETE type entirely and always just use ARGBUF, but for future concerns and as
// OBSOLETE a level of abstraction it is left in. */
// OBSOLETE
// OBSOLETE struct scache {
// OBSOLETE struct argbuf argbuf;
// OBSOLETE };
// OBSOLETE
// OBSOLETE /* Macros to simplify extraction, reading and semantic code.
// OBSOLETE These define and assign the local vars that contain the insn's fields. */
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_EMPTY_VARS \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_EMPTY_CODE \
// OBSOLETE length = 0; \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_ADD_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_Rj; \
// OBSOLETE UINT f_Ri; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_ADD_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_ADDI_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_u4; \
// OBSOLETE UINT f_Ri; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_ADDI_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_ADD2_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE SI f_m4; \
// OBSOLETE UINT f_Ri; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_ADD2_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); \
// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_DIV0S_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_op3; \
// OBSOLETE UINT f_Ri; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_DIV0S_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_DIV3_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_op3; \
// OBSOLETE UINT f_op4; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_DIV3_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
// OBSOLETE f_op4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_LDI8_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_i8; \
// OBSOLETE UINT f_Ri; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_LDI8_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_i8 = EXTRACT_MSB0_UINT (insn, 16, 4, 8); \
// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_LDI20_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_i20_4; \
// OBSOLETE UINT f_i20_16; \
// OBSOLETE UINT f_i20; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_Ri; \
// OBSOLETE /* Contents of trailing part of insn. */ \
// OBSOLETE UINT word_1; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_LDI20_CODE \
// OBSOLETE length = 4; \
// OBSOLETE word_1 = GETIMEMUHI (current_cpu, pc + 2); \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_i20_4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
// OBSOLETE f_i20_16 = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 0)); \
// OBSOLETE {\
// OBSOLETE f_i20 = ((((f_i20_4) << (16))) | (f_i20_16));\
// OBSOLETE }\
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_LDI32_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_i32; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_op3; \
// OBSOLETE UINT f_Ri; \
// OBSOLETE /* Contents of trailing part of insn. */ \
// OBSOLETE UINT word_1; \
// OBSOLETE UINT word_2; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_LDI32_CODE \
// OBSOLETE length = 6; \
// OBSOLETE word_1 = GETIMEMUHI (current_cpu, pc + 2); \
// OBSOLETE word_2 = GETIMEMUHI (current_cpu, pc + 4); \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_i32 = (0|(EXTRACT_MSB0_UINT (word_2, 16, 0, 16) << 0)|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 16)); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_LDR14_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE SI f_disp10; \
// OBSOLETE UINT f_Ri; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_LDR14_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_disp10 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (2)); \
// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_LDR14UH_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE SI f_disp9; \
// OBSOLETE UINT f_Ri; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_LDR14UH_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_disp9 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (1)); \
// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_LDR14UB_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE INT f_disp8; \
// OBSOLETE UINT f_Ri; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_LDR14UB_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_disp8 = EXTRACT_MSB0_INT (insn, 16, 4, 8); \
// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_LDR15_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE USI f_udisp6; \
// OBSOLETE UINT f_Ri; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_LDR15_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_udisp6 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) << (2)); \
// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_LDR15DR_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_op3; \
// OBSOLETE UINT f_Rs2; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_LDR15DR_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
// OBSOLETE f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_MOVDR_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_Rs1; \
// OBSOLETE UINT f_Ri; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_MOVDR_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_Rs1 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_CALL_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op5; \
// OBSOLETE SI f_rel12; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_CALL_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op5 = EXTRACT_MSB0_UINT (insn, 16, 4, 1); \
// OBSOLETE f_rel12 = ((((EXTRACT_MSB0_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2)))); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_INT_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_u8; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_INT_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_BRAD_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_cc; \
// OBSOLETE SI f_rel9; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_BRAD_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_cc = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_DMOVR13_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE USI f_dir10; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_DMOVR13_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_DMOVR13H_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE USI f_dir9; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_DMOVR13H_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_DMOVR13B_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_dir8; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_DMOVR13B_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_COPOP_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_ccc; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_op3; \
// OBSOLETE UINT f_CRj; \
// OBSOLETE UINT f_u4c; \
// OBSOLETE UINT f_CRi; \
// OBSOLETE /* Contents of trailing part of insn. */ \
// OBSOLETE UINT word_1; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_COPOP_CODE \
// OBSOLETE length = 4; \
// OBSOLETE word_1 = GETIMEMUHI (current_cpu, pc + 2); \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
// OBSOLETE f_CRj = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \
// OBSOLETE f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 4) << 0)); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_COPLD_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_ccc; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_op3; \
// OBSOLETE UINT f_Rjc; \
// OBSOLETE UINT f_u4c; \
// OBSOLETE UINT f_CRi; \
// OBSOLETE /* Contents of trailing part of insn. */ \
// OBSOLETE UINT word_1; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_COPLD_CODE \
// OBSOLETE length = 4; \
// OBSOLETE word_1 = GETIMEMUHI (current_cpu, pc + 2); \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
// OBSOLETE f_Rjc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \
// OBSOLETE f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 4) << 0)); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_COPST_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_ccc; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_op3; \
// OBSOLETE UINT f_CRj; \
// OBSOLETE UINT f_u4c; \
// OBSOLETE UINT f_Ric; \
// OBSOLETE /* Contents of trailing part of insn. */ \
// OBSOLETE UINT word_1; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_COPST_CODE \
// OBSOLETE length = 4; \
// OBSOLETE word_1 = GETIMEMUHI (current_cpu, pc + 2); \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
// OBSOLETE f_CRj = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \
// OBSOLETE f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
// OBSOLETE f_Ric = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 4) << 0)); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_ADDSP_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE SI f_s10; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_ADDSP_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_s10 = ((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2)); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_LDM0_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_reglist_low_ld; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_LDM0_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_reglist_low_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_LDM1_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_reglist_hi_ld; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_LDM1_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_reglist_hi_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_STM0_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_reglist_low_st; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_STM0_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_reglist_low_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_STM1_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE UINT f_reglist_hi_st; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_STM1_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_reglist_hi_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
// OBSOLETE
// OBSOLETE #define EXTRACT_IFMT_ENTER_VARS \
// OBSOLETE UINT f_op1; \
// OBSOLETE UINT f_op2; \
// OBSOLETE USI f_u10; \
// OBSOLETE unsigned int length;
// OBSOLETE #define EXTRACT_IFMT_ENTER_CODE \
// OBSOLETE length = 2; \
// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
// OBSOLETE f_u10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); \
// OBSOLETE
// OBSOLETE /* Collection of various things for the trace handler to use. */
// OBSOLETE
// OBSOLETE typedef struct trace_record {
// OBSOLETE IADDR pc;
// OBSOLETE /* FIXME:wip */
// OBSOLETE } TRACE_RECORD;
// OBSOLETE
// OBSOLETE #endif /* CPU_FR30BF_H */

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@ -1,66 +0,0 @@
// OBSOLETE /* Simulator CPU header for fr30.
// OBSOLETE
// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN.
// OBSOLETE
// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
// OBSOLETE
// OBSOLETE This file is part of the GNU simulators.
// OBSOLETE
// OBSOLETE This program is free software; you can redistribute it and/or modify
// OBSOLETE it under the terms of the GNU General Public License as published by
// OBSOLETE the Free Software Foundation; either version 2, or (at your option)
// OBSOLETE any later version.
// OBSOLETE
// OBSOLETE This program is distributed in the hope that it will be useful,
// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of
// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// OBSOLETE GNU General Public License for more details.
// OBSOLETE
// OBSOLETE You should have received a copy of the GNU General Public License along
// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,
// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
// OBSOLETE
// OBSOLETE */
// OBSOLETE
// OBSOLETE #ifndef FR30_CPUALL_H
// OBSOLETE #define FR30_CPUALL_H
// OBSOLETE
// OBSOLETE /* Include files for each cpu family. */
// OBSOLETE
// OBSOLETE #ifdef WANT_CPU_FR30BF
// OBSOLETE #include "eng.h"
// OBSOLETE #include "cgen-engine.h"
// OBSOLETE #include "cpu.h"
// OBSOLETE #include "decode.h"
// OBSOLETE #endif
// OBSOLETE
// OBSOLETE extern const MACH fr30_mach;
// OBSOLETE
// OBSOLETE #ifndef WANT_CPU
// OBSOLETE /* The ARGBUF struct. */
// OBSOLETE struct argbuf {
// OBSOLETE /* These are the baseclass definitions. */
// OBSOLETE IADDR addr;
// OBSOLETE const IDESC *idesc;
// OBSOLETE char trace_p;
// OBSOLETE char profile_p;
// OBSOLETE /* ??? Temporary hack for skip insns. */
// OBSOLETE char skip_count;
// OBSOLETE char unused;
// OBSOLETE /* cpu specific data follows */
// OBSOLETE };
// OBSOLETE #endif
// OBSOLETE
// OBSOLETE #ifndef WANT_CPU
// OBSOLETE /* A cached insn.
// OBSOLETE
// OBSOLETE ??? SCACHE used to contain more than just argbuf. We could delete the
// OBSOLETE type entirely and always just use ARGBUF, but for future concerns and as
// OBSOLETE a level of abstraction it is left in. */
// OBSOLETE
// OBSOLETE struct scache {
// OBSOLETE struct argbuf argbuf;
// OBSOLETE };
// OBSOLETE #endif
// OBSOLETE
// OBSOLETE #endif /* FR30_CPUALL_H */

3453
sim/fr30/decode.c
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127
sim/fr30/decode.h
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@ -1,127 +0,0 @@
// OBSOLETE /* Decode header for fr30bf.
// OBSOLETE
// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN.
// OBSOLETE
// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
// OBSOLETE
// OBSOLETE This file is part of the GNU simulators.
// OBSOLETE
// OBSOLETE This program is free software; you can redistribute it and/or modify
// OBSOLETE it under the terms of the GNU General Public License as published by
// OBSOLETE the Free Software Foundation; either version 2, or (at your option)
// OBSOLETE any later version.
// OBSOLETE
// OBSOLETE This program is distributed in the hope that it will be useful,
// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of
// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// OBSOLETE GNU General Public License for more details.
// OBSOLETE
// OBSOLETE You should have received a copy of the GNU General Public License along
// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,
// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
// OBSOLETE
// OBSOLETE */
// OBSOLETE
// OBSOLETE #ifndef FR30BF_DECODE_H
// OBSOLETE #define FR30BF_DECODE_H
// OBSOLETE
// OBSOLETE extern const IDESC *fr30bf_decode (SIM_CPU *, IADDR,
// OBSOLETE CGEN_INSN_INT,
// OBSOLETE ARGBUF *);
// OBSOLETE extern void fr30bf_init_idesc_table (SIM_CPU *);
// OBSOLETE extern void fr30bf_sem_init_idesc_table (SIM_CPU *);
// OBSOLETE extern void fr30bf_semf_init_idesc_table (SIM_CPU *);
// OBSOLETE
// OBSOLETE /* Enum declaration for instructions in cpu family fr30bf. */
// OBSOLETE typedef enum fr30bf_insn_type {
// OBSOLETE FR30BF_INSN_X_INVALID, FR30BF_INSN_X_AFTER, FR30BF_INSN_X_BEFORE, FR30BF_INSN_X_CTI_CHAIN
// OBSOLETE , FR30BF_INSN_X_CHAIN, FR30BF_INSN_X_BEGIN, FR30BF_INSN_ADD, FR30BF_INSN_ADDI
// OBSOLETE , FR30BF_INSN_ADD2, FR30BF_INSN_ADDC, FR30BF_INSN_ADDN, FR30BF_INSN_ADDNI
// OBSOLETE , FR30BF_INSN_ADDN2, FR30BF_INSN_SUB, FR30BF_INSN_SUBC, FR30BF_INSN_SUBN
// OBSOLETE , FR30BF_INSN_CMP, FR30BF_INSN_CMPI, FR30BF_INSN_CMP2, FR30BF_INSN_AND
// OBSOLETE , FR30BF_INSN_OR, FR30BF_INSN_EOR, FR30BF_INSN_ANDM, FR30BF_INSN_ANDH
// OBSOLETE , FR30BF_INSN_ANDB, FR30BF_INSN_ORM, FR30BF_INSN_ORH, FR30BF_INSN_ORB
// OBSOLETE , FR30BF_INSN_EORM, FR30BF_INSN_EORH, FR30BF_INSN_EORB, FR30BF_INSN_BANDL
// OBSOLETE , FR30BF_INSN_BORL, FR30BF_INSN_BEORL, FR30BF_INSN_BANDH, FR30BF_INSN_BORH
// OBSOLETE , FR30BF_INSN_BEORH, FR30BF_INSN_BTSTL, FR30BF_INSN_BTSTH, FR30BF_INSN_MUL
// OBSOLETE , FR30BF_INSN_MULU, FR30BF_INSN_MULH, FR30BF_INSN_MULUH, FR30BF_INSN_DIV0S
// OBSOLETE , FR30BF_INSN_DIV0U, FR30BF_INSN_DIV1, FR30BF_INSN_DIV2, FR30BF_INSN_DIV3
// OBSOLETE , FR30BF_INSN_DIV4S, FR30BF_INSN_LSL, FR30BF_INSN_LSLI, FR30BF_INSN_LSL2
// OBSOLETE , FR30BF_INSN_LSR, FR30BF_INSN_LSRI, FR30BF_INSN_LSR2, FR30BF_INSN_ASR
// OBSOLETE , FR30BF_INSN_ASRI, FR30BF_INSN_ASR2, FR30BF_INSN_LDI8, FR30BF_INSN_LDI20
// OBSOLETE , FR30BF_INSN_LDI32, FR30BF_INSN_LD, FR30BF_INSN_LDUH, FR30BF_INSN_LDUB
// OBSOLETE , FR30BF_INSN_LDR13, FR30BF_INSN_LDR13UH, FR30BF_INSN_LDR13UB, FR30BF_INSN_LDR14
// OBSOLETE , FR30BF_INSN_LDR14UH, FR30BF_INSN_LDR14UB, FR30BF_INSN_LDR15, FR30BF_INSN_LDR15GR
// OBSOLETE , FR30BF_INSN_LDR15DR, FR30BF_INSN_LDR15PS, FR30BF_INSN_ST, FR30BF_INSN_STH
// OBSOLETE , FR30BF_INSN_STB, FR30BF_INSN_STR13, FR30BF_INSN_STR13H, FR30BF_INSN_STR13B
// OBSOLETE , FR30BF_INSN_STR14, FR30BF_INSN_STR14H, FR30BF_INSN_STR14B, FR30BF_INSN_STR15
// OBSOLETE , FR30BF_INSN_STR15GR, FR30BF_INSN_STR15DR, FR30BF_INSN_STR15PS, FR30BF_INSN_MOV
// OBSOLETE , FR30BF_INSN_MOVDR, FR30BF_INSN_MOVPS, FR30BF_INSN_MOV2DR, FR30BF_INSN_MOV2PS
// OBSOLETE , FR30BF_INSN_JMP, FR30BF_INSN_JMPD, FR30BF_INSN_CALLR, FR30BF_INSN_CALLRD
// OBSOLETE , FR30BF_INSN_CALL, FR30BF_INSN_CALLD, FR30BF_INSN_RET, FR30BF_INSN_RET_D
// OBSOLETE , FR30BF_INSN_INT, FR30BF_INSN_INTE, FR30BF_INSN_RETI, FR30BF_INSN_BRAD
// OBSOLETE , FR30BF_INSN_BRA, FR30BF_INSN_BNOD, FR30BF_INSN_BNO, FR30BF_INSN_BEQD
// OBSOLETE , FR30BF_INSN_BEQ, FR30BF_INSN_BNED, FR30BF_INSN_BNE, FR30BF_INSN_BCD
// OBSOLETE , FR30BF_INSN_BC, FR30BF_INSN_BNCD, FR30BF_INSN_BNC, FR30BF_INSN_BND
// OBSOLETE , FR30BF_INSN_BN, FR30BF_INSN_BPD, FR30BF_INSN_BP, FR30BF_INSN_BVD
// OBSOLETE , FR30BF_INSN_BV, FR30BF_INSN_BNVD, FR30BF_INSN_BNV, FR30BF_INSN_BLTD
// OBSOLETE , FR30BF_INSN_BLT, FR30BF_INSN_BGED, FR30BF_INSN_BGE, FR30BF_INSN_BLED
// OBSOLETE , FR30BF_INSN_BLE, FR30BF_INSN_BGTD, FR30BF_INSN_BGT, FR30BF_INSN_BLSD
// OBSOLETE , FR30BF_INSN_BLS, FR30BF_INSN_BHID, FR30BF_INSN_BHI, FR30BF_INSN_DMOVR13
// OBSOLETE , FR30BF_INSN_DMOVR13H, FR30BF_INSN_DMOVR13B, FR30BF_INSN_DMOVR13PI, FR30BF_INSN_DMOVR13PIH
// OBSOLETE , FR30BF_INSN_DMOVR13PIB, FR30BF_INSN_DMOVR15PI, FR30BF_INSN_DMOV2R13, FR30BF_INSN_DMOV2R13H
// OBSOLETE , FR30BF_INSN_DMOV2R13B, FR30BF_INSN_DMOV2R13PI, FR30BF_INSN_DMOV2R13PIH, FR30BF_INSN_DMOV2R13PIB
// OBSOLETE , FR30BF_INSN_DMOV2R15PD, FR30BF_INSN_LDRES, FR30BF_INSN_STRES, FR30BF_INSN_COPOP
// OBSOLETE , FR30BF_INSN_COPLD, FR30BF_INSN_COPST, FR30BF_INSN_COPSV, FR30BF_INSN_NOP
// OBSOLETE , FR30BF_INSN_ANDCCR, FR30BF_INSN_ORCCR, FR30BF_INSN_STILM, FR30BF_INSN_ADDSP
// OBSOLETE , FR30BF_INSN_EXTSB, FR30BF_INSN_EXTUB, FR30BF_INSN_EXTSH, FR30BF_INSN_EXTUH
// OBSOLETE , FR30BF_INSN_LDM0, FR30BF_INSN_LDM1, FR30BF_INSN_STM0, FR30BF_INSN_STM1
// OBSOLETE , FR30BF_INSN_ENTER, FR30BF_INSN_LEAVE, FR30BF_INSN_XCHB, FR30BF_INSN_MAX
// OBSOLETE } FR30BF_INSN_TYPE;
// OBSOLETE
// OBSOLETE /* Enum declaration for semantic formats in cpu family fr30bf. */
// OBSOLETE typedef enum fr30bf_sfmt_type {
// OBSOLETE FR30BF_SFMT_EMPTY, FR30BF_SFMT_ADD, FR30BF_SFMT_ADDI, FR30BF_SFMT_ADD2
// OBSOLETE , FR30BF_SFMT_ADDC, FR30BF_SFMT_ADDN, FR30BF_SFMT_ADDNI, FR30BF_SFMT_ADDN2
// OBSOLETE , FR30BF_SFMT_CMP, FR30BF_SFMT_CMPI, FR30BF_SFMT_CMP2, FR30BF_SFMT_AND
// OBSOLETE , FR30BF_SFMT_ANDM, FR30BF_SFMT_ANDH, FR30BF_SFMT_ANDB, FR30BF_SFMT_BANDL
// OBSOLETE , FR30BF_SFMT_BTSTL, FR30BF_SFMT_MUL, FR30BF_SFMT_MULU, FR30BF_SFMT_MULH
// OBSOLETE , FR30BF_SFMT_DIV0S, FR30BF_SFMT_DIV0U, FR30BF_SFMT_DIV1, FR30BF_SFMT_DIV2
// OBSOLETE , FR30BF_SFMT_DIV3, FR30BF_SFMT_DIV4S, FR30BF_SFMT_LSL, FR30BF_SFMT_LSLI
// OBSOLETE , FR30BF_SFMT_LDI8, FR30BF_SFMT_LDI20, FR30BF_SFMT_LDI32, FR30BF_SFMT_LD
// OBSOLETE , FR30BF_SFMT_LDUH, FR30BF_SFMT_LDUB, FR30BF_SFMT_LDR13, FR30BF_SFMT_LDR13UH
// OBSOLETE , FR30BF_SFMT_LDR13UB, FR30BF_SFMT_LDR14, FR30BF_SFMT_LDR14UH, FR30BF_SFMT_LDR14UB
// OBSOLETE , FR30BF_SFMT_LDR15, FR30BF_SFMT_LDR15GR, FR30BF_SFMT_LDR15DR, FR30BF_SFMT_LDR15PS
// OBSOLETE , FR30BF_SFMT_ST, FR30BF_SFMT_STH, FR30BF_SFMT_STB, FR30BF_SFMT_STR13
// OBSOLETE , FR30BF_SFMT_STR13H, FR30BF_SFMT_STR13B, FR30BF_SFMT_STR14, FR30BF_SFMT_STR14H
// OBSOLETE , FR30BF_SFMT_STR14B, FR30BF_SFMT_STR15, FR30BF_SFMT_STR15GR, FR30BF_SFMT_STR15DR
// OBSOLETE , FR30BF_SFMT_STR15PS, FR30BF_SFMT_MOV, FR30BF_SFMT_MOVDR, FR30BF_SFMT_MOVPS
// OBSOLETE , FR30BF_SFMT_MOV2DR, FR30BF_SFMT_MOV2PS, FR30BF_SFMT_JMP, FR30BF_SFMT_CALLR
// OBSOLETE , FR30BF_SFMT_CALL, FR30BF_SFMT_RET, FR30BF_SFMT_INT, FR30BF_SFMT_INTE
// OBSOLETE , FR30BF_SFMT_RETI, FR30BF_SFMT_BRAD, FR30BF_SFMT_BNOD, FR30BF_SFMT_BEQD
// OBSOLETE , FR30BF_SFMT_BCD, FR30BF_SFMT_BND, FR30BF_SFMT_BVD, FR30BF_SFMT_BLTD
// OBSOLETE , FR30BF_SFMT_BLED, FR30BF_SFMT_BLSD, FR30BF_SFMT_DMOVR13, FR30BF_SFMT_DMOVR13H
// OBSOLETE , FR30BF_SFMT_DMOVR13B, FR30BF_SFMT_DMOVR13PI, FR30BF_SFMT_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIB
// OBSOLETE , FR30BF_SFMT_DMOVR15PI, FR30BF_SFMT_DMOV2R13, FR30BF_SFMT_DMOV2R13H, FR30BF_SFMT_DMOV2R13B
// OBSOLETE , FR30BF_SFMT_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIB, FR30BF_SFMT_DMOV2R15PD
// OBSOLETE , FR30BF_SFMT_LDRES, FR30BF_SFMT_COPOP, FR30BF_SFMT_ANDCCR, FR30BF_SFMT_STILM
// OBSOLETE , FR30BF_SFMT_ADDSP, FR30BF_SFMT_EXTSB, FR30BF_SFMT_EXTUB, FR30BF_SFMT_EXTSH
// OBSOLETE , FR30BF_SFMT_EXTUH, FR30BF_SFMT_LDM0, FR30BF_SFMT_LDM1, FR30BF_SFMT_STM0
// OBSOLETE , FR30BF_SFMT_STM1, FR30BF_SFMT_ENTER, FR30BF_SFMT_LEAVE, FR30BF_SFMT_XCHB
// OBSOLETE } FR30BF_SFMT_TYPE;
// OBSOLETE
// OBSOLETE /* Function unit handlers (user written). */
// OBSOLETE
// OBSOLETE extern int fr30bf_model_fr30_1_u_stm (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*reglist*/);
// OBSOLETE extern int fr30bf_model_fr30_1_u_ldm (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*reglist*/);
// OBSOLETE extern int fr30bf_model_fr30_1_u_store (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/, INT /*Rj*/);
// OBSOLETE extern int fr30bf_model_fr30_1_u_load (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rj*/, INT /*Ri*/);
// OBSOLETE extern int fr30bf_model_fr30_1_u_cti (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/);
// OBSOLETE extern int fr30bf_model_fr30_1_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/, INT /*Rj*/, INT /*Ri*/);
// OBSOLETE
// OBSOLETE /* Profiling before/after handlers (user written) */
// OBSOLETE
// OBSOLETE extern void fr30bf_model_insn_before (SIM_CPU *, int /*first_p*/);
// OBSOLETE extern void fr30bf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/);
// OBSOLETE
// OBSOLETE #endif /* FR30BF_DECODE_H */

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sim/fr30/devices.c
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// OBSOLETE /* fr30 device support
// OBSOLETE Copyright (C) 1998, 1999 Free Software Foundation, Inc.
// OBSOLETE Contributed by Cygnus Solutions.
// OBSOLETE
// OBSOLETE This file is part of the GNU simulators.
// OBSOLETE
// OBSOLETE This program is free software; you can redistribute it and/or modify
// OBSOLETE it under the terms of the GNU General Public License as published by
// OBSOLETE the Free Software Foundation; either version 2, or (at your option)
// OBSOLETE any later version.
// OBSOLETE
// OBSOLETE This program is distributed in the hope that it will be useful,
// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of
// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// OBSOLETE GNU General Public License for more details.
// OBSOLETE
// OBSOLETE You should have received a copy of the GNU General Public License along
// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,
// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
// OBSOLETE
// OBSOLETE /* ??? All of this is just to get something going. wip! */
// OBSOLETE
// OBSOLETE #include "sim-main.h"
// OBSOLETE
// OBSOLETE #ifdef HAVE_DV_SOCKSER
// OBSOLETE #include "dv-sockser.h"
// OBSOLETE #endif
// OBSOLETE
// OBSOLETE device fr30_devices;
// OBSOLETE
// OBSOLETE int
// OBSOLETE device_io_read_buffer (device *me, void *source, int space,
// OBSOLETE address_word addr, unsigned nr_bytes,
// OBSOLETE SIM_DESC sd, SIM_CPU *cpu, sim_cia cia)
// OBSOLETE {
// OBSOLETE if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT)
// OBSOLETE return nr_bytes;
// OBSOLETE
// OBSOLETE #ifdef HAVE_DV_SOCKSER
// OBSOLETE if (addr == UART_INCHAR_ADDR)
// OBSOLETE {
// OBSOLETE int c = dv_sockser_read (sd);
// OBSOLETE if (c == -1)
// OBSOLETE return 0;
// OBSOLETE *(char *) source = c;
// OBSOLETE return 1;
// OBSOLETE }
// OBSOLETE if (addr == UART_STATUS_ADDR)
// OBSOLETE {
// OBSOLETE int status = dv_sockser_status (sd);
// OBSOLETE unsigned char *p = source;
// OBSOLETE p[0] = 0;
// OBSOLETE p[1] = (((status & DV_SOCKSER_INPUT_EMPTY)
// OBSOLETE #ifdef UART_INPUT_READY0
// OBSOLETE ? UART_INPUT_READY : 0)
// OBSOLETE #else
// OBSOLETE ? 0 : UART_INPUT_READY)
// OBSOLETE #endif
// OBSOLETE + ((status & DV_SOCKSER_OUTPUT_EMPTY) ? UART_OUTPUT_READY : 0));
// OBSOLETE return 2;
// OBSOLETE }
// OBSOLETE #endif
// OBSOLETE
// OBSOLETE return nr_bytes;
// OBSOLETE }
// OBSOLETE
// OBSOLETE int
// OBSOLETE device_io_write_buffer (device *me, const void *source, int space,
// OBSOLETE address_word addr, unsigned nr_bytes,
// OBSOLETE SIM_DESC sd, SIM_CPU *cpu, sim_cia cia)
// OBSOLETE {
// OBSOLETE #if WITH_SCACHE
// OBSOLETE if (addr == MCCR_ADDR)
// OBSOLETE {
// OBSOLETE if ((*(const char *) source & MCCR_CP) != 0)
// OBSOLETE scache_flush (sd);
// OBSOLETE return nr_bytes;
// OBSOLETE }
// OBSOLETE #endif
// OBSOLETE
// OBSOLETE if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT)
// OBSOLETE return nr_bytes;
// OBSOLETE
// OBSOLETE #if HAVE_DV_SOCKSER
// OBSOLETE if (addr == UART_OUTCHAR_ADDR)
// OBSOLETE {
// OBSOLETE int rc = dv_sockser_write (sd, *(char *) source);
// OBSOLETE return rc == 1;
// OBSOLETE }
// OBSOLETE #endif
// OBSOLETE
// OBSOLETE return nr_bytes;
// OBSOLETE }
// OBSOLETE
// OBSOLETE void
// OBSOLETE device_error (device *me, char *message, ...)
// OBSOLETE {
// OBSOLETE }

96
sim/fr30/fr30-sim.h
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@ -1,96 +0,0 @@
// OBSOLETE /* collection of junk waiting time to sort out
// OBSOLETE Copyright (C) 1998, 1999 Free Software Foundation, Inc.
// OBSOLETE Contributed by Cygnus Solutions.
// OBSOLETE
// OBSOLETE This file is part of the GNU Simulators.
// OBSOLETE
// OBSOLETE This program is free software; you can redistribute it and/or modify
// OBSOLETE it under the terms of the GNU General Public License as published by
// OBSOLETE the Free Software Foundation; either version 2, or (at your option)
// OBSOLETE any later version.
// OBSOLETE
// OBSOLETE This program is distributed in the hope that it will be useful,
// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of
// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// OBSOLETE GNU General Public License for more details.
// OBSOLETE
// OBSOLETE You should have received a copy of the GNU General Public License along
// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,
// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
// OBSOLETE
// OBSOLETE #ifndef FR30_SIM_H
// OBSOLETE #define FR30_SIM_H
// OBSOLETE
// OBSOLETE /* gdb register numbers */
// OBSOLETE #define PC_REGNUM 16
// OBSOLETE #define PS_REGNUM 17
// OBSOLETE #define TBR_REGNUM 18
// OBSOLETE #define RP_REGNUM 19
// OBSOLETE #define SSP_REGNUM 20
// OBSOLETE #define USP_REGNUM 21
// OBSOLETE #define MDH_REGNUM 22
// OBSOLETE #define MDL_REGNUM 23
// OBSOLETE
// OBSOLETE extern BI fr30bf_h_sbit_get_handler (SIM_CPU *);
// OBSOLETE extern void fr30bf_h_sbit_set_handler (SIM_CPU *, BI);
// OBSOLETE
// OBSOLETE extern UQI fr30bf_h_ccr_get_handler (SIM_CPU *);
// OBSOLETE extern void fr30bf_h_ccr_set_handler (SIM_CPU *, UQI);
// OBSOLETE
// OBSOLETE extern UQI fr30bf_h_scr_get_handler (SIM_CPU *);
// OBSOLETE extern void fr30bf_h_scr_set_handler (SIM_CPU *, UQI);
// OBSOLETE
// OBSOLETE extern UQI fr30bf_h_ilm_get_handler (SIM_CPU *);
// OBSOLETE extern void fr30bf_h_ilm_set_handler (SIM_CPU *, UQI);
// OBSOLETE
// OBSOLETE extern USI fr30bf_h_ps_get_handler (SIM_CPU *);
// OBSOLETE extern void fr30bf_h_ps_set_handler (SIM_CPU *, USI);
// OBSOLETE
// OBSOLETE extern SI fr30bf_h_dr_get_handler (SIM_CPU *, UINT);
// OBSOLETE extern void fr30bf_h_dr_set_handler (SIM_CPU *, UINT, SI);
// OBSOLETE
// OBSOLETE #define GETTWI GETTSI
// OBSOLETE #define SETTWI SETTSI
// OBSOLETE
// OBSOLETE /* Hardware/device support.
// OBSOLETE ??? Will eventually want to move device stuff to config files. */
// OBSOLETE
// OBSOLETE /* Special purpose traps. */
// OBSOLETE #define TRAP_SYSCALL 10
// OBSOLETE #define TRAP_BREAKPOINT 9
// OBSOLETE
// OBSOLETE /* Support for the MCCR register (Cache Control Register) is needed in order
// OBSOLETE for overlays to work correctly with the scache: cached instructions need
// OBSOLETE to be flushed when the instruction space is changed at runtime. */
// OBSOLETE
// OBSOLETE /* Cache Control Register */
// OBSOLETE #define MCCR_ADDR 0xffffffff
// OBSOLETE #define MCCR_CP 0x80
// OBSOLETE /* not supported */
// OBSOLETE #define MCCR_CM0 2
// OBSOLETE #define MCCR_CM1 1
// OBSOLETE
// OBSOLETE /* Serial device addresses. */
// OBSOLETE /* These are the values for the MSA2000 board.
// OBSOLETE ??? Will eventually need to move this to a config file. */
// OBSOLETE #define UART_INCHAR_ADDR 0xff004009
// OBSOLETE #define UART_OUTCHAR_ADDR 0xff004007
// OBSOLETE #define UART_STATUS_ADDR 0xff004002
// OBSOLETE
// OBSOLETE #define UART_INPUT_READY 0x4
// OBSOLETE #define UART_OUTPUT_READY 0x1
// OBSOLETE
// OBSOLETE /* Start address and length of all device support. */
// OBSOLETE #define FR30_DEVICE_ADDR 0xff000000
// OBSOLETE #define FR30_DEVICE_LEN 0x00ffffff
// OBSOLETE
// OBSOLETE /* sim_core_attach device argument. */
// OBSOLETE extern device fr30_devices;
// OBSOLETE
// OBSOLETE /* FIXME: Temporary, until device support ready. */
// OBSOLETE struct _device { int foo; };
// OBSOLETE
// OBSOLETE /* Handle the trap insn. */
// OBSOLETE USI fr30_int (SIM_CPU *, PCADDR, int);
// OBSOLETE
// OBSOLETE #endif /* FR30_SIM_H */

423
sim/fr30/fr30.c
View file

@ -1,423 +0,0 @@
// OBSOLETE /* fr30 simulator support code
// OBSOLETE Copyright (C) 1998, 1999 Free Software Foundation, Inc.
// OBSOLETE Contributed by Cygnus Solutions.
// OBSOLETE
// OBSOLETE This file is part of the GNU simulators.
// OBSOLETE
// OBSOLETE This program is free software; you can redistribute it and/or modify
// OBSOLETE it under the terms of the GNU General Public License as published by
// OBSOLETE the Free Software Foundation; either version 2, or (at your option)
// OBSOLETE any later version.
// OBSOLETE
// OBSOLETE This program is distributed in the hope that it will be useful,
// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of
// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// OBSOLETE GNU General Public License for more details.
// OBSOLETE
// OBSOLETE You should have received a copy of the GNU General Public License along
// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,
// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
// OBSOLETE
// OBSOLETE #define WANT_CPU
// OBSOLETE #define WANT_CPU_FR30BF
// OBSOLETE
// OBSOLETE #include "sim-main.h"
// OBSOLETE #include "cgen-mem.h"
// OBSOLETE #include "cgen-ops.h"
// OBSOLETE
// OBSOLETE /* Convert gdb dedicated register number to actual dr reg number. */
// OBSOLETE
// OBSOLETE static int
// OBSOLETE decode_gdb_dr_regnum (int gdb_regnum)
// OBSOLETE {
// OBSOLETE switch (gdb_regnum)
// OBSOLETE {
// OBSOLETE case TBR_REGNUM : return H_DR_TBR;
// OBSOLETE case RP_REGNUM : return H_DR_RP;
// OBSOLETE case SSP_REGNUM : return H_DR_SSP;
// OBSOLETE case USP_REGNUM : return H_DR_USP;
// OBSOLETE case MDH_REGNUM : return H_DR_MDH;
// OBSOLETE case MDL_REGNUM : return H_DR_MDL;
// OBSOLETE }
// OBSOLETE abort ();
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* The contents of BUF are in target byte order. */
// OBSOLETE
// OBSOLETE int
// OBSOLETE fr30bf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len)
// OBSOLETE {
// OBSOLETE if (rn < 16)
// OBSOLETE SETTWI (buf, fr30bf_h_gr_get (current_cpu, rn));
// OBSOLETE else
// OBSOLETE switch (rn)
// OBSOLETE {
// OBSOLETE case PC_REGNUM :
// OBSOLETE SETTWI (buf, fr30bf_h_pc_get (current_cpu));
// OBSOLETE break;
// OBSOLETE case PS_REGNUM :
// OBSOLETE SETTWI (buf, fr30bf_h_ps_get (current_cpu));
// OBSOLETE break;
// OBSOLETE case TBR_REGNUM :
// OBSOLETE case RP_REGNUM :
// OBSOLETE case SSP_REGNUM :
// OBSOLETE case USP_REGNUM :
// OBSOLETE case MDH_REGNUM :
// OBSOLETE case MDL_REGNUM :
// OBSOLETE SETTWI (buf, fr30bf_h_dr_get (current_cpu,
// OBSOLETE decode_gdb_dr_regnum (rn)));
// OBSOLETE break;
// OBSOLETE default :
// OBSOLETE return 0;
// OBSOLETE }
// OBSOLETE
// OBSOLETE return -1; /*FIXME*/
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* The contents of BUF are in target byte order. */
// OBSOLETE
// OBSOLETE int
// OBSOLETE fr30bf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len)
// OBSOLETE {
// OBSOLETE if (rn < 16)
// OBSOLETE fr30bf_h_gr_set (current_cpu, rn, GETTWI (buf));
// OBSOLETE else
// OBSOLETE switch (rn)
// OBSOLETE {
// OBSOLETE case PC_REGNUM :
// OBSOLETE fr30bf_h_pc_set (current_cpu, GETTWI (buf));
// OBSOLETE break;
// OBSOLETE case PS_REGNUM :
// OBSOLETE fr30bf_h_ps_set (current_cpu, GETTWI (buf));
// OBSOLETE break;
// OBSOLETE case TBR_REGNUM :
// OBSOLETE case RP_REGNUM :
// OBSOLETE case SSP_REGNUM :
// OBSOLETE case USP_REGNUM :
// OBSOLETE case MDH_REGNUM :
// OBSOLETE case MDL_REGNUM :
// OBSOLETE fr30bf_h_dr_set (current_cpu,
// OBSOLETE decode_gdb_dr_regnum (rn),
// OBSOLETE GETTWI (buf));
// OBSOLETE break;
// OBSOLETE default :
// OBSOLETE return 0;
// OBSOLETE }
// OBSOLETE
// OBSOLETE return -1; /*FIXME*/
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Cover fns to access the ccr bits. */
// OBSOLETE
// OBSOLETE BI
// OBSOLETE fr30bf_h_sbit_get_handler (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_sbit);
// OBSOLETE }
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_sbit_set_handler (SIM_CPU *current_cpu, BI newval)
// OBSOLETE {
// OBSOLETE int old_sbit = CPU (h_sbit);
// OBSOLETE int new_sbit = (newval != 0);
// OBSOLETE
// OBSOLETE CPU (h_sbit) = new_sbit;
// OBSOLETE
// OBSOLETE /* When switching stack modes, update the registers. */
// OBSOLETE if (old_sbit != new_sbit)
// OBSOLETE {
// OBSOLETE if (old_sbit)
// OBSOLETE {
// OBSOLETE /* Switching user -> system. */
// OBSOLETE CPU (h_dr[H_DR_USP]) = CPU (h_gr[H_GR_SP]);
// OBSOLETE CPU (h_gr[H_GR_SP]) = CPU (h_dr[H_DR_SSP]);
// OBSOLETE }
// OBSOLETE else
// OBSOLETE {
// OBSOLETE /* Switching system -> user. */
// OBSOLETE CPU (h_dr[H_DR_SSP]) = CPU (h_gr[H_GR_SP]);
// OBSOLETE CPU (h_gr[H_GR_SP]) = CPU (h_dr[H_DR_USP]);
// OBSOLETE }
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* TODO: r15 interlock */
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Cover fns to access the ccr bits. */
// OBSOLETE
// OBSOLETE UQI
// OBSOLETE fr30bf_h_ccr_get_handler (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE int ccr = ( (GET_H_CBIT () << 0)
// OBSOLETE | (GET_H_VBIT () << 1)
// OBSOLETE | (GET_H_ZBIT () << 2)
// OBSOLETE | (GET_H_NBIT () << 3)
// OBSOLETE | (GET_H_IBIT () << 4)
// OBSOLETE | (GET_H_SBIT () << 5));
// OBSOLETE
// OBSOLETE return ccr;
// OBSOLETE }
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_ccr_set_handler (SIM_CPU *current_cpu, UQI newval)
// OBSOLETE {
// OBSOLETE int ccr = newval & 0x3f;
// OBSOLETE
// OBSOLETE SET_H_CBIT ((ccr & 1) != 0);
// OBSOLETE SET_H_VBIT ((ccr & 2) != 0);
// OBSOLETE SET_H_ZBIT ((ccr & 4) != 0);
// OBSOLETE SET_H_NBIT ((ccr & 8) != 0);
// OBSOLETE SET_H_IBIT ((ccr & 0x10) != 0);
// OBSOLETE SET_H_SBIT ((ccr & 0x20) != 0);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Cover fns to access the scr bits. */
// OBSOLETE
// OBSOLETE UQI
// OBSOLETE fr30bf_h_scr_get_handler (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE int scr = ( (GET_H_TBIT () << 0)
// OBSOLETE | (GET_H_D0BIT () << 1)
// OBSOLETE | (GET_H_D1BIT () << 2));
// OBSOLETE return scr;
// OBSOLETE }
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_scr_set_handler (SIM_CPU *current_cpu, UQI newval)
// OBSOLETE {
// OBSOLETE int scr = newval & 7;
// OBSOLETE
// OBSOLETE SET_H_TBIT ((scr & 1) != 0);
// OBSOLETE SET_H_D0BIT ((scr & 2) != 0);
// OBSOLETE SET_H_D1BIT ((scr & 4) != 0);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Cover fns to access the ilm bits. */
// OBSOLETE
// OBSOLETE UQI
// OBSOLETE fr30bf_h_ilm_get_handler (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE return CPU (h_ilm);
// OBSOLETE }
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_ilm_set_handler (SIM_CPU *current_cpu, UQI newval)
// OBSOLETE {
// OBSOLETE int ilm = newval & 0x1f;
// OBSOLETE int current_ilm = CPU (h_ilm);
// OBSOLETE
// OBSOLETE /* We can only set new ilm values < 16 if the current ilm is < 16. Otherwise
// OBSOLETE we add 16 to the value we are given. */
// OBSOLETE if (current_ilm >= 16 && ilm < 16)
// OBSOLETE ilm += 16;
// OBSOLETE
// OBSOLETE CPU (h_ilm) = ilm;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Cover fns to access the ps register. */
// OBSOLETE
// OBSOLETE USI
// OBSOLETE fr30bf_h_ps_get_handler (SIM_CPU *current_cpu)
// OBSOLETE {
// OBSOLETE int ccr = GET_H_CCR ();
// OBSOLETE int scr = GET_H_SCR ();
// OBSOLETE int ilm = GET_H_ILM ();
// OBSOLETE
// OBSOLETE return ccr | (scr << 8) | (ilm << 16);
// OBSOLETE }
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_ps_set_handler (SIM_CPU *current_cpu, USI newval)
// OBSOLETE {
// OBSOLETE int ccr = newval & 0xff;
// OBSOLETE int scr = (newval >> 8) & 7;
// OBSOLETE int ilm = (newval >> 16) & 0x1f;
// OBSOLETE
// OBSOLETE SET_H_CCR (ccr);
// OBSOLETE SET_H_SCR (scr);
// OBSOLETE SET_H_ILM (ilm);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Cover fns to access the dedicated registers. */
// OBSOLETE
// OBSOLETE SI
// OBSOLETE fr30bf_h_dr_get_handler (SIM_CPU *current_cpu, UINT dr)
// OBSOLETE {
// OBSOLETE switch (dr)
// OBSOLETE {
// OBSOLETE case H_DR_SSP :
// OBSOLETE if (! GET_H_SBIT ())
// OBSOLETE return GET_H_GR (H_GR_SP);
// OBSOLETE else
// OBSOLETE return CPU (h_dr[H_DR_SSP]);
// OBSOLETE case H_DR_USP :
// OBSOLETE if (GET_H_SBIT ())
// OBSOLETE return GET_H_GR (H_GR_SP);
// OBSOLETE else
// OBSOLETE return CPU (h_dr[H_DR_USP]);
// OBSOLETE case H_DR_TBR :
// OBSOLETE case H_DR_RP :
// OBSOLETE case H_DR_MDH :
// OBSOLETE case H_DR_MDL :
// OBSOLETE return CPU (h_dr[dr]);
// OBSOLETE }
// OBSOLETE return 0;
// OBSOLETE }
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_h_dr_set_handler (SIM_CPU *current_cpu, UINT dr, SI newval)
// OBSOLETE {
// OBSOLETE switch (dr)
// OBSOLETE {
// OBSOLETE case H_DR_SSP :
// OBSOLETE if (! GET_H_SBIT ())
// OBSOLETE SET_H_GR (H_GR_SP, newval);
// OBSOLETE else
// OBSOLETE CPU (h_dr[H_DR_SSP]) = newval;
// OBSOLETE break;
// OBSOLETE case H_DR_USP :
// OBSOLETE if (GET_H_SBIT ())
// OBSOLETE SET_H_GR (H_GR_SP, newval);
// OBSOLETE else
// OBSOLETE CPU (h_dr[H_DR_USP]) = newval;
// OBSOLETE break;
// OBSOLETE case H_DR_TBR :
// OBSOLETE case H_DR_RP :
// OBSOLETE case H_DR_MDH :
// OBSOLETE case H_DR_MDL :
// OBSOLETE CPU (h_dr[dr]) = newval;
// OBSOLETE break;
// OBSOLETE }
// OBSOLETE }
// OBSOLETE
// OBSOLETE #if WITH_PROFILE_MODEL_P
// OBSOLETE
// OBSOLETE /* FIXME: Some of these should be inline or macros. Later. */
// OBSOLETE
// OBSOLETE /* Initialize cycle counting for an insn.
// OBSOLETE FIRST_P is non-zero if this is the first insn in a set of parallel
// OBSOLETE insns. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_model_insn_before (SIM_CPU *cpu, int first_p)
// OBSOLETE {
// OBSOLETE MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu);
// OBSOLETE d->load_regs_pending = 0;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Record the cycles computed for an insn.
// OBSOLETE LAST_P is non-zero if this is the last insn in a set of parallel insns,
// OBSOLETE and we update the total cycle count.
// OBSOLETE CYCLES is the cycle count of the insn. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30bf_model_insn_after (SIM_CPU *cpu, int last_p, int cycles)
// OBSOLETE {
// OBSOLETE PROFILE_DATA *p = CPU_PROFILE_DATA (cpu);
// OBSOLETE MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu);
// OBSOLETE
// OBSOLETE PROFILE_MODEL_TOTAL_CYCLES (p) += cycles;
// OBSOLETE PROFILE_MODEL_CUR_INSN_CYCLES (p) = cycles;
// OBSOLETE d->load_regs = d->load_regs_pending;
// OBSOLETE }
// OBSOLETE
// OBSOLETE static INLINE int
// OBSOLETE check_load_stall (SIM_CPU *cpu, int regno)
// OBSOLETE {
// OBSOLETE const MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu);
// OBSOLETE UINT load_regs = d->load_regs;
// OBSOLETE
// OBSOLETE if (regno != -1
// OBSOLETE && (load_regs & (1 << regno)) != 0)
// OBSOLETE {
// OBSOLETE PROFILE_DATA *p = CPU_PROFILE_DATA (cpu);
// OBSOLETE ++ PROFILE_MODEL_LOAD_STALL_CYCLES (p);
// OBSOLETE if (TRACE_INSN_P (cpu))
// OBSOLETE cgen_trace_printf (cpu, " ; Load stall.");
// OBSOLETE return 1;
// OBSOLETE }
// OBSOLETE else
// OBSOLETE return 0;
// OBSOLETE }
// OBSOLETE
// OBSOLETE int
// OBSOLETE fr30bf_model_fr30_1_u_exec (SIM_CPU *cpu, const IDESC *idesc,
// OBSOLETE int unit_num, int referenced,
// OBSOLETE INT in_Ri, INT in_Rj, INT out_Ri)
// OBSOLETE {
// OBSOLETE int cycles = idesc->timing->units[unit_num].done;
// OBSOLETE cycles += check_load_stall (cpu, in_Ri);
// OBSOLETE cycles += check_load_stall (cpu, in_Rj);
// OBSOLETE return cycles;
// OBSOLETE }
// OBSOLETE
// OBSOLETE int
// OBSOLETE fr30bf_model_fr30_1_u_cti (SIM_CPU *cpu, const IDESC *idesc,
// OBSOLETE int unit_num, int referenced,
// OBSOLETE INT in_Ri)
// OBSOLETE {
// OBSOLETE PROFILE_DATA *p = CPU_PROFILE_DATA (cpu);
// OBSOLETE /* (1 << 1): The pc is the 2nd element in inputs, outputs.
// OBSOLETE ??? can be cleaned up */
// OBSOLETE int taken_p = (referenced & (1 << 1)) != 0;
// OBSOLETE int cycles = idesc->timing->units[unit_num].done;
// OBSOLETE int delay_slot_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT);
// OBSOLETE
// OBSOLETE cycles += check_load_stall (cpu, in_Ri);
// OBSOLETE if (taken_p)
// OBSOLETE {
// OBSOLETE /* ??? Handling cti's without delay slots this way will run afoul of
// OBSOLETE accurate system simulation. Later. */
// OBSOLETE if (! delay_slot_p)
// OBSOLETE {
// OBSOLETE ++cycles;
// OBSOLETE ++PROFILE_MODEL_CTI_STALL_CYCLES (p);
// OBSOLETE }
// OBSOLETE ++PROFILE_MODEL_TAKEN_COUNT (p);
// OBSOLETE }
// OBSOLETE else
// OBSOLETE ++PROFILE_MODEL_UNTAKEN_COUNT (p);
// OBSOLETE
// OBSOLETE return cycles;
// OBSOLETE }
// OBSOLETE
// OBSOLETE int
// OBSOLETE fr30bf_model_fr30_1_u_load (SIM_CPU *cpu, const IDESC *idesc,
// OBSOLETE int unit_num, int referenced,
// OBSOLETE INT in_Rj, INT out_Ri)
// OBSOLETE {
// OBSOLETE MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu);
// OBSOLETE int cycles = idesc->timing->units[unit_num].done;
// OBSOLETE d->load_regs_pending |= 1 << out_Ri;
// OBSOLETE cycles += check_load_stall (cpu, in_Rj);
// OBSOLETE return cycles;
// OBSOLETE }
// OBSOLETE
// OBSOLETE int
// OBSOLETE fr30bf_model_fr30_1_u_store (SIM_CPU *cpu, const IDESC *idesc,
// OBSOLETE int unit_num, int referenced,
// OBSOLETE INT in_Ri, INT in_Rj)
// OBSOLETE {
// OBSOLETE int cycles = idesc->timing->units[unit_num].done;
// OBSOLETE cycles += check_load_stall (cpu, in_Ri);
// OBSOLETE cycles += check_load_stall (cpu, in_Rj);
// OBSOLETE return cycles;
// OBSOLETE }
// OBSOLETE
// OBSOLETE int
// OBSOLETE fr30bf_model_fr30_1_u_ldm (SIM_CPU *cpu, const IDESC *idesc,
// OBSOLETE int unit_num, int referenced,
// OBSOLETE INT reglist)
// OBSOLETE {
// OBSOLETE return idesc->timing->units[unit_num].done;
// OBSOLETE }
// OBSOLETE
// OBSOLETE int
// OBSOLETE fr30bf_model_fr30_1_u_stm (SIM_CPU *cpu, const IDESC *idesc,
// OBSOLETE int unit_num, int referenced,
// OBSOLETE INT reglist)
// OBSOLETE {
// OBSOLETE return idesc->timing->units[unit_num].done;
// OBSOLETE }
// OBSOLETE
// OBSOLETE #endif /* WITH_PROFILE_MODEL_P */

236
sim/fr30/mloop.in
View file

@ -1,236 +0,0 @@
# OBSOLETE # Simulator main loop for fr30. -*- C -*-
# OBSOLETE # Copyright (C) 1998, 1999 Free Software Foundation, Inc.
# OBSOLETE # Contributed by Cygnus Solutions.
# OBSOLETE #
# OBSOLETE # This file is part of the GNU Simulators.
# OBSOLETE #
# OBSOLETE # This program is free software; you can redistribute it and/or modify
# OBSOLETE # it under the terms of the GNU General Public License as published by
# OBSOLETE # the Free Software Foundation; either version 2, or (at your option)
# OBSOLETE # any later version.
# OBSOLETE #
# OBSOLETE # This program is distributed in the hope that it will be useful,
# OBSOLETE # but WITHOUT ANY WARRANTY; without even the implied warranty of
# OBSOLETE # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# OBSOLETE # GNU General Public License for more details.
# OBSOLETE #
# OBSOLETE # You should have received a copy of the GNU General Public License along
# OBSOLETE # with this program; if not, write to the Free Software Foundation, Inc.,
# OBSOLETE # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
# OBSOLETE
# OBSOLETE # Syntax:
# OBSOLETE # /bin/sh mainloop.in command
# OBSOLETE #
# OBSOLETE # Command is one of:
# OBSOLETE #
# OBSOLETE # init
# OBSOLETE # support
# OBSOLETE # extract-{simple,scache,pbb}
# OBSOLETE # {full,fast}-exec-{simple,scache,pbb}
# OBSOLETE #
# OBSOLETE # A target need only provide a "full" version of one of simple,scache,pbb.
# OBSOLETE # If the target wants it can also provide a fast version of same.
# OBSOLETE # It can't provide more than this, however for illustration's sake the FR30
# OBSOLETE # port provides examples of all.
# OBSOLETE
# OBSOLETE # ??? After a few more ports are done, revisit.
# OBSOLETE # Will eventually need to machine generate a lot of this.
# OBSOLETE
# OBSOLETE case "x$1" in
# OBSOLETE
# OBSOLETE xsupport)
# OBSOLETE
# OBSOLETE cat <<EOF
# OBSOLETE
# OBSOLETE static INLINE const IDESC *
# OBSOLETE extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf,
# OBSOLETE int fast_p)
# OBSOLETE {
# OBSOLETE const IDESC *id = @cpu@_decode (current_cpu, pc, insn, abuf);
# OBSOLETE @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
# OBSOLETE if (! fast_p)
# OBSOLETE {
# OBSOLETE int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
# OBSOLETE int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
# OBSOLETE @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p);
# OBSOLETE }
# OBSOLETE return id;
# OBSOLETE }
# OBSOLETE
# OBSOLETE static INLINE SEM_PC
# OBSOLETE execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p)
# OBSOLETE {
# OBSOLETE SEM_PC vpc;
# OBSOLETE
# OBSOLETE if (fast_p)
# OBSOLETE {
# OBSOLETE #if ! WITH_SEM_SWITCH_FAST
# OBSOLETE #if WITH_SCACHE
# OBSOLETE vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc);
# OBSOLETE #else
# OBSOLETE vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf);
# OBSOLETE #endif
# OBSOLETE #else
# OBSOLETE abort ();
# OBSOLETE #endif /* WITH_SEM_SWITCH_FAST */
# OBSOLETE }
# OBSOLETE else
# OBSOLETE {
# OBSOLETE #if ! WITH_SEM_SWITCH_FULL
# OBSOLETE ARGBUF *abuf = &sc->argbuf;
# OBSOLETE const IDESC *idesc = abuf->idesc;
# OBSOLETE #if WITH_SCACHE_PBB
# OBSOLETE int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL);
# OBSOLETE #else
# OBSOLETE int virtual_p = 0;
# OBSOLETE #endif
# OBSOLETE
# OBSOLETE if (! virtual_p)
# OBSOLETE {
# OBSOLETE /* FIXME: call x-before */
# OBSOLETE if (ARGBUF_PROFILE_P (abuf))
# OBSOLETE PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num);
# OBSOLETE /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */
# OBSOLETE if (PROFILE_MODEL_P (current_cpu)
# OBSOLETE && ARGBUF_PROFILE_P (abuf))
# OBSOLETE @cpu@_model_insn_before (current_cpu, 1 /*first_p*/);
# OBSOLETE TRACE_INSN_INIT (current_cpu, abuf, 1);
# OBSOLETE TRACE_INSN (current_cpu, idesc->idata,
# OBSOLETE (const struct argbuf *) abuf, abuf->addr);
# OBSOLETE }
# OBSOLETE #if WITH_SCACHE
# OBSOLETE vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc);
# OBSOLETE #else
# OBSOLETE vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf);
# OBSOLETE #endif
# OBSOLETE if (! virtual_p)
# OBSOLETE {
# OBSOLETE /* FIXME: call x-after */
# OBSOLETE if (PROFILE_MODEL_P (current_cpu)
# OBSOLETE && ARGBUF_PROFILE_P (abuf))
# OBSOLETE {
# OBSOLETE int cycles;
# OBSOLETE
# OBSOLETE cycles = (*idesc->timing->model_fn) (current_cpu, sc);
# OBSOLETE @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
# OBSOLETE }
# OBSOLETE TRACE_INSN_FINI (current_cpu, abuf, 1);
# OBSOLETE }
# OBSOLETE #else
# OBSOLETE abort ();
# OBSOLETE #endif /* WITH_SEM_SWITCH_FULL */
# OBSOLETE }
# OBSOLETE
# OBSOLETE return vpc;
# OBSOLETE }
# OBSOLETE
# OBSOLETE EOF
# OBSOLETE
# OBSOLETE ;;
# OBSOLETE
# OBSOLETE xinit)
# OBSOLETE
# OBSOLETE cat <<EOF
# OBSOLETE /*xxxinit*/
# OBSOLETE EOF
# OBSOLETE
# OBSOLETE ;;
# OBSOLETE
# OBSOLETE xextract-simple | xextract-scache)
# OBSOLETE
# OBSOLETE # Inputs: current_cpu, vpc, sc, FAST_P
# OBSOLETE # Outputs: sc filled in
# OBSOLETE
# OBSOLETE cat <<EOF
# OBSOLETE {
# OBSOLETE CGEN_INSN_INT insn = GETIMEMUHI (current_cpu, vpc);
# OBSOLETE extract (current_cpu, vpc, insn, SEM_ARGBUF (sc), FAST_P);
# OBSOLETE }
# OBSOLETE EOF
# OBSOLETE
# OBSOLETE ;;
# OBSOLETE
# OBSOLETE xextract-pbb)
# OBSOLETE
# OBSOLETE # Inputs: current_cpu, pc, sc, max_insns, FAST_P
# OBSOLETE # Outputs: sc, pc
# OBSOLETE # sc must be left pointing past the last created entry.
# OBSOLETE # pc must be left pointing past the last created entry.
# OBSOLETE # If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called
# OBSOLETE # to record the vpc of the cti insn.
# OBSOLETE # SET_INSN_COUNT(n) must be called to record number of real insns.
# OBSOLETE
# OBSOLETE cat <<EOF
# OBSOLETE {
# OBSOLETE const IDESC *idesc;
# OBSOLETE int icount = 0;
# OBSOLETE
# OBSOLETE while (max_insns > 0)
# OBSOLETE {
# OBSOLETE UHI insn = GETIMEMUHI (current_cpu, pc);
# OBSOLETE idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
# OBSOLETE ++sc;
# OBSOLETE --max_insns;
# OBSOLETE ++icount;
# OBSOLETE pc += idesc->length;
# OBSOLETE if (IDESC_CTI_P (idesc))
# OBSOLETE {
# OBSOLETE SET_CTI_VPC (sc - 1);
# OBSOLETE
# OBSOLETE /* Delay slot? */
# OBSOLETE /* ??? breakpoints in delay slots */
# OBSOLETE if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT))
# OBSOLETE {
# OBSOLETE UHI insn = GETIMEMUHI (current_cpu, pc);
# OBSOLETE idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
# OBSOLETE if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_NOT_IN_DELAY_SLOT))
# OBSOLETE {
# OBSOLETE /* malformed program */
# OBSOLETE sim_io_eprintf (CPU_STATE (current_cpu),
# OBSOLETE "malformed program, \`%s' insn in delay slot\n",
# OBSOLETE CGEN_INSN_NAME (idesc->idata));
# OBSOLETE }
# OBSOLETE else
# OBSOLETE {
# OBSOLETE ++sc;
# OBSOLETE --max_insns;
# OBSOLETE ++icount;
# OBSOLETE pc += idesc->length;
# OBSOLETE }
# OBSOLETE }
# OBSOLETE break;
# OBSOLETE }
# OBSOLETE }
# OBSOLETE
# OBSOLETE Finish:
# OBSOLETE SET_INSN_COUNT (icount);
# OBSOLETE }
# OBSOLETE EOF
# OBSOLETE
# OBSOLETE ;;
# OBSOLETE
# OBSOLETE xfull-exec-* | xfast-exec-*)
# OBSOLETE
# OBSOLETE # Inputs: current_cpu, sc, FAST_P
# OBSOLETE # Outputs: vpc
# OBSOLETE # vpc contains the address of the next insn to execute
# OBSOLETE
# OBSOLETE cat <<EOF
# OBSOLETE {
# OBSOLETE #if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST)
# OBSOLETE #define DEFINE_SWITCH
# OBSOLETE #include "sem-switch.c"
# OBSOLETE #else
# OBSOLETE vpc = execute (current_cpu, vpc, FAST_P);
# OBSOLETE #endif
# OBSOLETE }
# OBSOLETE EOF
# OBSOLETE
# OBSOLETE ;;
# OBSOLETE
# OBSOLETE *)
# OBSOLETE echo "Invalid argument to mainloop.in: $1" >&2
# OBSOLETE exit 1
# OBSOLETE ;;
# OBSOLETE
# OBSOLETE esac

4003
sim/fr30/model.c
View file

File diff suppressed because it is too large Load diff

5409
sim/fr30/sem-switch.c
View file

File diff suppressed because it is too large Load diff

5729
sim/fr30/sem.c
View file

File diff suppressed because it is too large Load diff

208
sim/fr30/sim-if.c
View file

@ -1,208 +0,0 @@
// OBSOLETE /* Main simulator entry points specific to the FR30.
// OBSOLETE Copyright (C) 1998, 1999 Free Software Foundation, Inc.
// OBSOLETE Contributed by Cygnus Solutions.
// OBSOLETE
// OBSOLETE This file is part of the GNU simulators.
// OBSOLETE
// OBSOLETE This program is free software; you can redistribute it and/or modify
// OBSOLETE it under the terms of the GNU General Public License as published by
// OBSOLETE the Free Software Foundation; either version 2, or (at your option)
// OBSOLETE any later version.
// OBSOLETE
// OBSOLETE This program is distributed in the hope that it will be useful,
// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of
// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// OBSOLETE GNU General Public License for more details.
// OBSOLETE
// OBSOLETE You should have received a copy of the GNU General Public License along
// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,
// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
// OBSOLETE
// OBSOLETE #include "sim-main.h"
// OBSOLETE #ifdef HAVE_STDLIB_H
// OBSOLETE #include <stdlib.h>
// OBSOLETE #endif
// OBSOLETE #include "sim-options.h"
// OBSOLETE #include "libiberty.h"
// OBSOLETE #include "bfd.h"
// OBSOLETE
// OBSOLETE static void free_state (SIM_DESC);
// OBSOLETE static void print_fr30_misc_cpu (SIM_CPU *cpu, int verbose);
// OBSOLETE
// OBSOLETE /* Records simulator descriptor so utilities like fr30_dump_regs can be
// OBSOLETE called from gdb. */
// OBSOLETE SIM_DESC current_state;
// OBSOLETE
// OBSOLETE /* Cover function of sim_state_free to free the cpu buffers as well. */
// OBSOLETE
// OBSOLETE static void
// OBSOLETE free_state (SIM_DESC sd)
// OBSOLETE {
// OBSOLETE if (STATE_MODULES (sd) != NULL)
// OBSOLETE sim_module_uninstall (sd);
// OBSOLETE sim_cpu_free_all (sd);
// OBSOLETE sim_state_free (sd);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Create an instance of the simulator. */
// OBSOLETE
// OBSOLETE SIM_DESC
// OBSOLETE sim_open (kind, callback, abfd, argv)
// OBSOLETE SIM_OPEN_KIND kind;
// OBSOLETE host_callback *callback;
// OBSOLETE struct _bfd *abfd;
// OBSOLETE char **argv;
// OBSOLETE {
// OBSOLETE char c;
// OBSOLETE int i;
// OBSOLETE SIM_DESC sd = sim_state_alloc (kind, callback);
// OBSOLETE
// OBSOLETE /* The cpu data is kept in a separately allocated chunk of memory. */
// OBSOLETE if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
// OBSOLETE {
// OBSOLETE free_state (sd);
// OBSOLETE return 0;
// OBSOLETE }
// OBSOLETE
// OBSOLETE #if 0 /* FIXME: pc is in mach-specific struct */
// OBSOLETE /* FIXME: watchpoints code shouldn't need this */
// OBSOLETE {
// OBSOLETE SIM_CPU *current_cpu = STATE_CPU (sd, 0);
// OBSOLETE STATE_WATCHPOINTS (sd)->pc = &(PC);
// OBSOLETE STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
// OBSOLETE }
// OBSOLETE #endif
// OBSOLETE
// OBSOLETE if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
// OBSOLETE {
// OBSOLETE free_state (sd);
// OBSOLETE return 0;
// OBSOLETE }
// OBSOLETE
// OBSOLETE #if 0 /* FIXME: 'twould be nice if we could do this */
// OBSOLETE /* These options override any module options.
// OBSOLETE Obviously ambiguity should be avoided, however the caller may wish to
// OBSOLETE augment the meaning of an option. */
// OBSOLETE if (extra_options != NULL)
// OBSOLETE sim_add_option_table (sd, extra_options);
// OBSOLETE #endif
// OBSOLETE
// OBSOLETE /* getopt will print the error message so we just have to exit if this fails.
// OBSOLETE FIXME: Hmmm... in the case of gdb we need getopt to call
// OBSOLETE print_filtered. */
// OBSOLETE if (sim_parse_args (sd, argv) != SIM_RC_OK)
// OBSOLETE {
// OBSOLETE free_state (sd);
// OBSOLETE return 0;
// OBSOLETE }
// OBSOLETE
// OBSOLETE #if 0
// OBSOLETE /* Allocate a handler for the control registers and other devices
// OBSOLETE if no memory for that range has been allocated by the user.
// OBSOLETE All are allocated in one chunk to keep things from being
// OBSOLETE unnecessarily complicated. */
// OBSOLETE if (sim_core_read_buffer (sd, NULL, read_map, &c, FR30_DEVICE_ADDR, 1) == 0)
// OBSOLETE sim_core_attach (sd, NULL,
// OBSOLETE 0 /*level*/,
// OBSOLETE access_read_write,
// OBSOLETE 0 /*space ???*/,
// OBSOLETE FR30_DEVICE_ADDR, FR30_DEVICE_LEN /*nr_bytes*/,
// OBSOLETE 0 /*modulo*/,
// OBSOLETE &fr30_devices,
// OBSOLETE NULL /*buffer*/);
// OBSOLETE #endif
// OBSOLETE
// OBSOLETE /* Allocate core managed memory if none specified by user.
// OBSOLETE Use address 4 here in case the user wanted address 0 unmapped. */
// OBSOLETE if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
// OBSOLETE sim_do_commandf (sd, "memory region 0,0x%lx", FR30_DEFAULT_MEM_SIZE);
// OBSOLETE
// OBSOLETE /* check for/establish the reference program image */
// OBSOLETE if (sim_analyze_program (sd,
// OBSOLETE (STATE_PROG_ARGV (sd) != NULL
// OBSOLETE ? *STATE_PROG_ARGV (sd)
// OBSOLETE : NULL),
// OBSOLETE abfd) != SIM_RC_OK)
// OBSOLETE {
// OBSOLETE free_state (sd);
// OBSOLETE return 0;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Establish any remaining configuration options. */
// OBSOLETE if (sim_config (sd) != SIM_RC_OK)
// OBSOLETE {
// OBSOLETE free_state (sd);
// OBSOLETE return 0;
// OBSOLETE }
// OBSOLETE
// OBSOLETE if (sim_post_argv_init (sd) != SIM_RC_OK)
// OBSOLETE {
// OBSOLETE free_state (sd);
// OBSOLETE return 0;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Open a copy of the cpu descriptor table. */
// OBSOLETE {
// OBSOLETE CGEN_CPU_DESC cd = fr30_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
// OBSOLETE CGEN_ENDIAN_BIG);
// OBSOLETE for (i = 0; i < MAX_NR_PROCESSORS; ++i)
// OBSOLETE {
// OBSOLETE SIM_CPU *cpu = STATE_CPU (sd, i);
// OBSOLETE CPU_CPU_DESC (cpu) = cd;
// OBSOLETE CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
// OBSOLETE }
// OBSOLETE fr30_cgen_init_dis (cd);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Initialize various cgen things not done by common framework.
// OBSOLETE Must be done after fr30_cgen_cpu_open. */
// OBSOLETE cgen_init (sd);
// OBSOLETE
// OBSOLETE /* Store in a global so things like sparc32_dump_regs can be invoked
// OBSOLETE from the gdb command line. */
// OBSOLETE current_state = sd;
// OBSOLETE
// OBSOLETE return sd;
// OBSOLETE }
// OBSOLETE
// OBSOLETE void
// OBSOLETE sim_close (sd, quitting)
// OBSOLETE SIM_DESC sd;
// OBSOLETE int quitting;
// OBSOLETE {
// OBSOLETE fr30_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0)));
// OBSOLETE sim_module_uninstall (sd);
// OBSOLETE }
// OBSOLETE
// OBSOLETE SIM_RC
// OBSOLETE sim_create_inferior (sd, abfd, argv, envp)
// OBSOLETE SIM_DESC sd;
// OBSOLETE struct _bfd *abfd;
// OBSOLETE char **argv;
// OBSOLETE char **envp;
// OBSOLETE {
// OBSOLETE SIM_CPU *current_cpu = STATE_CPU (sd, 0);
// OBSOLETE SIM_ADDR addr;
// OBSOLETE
// OBSOLETE if (abfd != NULL)
// OBSOLETE addr = bfd_get_start_address (abfd);
// OBSOLETE else
// OBSOLETE addr = 0;
// OBSOLETE sim_pc_set (current_cpu, addr);
// OBSOLETE
// OBSOLETE #if 0
// OBSOLETE STATE_ARGV (sd) = sim_copy_argv (argv);
// OBSOLETE STATE_ENVP (sd) = sim_copy_argv (envp);
// OBSOLETE #endif
// OBSOLETE
// OBSOLETE return SIM_RC_OK;
// OBSOLETE }
// OBSOLETE
// OBSOLETE void
// OBSOLETE sim_do_command (sd, cmd)
// OBSOLETE SIM_DESC sd;
// OBSOLETE char *cmd;
// OBSOLETE {
// OBSOLETE if (sim_args_command (sd, cmd) != SIM_RC_OK)
// OBSOLETE sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
// OBSOLETE }

70
sim/fr30/sim-main.h
View file

@ -1,70 +0,0 @@
// OBSOLETE /* Main header for the fr30. */
// OBSOLETE
// OBSOLETE #define USING_SIM_BASE_H /* FIXME: quick hack */
// OBSOLETE
// OBSOLETE struct _sim_cpu; /* FIXME: should be in sim-basics.h */
// OBSOLETE typedef struct _sim_cpu SIM_CPU;
// OBSOLETE
// OBSOLETE /* sim-basics.h includes config.h but cgen-types.h must be included before
// OBSOLETE sim-basics.h and cgen-types.h needs config.h. */
// OBSOLETE #include "config.h"
// OBSOLETE
// OBSOLETE #include "symcat.h"
// OBSOLETE #include "sim-basics.h"
// OBSOLETE #include "cgen-types.h"
// OBSOLETE #include "fr30-desc.h"
// OBSOLETE #include "fr30-opc.h"
// OBSOLETE #include "arch.h"
// OBSOLETE
// OBSOLETE /* These must be defined before sim-base.h. */
// OBSOLETE typedef USI sim_cia;
// OBSOLETE
// OBSOLETE #define CIA_GET(cpu) CPU_PC_GET (cpu)
// OBSOLETE #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
// OBSOLETE
// OBSOLETE #include "sim-base.h"
// OBSOLETE #include "cgen-sim.h"
// OBSOLETE #include "fr30-sim.h"
// OBSOLETE
// OBSOLETE /* The _sim_cpu struct. */
// OBSOLETE
// OBSOLETE struct _sim_cpu {
// OBSOLETE /* sim/common cpu base. */
// OBSOLETE sim_cpu_base base;
// OBSOLETE
// OBSOLETE /* Static parts of cgen. */
// OBSOLETE CGEN_CPU cgen_cpu;
// OBSOLETE
// OBSOLETE /* CPU specific parts go here.
// OBSOLETE Note that in files that don't need to access these pieces WANT_CPU_FOO
// OBSOLETE won't be defined and thus these parts won't appear. This is ok in the
// OBSOLETE sense that things work. It is a source of bugs though.
// OBSOLETE One has to of course be careful to not take the size of this
// OBSOLETE struct and no structure members accessed in non-cpu specific files can
// OBSOLETE go after here. Oh for a better language. */
// OBSOLETE #if defined (WANT_CPU_FR30BF)
// OBSOLETE FR30BF_CPU_DATA cpu_data;
// OBSOLETE #endif
// OBSOLETE };
// OBSOLETE
// OBSOLETE /* The sim_state struct. */
// OBSOLETE
// OBSOLETE struct sim_state {
// OBSOLETE sim_cpu *cpu;
// OBSOLETE #define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
// OBSOLETE
// OBSOLETE CGEN_STATE cgen_state;
// OBSOLETE
// OBSOLETE sim_state_base base;
// OBSOLETE };
// OBSOLETE
// OBSOLETE /* Misc. */
// OBSOLETE
// OBSOLETE /* Catch address exceptions. */
// OBSOLETE extern SIM_CORE_SIGNAL_FN fr30_core_signal;
// OBSOLETE #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
// OBSOLETE fr30_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
// OBSOLETE (TRANSFER), (ERROR))
// OBSOLETE
// OBSOLETE /* Default memory size. */
// OBSOLETE #define FR30_DEFAULT_MEM_SIZE 0x800000 /* 8M */

42
sim/fr30/tconfig.in
View file

@ -1,42 +0,0 @@
/* FR30 target configuration file. -*- C -*- */
/* Define this if the simulator can vary the size of memory.
See the xxx simulator for an example.
This enables the `-m size' option.
The memory size is stored in STATE_MEM_SIZE. */
/* Not used for FR30 since we use the memory module. TODO -- check this */
/* #define SIM_HAVE_MEM_SIZE */
/* See sim-hload.c. We properly handle LMA. -- TODO: check this */
#define SIM_HANDLES_LMA 1
/* For MSPR support. FIXME: revisit. */
#define WITH_DEVICES 1
/* FIXME: Revisit. */
#ifdef HAVE_DV_SOCKSER
MODULE_INSTALL_FN dv_sockser_install;
#define MODULE_LIST dv_sockser_install,
#endif
#if 0
/* Enable watchpoints. */
#define WITH_WATCHPOINTS 1
#endif
/* ??? Temporary hack until model support unified. */
#define SIM_HAVE_MODEL
/* Define this to enable the intrinsic breakpoint mechanism. */
/* FIXME: may be able to remove SIM_HAVE_BREAKPOINTS since it essentially
duplicates ifdef SIM_BREAKPOINT (right?) */
#if 0
#define SIM_HAVE_BREAKPOINTS
#define SIM_BREAKPOINT { 0x10, 0xf1 }
#define SIM_BREAKPOINT_SIZE 2
#endif
/* This is a global setting. Different cpu families can't mix-n-match -scache
and -pbb. However some cpu families may use -simple while others use
one of -scache/-pbb. ???? */
#define WITH_SCACHE_PBB 1

218
sim/fr30/traps.c
View file

@ -1,218 +0,0 @@
// OBSOLETE /* fr30 exception, interrupt, and trap (EIT) support
// OBSOLETE Copyright (C) 1998, 1999 Free Software Foundation, Inc.
// OBSOLETE Contributed by Cygnus Solutions.
// OBSOLETE
// OBSOLETE This file is part of the GNU simulators.
// OBSOLETE
// OBSOLETE This program is free software; you can redistribute it and/or modify
// OBSOLETE it under the terms of the GNU General Public License as published by
// OBSOLETE the Free Software Foundation; either version 2, or (at your option)
// OBSOLETE any later version.
// OBSOLETE
// OBSOLETE This program is distributed in the hope that it will be useful,
// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of
// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// OBSOLETE GNU General Public License for more details.
// OBSOLETE
// OBSOLETE You should have received a copy of the GNU General Public License along
// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,
// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
// OBSOLETE
// OBSOLETE #include "sim-main.h"
// OBSOLETE #include "targ-vals.h"
// OBSOLETE #include "cgen-engine.h"
// OBSOLETE
// OBSOLETE /* The semantic code invokes this for invalid (unrecognized) instructions. */
// OBSOLETE
// OBSOLETE SEM_PC
// OBSOLETE sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc)
// OBSOLETE {
// OBSOLETE SIM_DESC sd = CPU_STATE (current_cpu);
// OBSOLETE
// OBSOLETE #if 0
// OBSOLETE if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
// OBSOLETE {
// OBSOLETE h_bsm_set (current_cpu, h_sm_get (current_cpu));
// OBSOLETE h_bie_set (current_cpu, h_ie_get (current_cpu));
// OBSOLETE h_bcond_set (current_cpu, h_cond_get (current_cpu));
// OBSOLETE /* sm not changed */
// OBSOLETE h_ie_set (current_cpu, 0);
// OBSOLETE h_cond_set (current_cpu, 0);
// OBSOLETE
// OBSOLETE h_bpc_set (current_cpu, cia);
// OBSOLETE
// OBSOLETE sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
// OBSOLETE EIT_RSVD_INSN_ADDR);
// OBSOLETE }
// OBSOLETE else
// OBSOLETE #endif
// OBSOLETE sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL);
// OBSOLETE return vpc;
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Process an address exception. */
// OBSOLETE
// OBSOLETE void
// OBSOLETE fr30_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia,
// OBSOLETE unsigned int map, int nr_bytes, address_word addr,
// OBSOLETE transfer_type transfer, sim_core_signals sig)
// OBSOLETE {
// OBSOLETE #if 0
// OBSOLETE if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
// OBSOLETE {
// OBSOLETE h_bsm_set (current_cpu, h_sm_get (current_cpu));
// OBSOLETE h_bie_set (current_cpu, h_ie_get (current_cpu));
// OBSOLETE h_bcond_set (current_cpu, h_cond_get (current_cpu));
// OBSOLETE /* sm not changed */
// OBSOLETE h_ie_set (current_cpu, 0);
// OBSOLETE h_cond_set (current_cpu, 0);
// OBSOLETE
// OBSOLETE h_bpc_set (current_cpu, cia);
// OBSOLETE
// OBSOLETE sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
// OBSOLETE EIT_ADDR_EXCP_ADDR);
// OBSOLETE }
// OBSOLETE else
// OBSOLETE #endif
// OBSOLETE sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr,
// OBSOLETE transfer, sig);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Read/write functions for system call interface. */
// OBSOLETE
// OBSOLETE static int
// OBSOLETE syscall_read_mem (host_callback *cb, struct cb_syscall *sc,
// OBSOLETE unsigned long taddr, char *buf, int bytes)
// OBSOLETE {
// OBSOLETE SIM_DESC sd = (SIM_DESC) sc->p1;
// OBSOLETE SIM_CPU *cpu = (SIM_CPU *) sc->p2;
// OBSOLETE
// OBSOLETE return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes);
// OBSOLETE }
// OBSOLETE
// OBSOLETE static int
// OBSOLETE syscall_write_mem (host_callback *cb, struct cb_syscall *sc,
// OBSOLETE unsigned long taddr, const char *buf, int bytes)
// OBSOLETE {
// OBSOLETE SIM_DESC sd = (SIM_DESC) sc->p1;
// OBSOLETE SIM_CPU *cpu = (SIM_CPU *) sc->p2;
// OBSOLETE
// OBSOLETE return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Subroutine of fr30_int to save the PS and PC and setup for INT and INTE. */
// OBSOLETE
// OBSOLETE static void
// OBSOLETE setup_int (SIM_CPU *current_cpu, PCADDR pc)
// OBSOLETE {
// OBSOLETE USI ssp = fr30bf_h_dr_get (current_cpu, H_DR_SSP);
// OBSOLETE USI ps = fr30bf_h_ps_get (current_cpu);
// OBSOLETE
// OBSOLETE ssp -= 4;
// OBSOLETE SETMEMSI (current_cpu, pc, ssp, ps);
// OBSOLETE ssp -= 4;
// OBSOLETE SETMEMSI (current_cpu, pc, ssp, pc + 2);
// OBSOLETE fr30bf_h_dr_set (current_cpu, H_DR_SSP, ssp);
// OBSOLETE fr30bf_h_sbit_set (current_cpu, 0);
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Trap support.
// OBSOLETE The result is the pc address to continue at.
// OBSOLETE Preprocessing like saving the various registers has already been done. */
// OBSOLETE
// OBSOLETE USI
// OBSOLETE fr30_int (SIM_CPU *current_cpu, PCADDR pc, int num)
// OBSOLETE {
// OBSOLETE SIM_DESC sd = CPU_STATE (current_cpu);
// OBSOLETE host_callback *cb = STATE_CALLBACK (sd);
// OBSOLETE
// OBSOLETE #ifdef SIM_HAVE_BREAKPOINTS
// OBSOLETE /* Check for breakpoints "owned" by the simulator first, regardless
// OBSOLETE of --environment. */
// OBSOLETE if (num == TRAP_BREAKPOINT)
// OBSOLETE {
// OBSOLETE /* First try sim-break.c. If it's a breakpoint the simulator "owns"
// OBSOLETE it doesn't return. Otherwise it returns and let's us try. */
// OBSOLETE sim_handle_breakpoint (sd, current_cpu, pc);
// OBSOLETE /* Fall through. */
// OBSOLETE }
// OBSOLETE #endif
// OBSOLETE
// OBSOLETE if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
// OBSOLETE {
// OBSOLETE /* The new pc is the trap vector entry.
// OBSOLETE We assume there's a branch there to some handler. */
// OBSOLETE USI new_pc;
// OBSOLETE setup_int (current_cpu, pc);
// OBSOLETE fr30bf_h_ibit_set (current_cpu, 0);
// OBSOLETE new_pc = GETMEMSI (current_cpu, pc,
// OBSOLETE fr30bf_h_dr_get (current_cpu, H_DR_TBR)
// OBSOLETE + 1024 - ((num + 1) * 4));
// OBSOLETE return new_pc;
// OBSOLETE }
// OBSOLETE
// OBSOLETE switch (num)
// OBSOLETE {
// OBSOLETE case TRAP_SYSCALL :
// OBSOLETE {
// OBSOLETE /* TODO: find out what the ABI for this is */
// OBSOLETE CB_SYSCALL s;
// OBSOLETE
// OBSOLETE CB_SYSCALL_INIT (&s);
// OBSOLETE s.func = fr30bf_h_gr_get (current_cpu, 0);
// OBSOLETE s.arg1 = fr30bf_h_gr_get (current_cpu, 4);
// OBSOLETE s.arg2 = fr30bf_h_gr_get (current_cpu, 5);
// OBSOLETE s.arg3 = fr30bf_h_gr_get (current_cpu, 6);
// OBSOLETE
// OBSOLETE if (s.func == TARGET_SYS_exit)
// OBSOLETE {
// OBSOLETE sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1);
// OBSOLETE }
// OBSOLETE
// OBSOLETE s.p1 = (PTR) sd;
// OBSOLETE s.p2 = (PTR) current_cpu;
// OBSOLETE s.read_mem = syscall_read_mem;
// OBSOLETE s.write_mem = syscall_write_mem;
// OBSOLETE cb_syscall (cb, &s);
// OBSOLETE fr30bf_h_gr_set (current_cpu, 2, s.errcode); /* TODO: check this one */
// OBSOLETE fr30bf_h_gr_set (current_cpu, 4, s.result);
// OBSOLETE fr30bf_h_gr_set (current_cpu, 1, s.result2); /* TODO: check this one */
// OBSOLETE break;
// OBSOLETE }
// OBSOLETE
// OBSOLETE case TRAP_BREAKPOINT:
// OBSOLETE sim_engine_halt (sd, current_cpu, NULL, pc,
// OBSOLETE sim_stopped, SIM_SIGTRAP);
// OBSOLETE break;
// OBSOLETE
// OBSOLETE default :
// OBSOLETE {
// OBSOLETE USI new_pc;
// OBSOLETE setup_int (current_cpu, pc);
// OBSOLETE fr30bf_h_ibit_set (current_cpu, 0);
// OBSOLETE new_pc = GETMEMSI (current_cpu, pc,
// OBSOLETE fr30bf_h_dr_get (current_cpu, H_DR_TBR)
// OBSOLETE + 1024 - ((num + 1) * 4));
// OBSOLETE return new_pc;
// OBSOLETE }
// OBSOLETE }
// OBSOLETE
// OBSOLETE /* Fake an "reti" insn.
// OBSOLETE Since we didn't push anything to stack, all we need to do is
// OBSOLETE update pc. */
// OBSOLETE return pc + 2;
// OBSOLETE }
// OBSOLETE
// OBSOLETE USI
// OBSOLETE fr30_inte (SIM_CPU *current_cpu, PCADDR pc, int num)
// OBSOLETE {
// OBSOLETE /* The new pc is the trap #9 vector entry.
// OBSOLETE We assume there's a branch there to some handler. */
// OBSOLETE USI new_pc;
// OBSOLETE setup_int (current_cpu, pc);
// OBSOLETE fr30bf_h_ilm_set (current_cpu, 4);
// OBSOLETE new_pc = GETMEMSI (current_cpu, pc,
// OBSOLETE fr30bf_h_dr_get (current_cpu, H_DR_TBR)
// OBSOLETE + 1024 - ((9 + 1) * 4));
// OBSOLETE return new_pc;
// OBSOLETE }

472
sim/mn10200/ChangeLog
View file

@ -1,472 +0,0 @@
2004-06-28 Andrew Cagney <cagney@gnu.org>
* interp.c: Rename ui_loop_hook to deprecated_ui_loop_hook.
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
2002-06-16 Andrew Cagney <ac131313@redhat.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
2002-06-09 Andrew Cagney <cagney@redhat.com>
* Makefile.in (INCLUDE): Update path to callback.h.
* mn10200_sim.h: Include "gdb/callback.h" and "gdb/remote-sim.h".
2001-04-15 J.T. Conklin <jtc@redback.com>
* Makefile.in (simops.o): Add simops.h to dependency list.
Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
1999-04-06 Keith Seitz <keiths@cygnus.com>
* interp.c (sim_stop): Set the sim's exception
to SIGINT.
1999-04-02 Keith Seitz <keiths@cygnus.com>
* interp.c (UI_LOOP_POLL_INTERVAL): Define. Used to tweak the
frequency at which ui_loop_hook is called.
(ui_loop_hook_counter): New global defined when NEED_UI_LOOP_HOOK
is defined.
(sim_resume): Call ui_loop_hook (if defined) when the interval
passes.
* Makefile.in (SIM_EXTRA_CFLAGS): Include NEED_UI_LOOP_HOOK.
Wed Jun 17 11:37:59 1998 Mark Alexander <marka@cygnus.com>
* Makefile.in: Define NL_TARGET so that targ-vals.h will be used
instead of syscall.h.
* simops.c: Use targ-vals.h instead of syscall.h.
Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
Sun Apr 26 15:19:58 1998 Tom Tromey <tromey@cygnus.com>
* acconfig.h: New file.
* configure.in: Reverted change of Apr 24; use sinclude again.
Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
Fri Apr 24 11:19:13 1998 Tom Tromey <tromey@cygnus.com>
* configure.in: Don't call sinclude.
Thu Apr 23 09:48:14 1998 Tom Tromey <tromey@creche>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Tue Feb 17 12:46:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_store_register, sim_fetch_register): Pass in
length parameter. Return -1.
Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Tue Jan 13 00:01:40 1998 Jeffrey A Law (law@cygnus.com)
* simops.c: Stores to abs16 memory addresses zero extend the
abs16 address.
Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_load): Pass lma_p and sim_write args to
sim_load_file.
Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Tue Sep 2 18:41:23 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: PC relative instructions are relative to the next
instruction, not the current instruction.
Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
Tue Aug 26 10:40:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument.
(sim_load): Move setting of PC from here.
(sim_create_inferior): To here.
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_open): Add ABFD argument.
Tue Jun 24 13:44:08 1997 Jeffrey A Law (law@cygnus.com)
* interp.c (sim_resume): Clear State.exited.
(sim_stop_reason): If State.exited is nonzero, then indicate that
the simulator exited instead of stopped.
* mn10200_sim.h (struct _state): Add exited field.
* simops.c (syscall): Set State.exited for SYS_exit.
Tue May 20 17:45:47 1997 Jeffrey A Law (law@cygnus.com)
* interp.c: Replace all references to load_mem and store_mem
with references to load_byte, load_half, load_3_byte, load_word
and store_byte, store_half, store_3_byte, store_word.
(INLINE): Delete definition.
(load_mem_big): Likewise.
(max_mem): Make it global.
(dispatch): Make this function inline.
(load_mem, store_mem): Delete functions.
* mn10200_sim.h (INLINE): Define.
(RLW): Delete unused definition.
(load_mem, store_mem): Delete declarations.
(load_mem_big): New definition.
(load_byte, load_half, load_3_byte, load_word): New functions.
(store_byte, store_half, store_3_byte, store_word): New functions.
* simops.c: Replace all references to load_mem and store_mem
with references to load_byte, load_half, load_3_byte, load_word
and store_byte, store_half, store_3_byte, store_word.
Tue May 20 10:21:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_open): Add callback argument.
(sim_set_callbacks): Delete SIM_DESC argument.
Sun May 18 16:59:09 1997 Jeffrey A Law (law@cygnus.com)
* interp.c (compare_simops): New function.
(sim_open): Sort the Simops table before inserting entries
into the hash table.
Fri May 16 16:29:18 1997 Jeffrey A Law (law@cygnus.com)
* interp.c (load_mem): Fix formatting/indention problems with
last change. If we get a load from an out of range address,
abort instead of returning zero.
(store_mem): Abort if we try to store to an out of range address.
Wed May 14 21:21:30 1997 Bob Manson <manson@charmed.cygnus.com>
* simops.c (OP_F010): Fix some arguments to correspond
with reality (types of arguments passed to lseek, read,
write, open).
* interp.c (max_mem): New variable.
(load_mem): Check memory address against max_mem to
avoid some self-destructive behaviors.
Tue May 13 21:45:24 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Fix typo in cc0 setting for lsr.
Tue May 6 13:22:12 1997 Jeffrey A Law (law@cygnus.com)
* interp.c: Random typo/thinko cleanups.
Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Mon Apr 21 10:29:30 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Fix typo in "open" syscall emulation.
Fri Apr 18 14:04:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_stop): Add stub function.
Thu Apr 17 03:23:58 1997 Doug Evans <dje@canuck.cygnus.com>
* Makefile.in (SIM_OBJS): Add sim-load.o.
* interp.c (sim_kind, myname): New static locals.
(sim_open): Set sim_kind, myname. Ignore -E arg.
(sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
load file into simulator. Set start address from bfd.
(sim_create_inferior): Return SIM_RC. Delete arg start_address.
Wed Apr 16 18:06:50 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (OP_F010): SYS_execv, SYS_time, SYS_times, SYS_utime
only include if implemented by host.
Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
Fri Apr 4 20:01:56 1997 Ian Lance Taylor <ian@cygnus.com>
* Makefile.in: Change mn10200-opc.o to m10200-opc.o, to match
corresponding change in opcodes directory.
Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
* interp.c (sim_open): New arg `kind'.
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Thu Mar 20 20:28:14 1997 Jeffrey A Law (law@cygnus.com)
* mn10200_sim.h: Protect uses of "signed" to cater to broken
non-ansi compilers (HPs). Don't use #error for the same reason.
Tue Mar 18 12:23:31 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Don't sign-extend immediate for "mov imm16,an".
Simplify "sub" handling. Fix "mul" to properly sign extend
operands. Set CF appropriately for btst imm16,dn. Implement "rti".
* gencode.c: Delete unused "Opcodes" and "curop" variables.
Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* configure: Re-generate.
Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
* configure: Regenerate to track ../common/aclocal.m4 changes.
Thu Mar 13 12:53:14 1997 Doug Evans <dje@canuck.cygnus.com>
* interp.c (sim_open): New SIM_DESC result. Argument is now
in argv form.
(other sim_*): New SIM_DESC argument.
Wed Mar 12 15:02:35 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Fix typo for "bclr".
Wed Feb 26 16:46:13 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Handle new calling convention in emulated syscall
code.
Mon Feb 24 14:25:11 1997 Jeffrey A Law (law@cygnus.com)
* interp.c (load_mem_big): Add some missing parens.
Wed Feb 19 23:19:08 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Don't use "long long" data types for intermediate
values in "divu", "mul" and "mulu" instructions.
Fri Feb 14 02:46:46 1997 Jeffrey A Law (law@cygnus.com)
* interp.c (hash): Rework to be more efficient.
(dispatch): Renamed from lookup_hash. Dispatch to the target
function and update the PC here.
(load_mem_big): Now a macro.
(sim_resume): Restructure code to read an insn, determine its
length, call dispatch routines, etc to be much more efficient.
Fri Feb 7 12:59:36 1997 Jeffrey A Law (law@cygnus.com)
* interp.c (MAX_HASH): Redefine to 127.
(struct hash_entry): Add "count" field when HASH_STAT is defined.
(hash): Improve hashing for many heavily used opcodes.
(lookup_hash): Bump counters if HASH_STAT is defined.
(sim_open): Don't put the same opcode in the hash table more
than once. Clear counters if HASH_STAT is defined.
(sim_resume): After program exits, dump hash table stats if
HASH_STAT is defined.
Wed Feb 5 10:28:37 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Fix register extraction for "ext dn".
Tue Feb 4 17:27:41 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Fix register extractions for "movbu (an), dm".
Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
* Makefile.in (@COMMON_MAKEFILE_FRAG): Use
COMMON_{PRE,POST}_CONFIG_FRAG instead.
* configure.in: sinclude ../common/aclocal.m4.
* configure: Regenerated.
Fri Jan 31 01:19:02 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Get carry-in bit right for rol. Just clear the
NF flag for btst imm8,dn.
Wed Jan 29 15:47:42 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Properly compute ZF flag for many insns.
Sat Jan 25 17:06:55 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Properly truncate divisor and dividend before
performing "divu" operation.
Fri Jan 24 10:47:48 1997 Jeffrey A Law (law@cygnus.com)
* simops.c (init_system): Allocate 2^19 bytes of space for
the simulator.
Thu Jan 23 21:17:33 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Rework code to extract arguments for emulated
syscalls to handle 24bit pointers.
Thu Jan 23 14:06:04 1997 Stu Grossman (grossman@critters.cygnus.com)
* configure configure.in Makefile.in: Update to new configure
scheme which is more compatible with WinGDB builds.
* configure.in: Improve comment on how to run autoconf.
* configure: Re-run autoconf to get new ../common/aclocal.m4.
* Makefile.in: Use autoconf substitution to install common
makefile fragment.
Thu Jan 23 12:04:38 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Fix destination register for "mov (abs24),an".
Tue Jan 21 15:59:21 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: "rts" adds 4 to the stack pointer.
* simops.c: Fix CF and CX computation for add instructions.
* simops.c: Leave the upper 8 bits alone for logical ops.
Mask off high 8 bits before doing any shifts/rotates.
Fix carry bit handling in rotates again.
Mon Jan 20 10:45:08 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Don't lose the sign bit for "asr".
Fri Jan 17 01:45:14 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Fix overflow computation for "cmp" and "sub"
instructions.
* simops.c: Use the right register for "jmp (an)" and "jsr (an)".
* interp.c (hash): Improve hashing for 3 byte instructions.
* simops.c: Fix extraction of 16/24bit immediates for some
instructions. "cmp" instructions only modify the PSW.
Fix various thinkos when extracting register operands too.
Thu Jan 16 07:47:56 1997 Jeffrey A Law (law@cygnus.com)
* simops.c: Fix "rol" and "ror".
* simops.c: Truncate PC to 24bits after modifying it.
Closer stab at emulated system calls.
Tue Jan 14 12:33:12 1997 Jeffrey A Law (law@cygnus.com)
* interp.c (hash): Improve hashing of two byte insns.
(store_mem): Handle storing 3 byte quantities.
* simops.c: Fix various typos/thinkos.
* interp.c (load_mem_big, load_mem, store_mem): Fix thinko in
code to handle 24bit addresses.
* simops.c (REG0_8, REG0_16): Fix typo.
Mon Jan 6 16:17:09 1997 Jeffrey A Law (law@cygnus.com)
* mn10200_sim.h: Various fixes for mixed 16/24bit architecture.
* interp.c: Similarly.
* simops.c: Similarly.
* Makefile.in, config.in, configure, configure.in: New files.
* gencode.c, interp.c, mn10200_sim.h, simops.c: New files.

52
sim/mn10200/Makefile.in
View file

@ -1,52 +0,0 @@
# Makefile template for Configure for the mn10200 sim library.
# Copyright (C) 1997 Free Software Foundation, Inc.
# Written by Cygnus Support.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
## COMMON_PRE_CONFIG_FRAG
SIM_OBJS = interp.o table.o simops.o sim-load.o
SIM_EXTRA_CFLAGS = -I$(srcdir)/../../newlib/libc/sys/sysmec -DNEED_UI_LOOP_HOOK
SIM_EXTRA_CLEAN = clean-extra
# Select mn10200 support in nltvals.def.
NL_TARGET = -DNL_TARGET_mn10200
INCLUDE = mn10200_sim.h $(srcdir)/../../include/gdb/callback.h
## COMMON_POST_CONFIG_FRAG
simops.h: gencode
./gencode -h >$@
table.c: gencode simops.h
./gencode >$@
gencode.o: gencode.c $(INCLUDE)
$(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gencode.c
m10200-opc.o: $(srcdir)/../../opcodes/m10200-opc.c
$(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/../../opcodes/m10200-opc.c
gencode: gencode.o m10200-opc.o
$(CC_FOR_BUILD) $(BUILD_CFLAGS) -o gencode gencode.o m10200-opc.o $(BUILD_LIB)
clean-extra:
rm -f table.c simops.h gencode
interp.o: interp.c table.c $(INCLUDE)
simops.o: simops.c simops.h $(INCLUDE)
table.o: table.c

15
sim/mn10200/acconfig.h
View file

@ -1,15 +0,0 @@
/* Define to 1 if NLS is requested. */
#undef ENABLE_NLS
/* Define as 1 if you have catgets and don't want to use GNU gettext. */
#undef HAVE_CATGETS
/* Define as 1 if you have gettext and don't want to use GNU gettext. */
#undef HAVE_GETTEXT
/* Define as 1 if you have the stpcpy function. */
#undef HAVE_STPCPY
/* Define if your locale.h file contains LC_MESSAGES. */
#undef HAVE_LC_MESSAGES

158
sim/mn10200/config.in
View file

@ -1,158 +0,0 @@
/* config.in. Generated automatically from configure.in by autoheader. */
/* Define if using alloca.c. */
#undef C_ALLOCA
/* Define to empty if the keyword does not work. */
#undef const
/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
This function is required for alloca.c support on those systems. */
#undef CRAY_STACKSEG_END
/* Define if you have alloca, as a function or macro. */
#undef HAVE_ALLOCA
/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
#undef HAVE_ALLOCA_H
/* Define if you have a working `mmap' system call. */
#undef HAVE_MMAP
/* Define as __inline if that's what the C compiler calls it. */
#undef inline
/* Define to `long' if <sys/types.h> doesn't define. */
#undef off_t
/* Define if you need to in order for stat and other things to work. */
#undef _POSIX_SOURCE
/* Define as the return type of signal handlers (int or void). */
#undef RETSIGTYPE
/* Define to `unsigned' if <sys/types.h> doesn't define. */
#undef size_t
/* If using the C implementation of alloca, define if you know the
direction of stack growth for your system; otherwise it will be
automatically deduced at run-time.
STACK_DIRECTION > 0 => grows toward higher addresses
STACK_DIRECTION < 0 => grows toward lower addresses
STACK_DIRECTION = 0 => direction of growth unknown
*/
#undef STACK_DIRECTION
/* Define if you have the ANSI C header files. */
#undef STDC_HEADERS
/* Define to 1 if NLS is requested. */
#undef ENABLE_NLS
/* Define as 1 if you have gettext and don't want to use GNU gettext. */
#undef HAVE_GETTEXT
/* Define as 1 if you have the stpcpy function. */
#undef HAVE_STPCPY
/* Define if your locale.h file contains LC_MESSAGES. */
#undef HAVE_LC_MESSAGES
/* Define if you have the __argz_count function. */
#undef HAVE___ARGZ_COUNT
/* Define if you have the __argz_next function. */
#undef HAVE___ARGZ_NEXT
/* Define if you have the __argz_stringify function. */
#undef HAVE___ARGZ_STRINGIFY
/* Define if you have the __setfpucw function. */
#undef HAVE___SETFPUCW
/* Define if you have the dcgettext function. */
#undef HAVE_DCGETTEXT
/* Define if you have the getcwd function. */
#undef HAVE_GETCWD
/* Define if you have the getpagesize function. */
#undef HAVE_GETPAGESIZE
/* Define if you have the getrusage function. */
#undef HAVE_GETRUSAGE
/* Define if you have the munmap function. */
#undef HAVE_MUNMAP
/* Define if you have the putenv function. */
#undef HAVE_PUTENV
/* Define if you have the setenv function. */
#undef HAVE_SETENV
/* Define if you have the setlocale function. */
#undef HAVE_SETLOCALE
/* Define if you have the sigaction function. */
#undef HAVE_SIGACTION
/* Define if you have the stpcpy function. */
#undef HAVE_STPCPY
/* Define if you have the strcasecmp function. */
#undef HAVE_STRCASECMP
/* Define if you have the strchr function. */
#undef HAVE_STRCHR
/* Define if you have the time function. */
#undef HAVE_TIME
/* Define if you have the <argz.h> header file. */
#undef HAVE_ARGZ_H
/* Define if you have the <fcntl.h> header file. */
#undef HAVE_FCNTL_H
/* Define if you have the <fpu_control.h> header file. */
#undef HAVE_FPU_CONTROL_H
/* Define if you have the <limits.h> header file. */
#undef HAVE_LIMITS_H
/* Define if you have the <locale.h> header file. */
#undef HAVE_LOCALE_H
/* Define if you have the <malloc.h> header file. */
#undef HAVE_MALLOC_H
/* Define if you have the <nl_types.h> header file. */
#undef HAVE_NL_TYPES_H
/* Define if you have the <stdlib.h> header file. */
#undef HAVE_STDLIB_H
/* Define if you have the <string.h> header file. */
#undef HAVE_STRING_H
/* Define if you have the <strings.h> header file. */
#undef HAVE_STRINGS_H
/* Define if you have the <sys/param.h> header file. */
#undef HAVE_SYS_PARAM_H
/* Define if you have the <sys/resource.h> header file. */
#undef HAVE_SYS_RESOURCE_H
/* Define if you have the <sys/time.h> header file. */
#undef HAVE_SYS_TIME_H
/* Define if you have the <time.h> header file. */
#undef HAVE_TIME_H
/* Define if you have the <unistd.h> header file. */
#undef HAVE_UNISTD_H
/* Define if you have the <values.h> header file. */
#undef HAVE_VALUES_H

4024
sim/mn10200/configure vendored
View file

File diff suppressed because it is too large Load diff

10
sim/mn10200/configure.in
View file

@ -1,10 +0,0 @@
dnl Process this file with autoconf to produce a configure script.
sinclude(../common/aclocal.m4)
AC_PREREQ(2.5)dnl
AC_INIT(Makefile.in)
SIM_AC_COMMON
AC_CHECK_HEADERS(unistd.h)
SIM_AC_OUTPUT

154
sim/mn10200/gencode.c
View file

@ -1,154 +0,0 @@
#include "mn10200_sim.h"
static void write_header PARAMS ((void));
static void write_opcodes PARAMS ((void));
static void write_template PARAMS ((void));
int
main (argc, argv)
int argc;
char *argv[];
{
if ((argc > 1) && (strcmp (argv[1], "-h") == 0))
write_header();
else if ((argc > 1) && (strcmp (argv[1], "-t") == 0))
write_template ();
else
write_opcodes();
return 0;
}
static void
write_header ()
{
struct mn10200_opcode *opcode;
for (opcode = (struct mn10200_opcode *)mn10200_opcodes; opcode->name; opcode++)
printf("void OP_%X PARAMS ((unsigned long, unsigned long));\t\t/* %s */\n",
opcode->opcode, opcode->name);
}
/* write_template creates a file all required functions, ready */
/* to be filled out */
static void
write_template ()
{
struct mn10200_opcode *opcode;
int i,j;
printf ("#include \"mn10200_sim.h\"\n");
printf ("#include \"simops.h\"\n");
for (opcode = (struct mn10200_opcode *)mn10200_opcodes; opcode->name; opcode++)
{
printf("/* %s */\nvoid\nOP_%X (insn, extension)\n unsigned long insn, extension;\n{\n", opcode->name, opcode->opcode);
/* count operands */
j = 0;
for (i = 0; i < 6; i++)
{
int flags = mn10200_operands[opcode->operands[i]].flags;
if (flags)
j++;
}
switch (j)
{
case 0:
printf ("printf(\" %s\\n\");\n", opcode->name);
break;
case 1:
printf ("printf(\" %s\\t%%x\\n\", OP[0]);\n", opcode->name);
break;
case 2:
printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",
opcode->name);
break;
case 3:
printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",
opcode->name);
break;
default:
fprintf (stderr,"Too many operands: %d\n", j);
}
printf ("}\n\n");
}
}
static void
write_opcodes ()
{
struct mn10200_opcode *opcode;
int i, j;
int numops;
/* write out opcode table */
printf ("#include \"mn10200_sim.h\"\n");
printf ("#include \"simops.h\"\n\n");
printf ("struct simops Simops[] = {\n");
for (opcode = (struct mn10200_opcode *)mn10200_opcodes; opcode->name; opcode++)
{
int size;
if (opcode->format == FMT_1)
size = 1;
else if (opcode->format == FMT_2 || opcode->format == FMT_4)
size = 2;
else if (opcode->format == FMT_3 || opcode->format == FMT_5)
size = 3;
else if (opcode->format == FMT_6)
size = 4;
else if (opcode->format == FMT_7)
size = 5;
else
abort ();
printf (" { 0x%x,0x%x,OP_%X,%d,%d,",
opcode->opcode, opcode->mask, opcode->opcode,
size, opcode->format);
/* count operands */
j = 0;
for (i = 0; i < 6; i++)
{
int flags = mn10200_operands[opcode->operands[i]].flags;
if (flags)
j++;
}
printf ("%d,{",j);
j = 0;
numops = 0;
for (i = 0; i < 6; i++)
{
int flags = mn10200_operands[opcode->operands[i]].flags;
int shift = mn10200_operands[opcode->operands[i]].shift;
if (flags)
{
if (j)
printf (", ");
printf ("%d,%d,%d", shift,
mn10200_operands[opcode->operands[i]].bits,flags);
j = 1;
numops++;
}
}
switch (numops)
{
case 0:
printf ("0,0,0");
case 1:
printf (",0,0,0");
}
printf ("}},\n");
}
printf ("{ 0,0,NULL,0,0,0,{0,0,0,0,0,0}},\n};\n");
}

820
sim/mn10200/interp.c
View file

@ -1,820 +0,0 @@
#include <signal.h>
#include "sysdep.h"
#include "bfd.h"
#include "mn10200_sim.h"
#ifdef NEED_UI_LOOP_HOOK
/* How often to run the ui_loop update, when in use */
#define UI_LOOP_POLL_INTERVAL 0x60000
/* Counter for the ui_loop_hook update */
static long ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
/* Actual hook to call to run through gdb's gui event loop */
extern int (*deprecated_ui_loop_hook) (int);
#endif /* NEED_UI_LOOP_HOOK */
host_callback *mn10200_callback;
int mn10200_debug;
static SIM_OPEN_KIND sim_kind;
static char *myname;
static void dispatch PARAMS ((uint32, uint32, int));
static long hash PARAMS ((long));
static void init_system PARAMS ((void));
#define MAX_HASH 127
struct hash_entry
{
struct hash_entry *next;
long opcode;
long mask;
struct simops *ops;
#ifdef HASH_STAT
unsigned long count;
#endif
};
int max_mem = 0;
struct hash_entry hash_table[MAX_HASH+1];
/* This probably doesn't do a very good job at bucket filling, but
it's simple... */
static INLINE long
hash(insn)
long insn;
{
/* These are one byte insns. */
if ((insn & 0xffffff00) == 0x00)
{
if ((insn & 0xf0) != 0x80)
return ((insn & 0xf0) >> 4) & 0x7f;
if ((insn & 0xf0) == 0x80
&& (insn & 0x0c) >> 2 != (insn & 0x03))
return (insn & 0xf0) & 0x7f;
return (insn & 0xff) & 0x7f;
}
if ((insn & 0xffff0000) == 0)
{
if ((insn & 0xf000) == 0xd000)
return ((insn & 0xfc00) >> 10) & 0x7f;
if ((insn & 0xf000) == 0xe000)
return ((insn & 0xff00) >> 8) & 0x7f;
if ((insn & 0xf200) == 0xf200)
return ((insn & 0xfff0) >> 4) & 0x7f;
if ((insn & 0xc000) == 0x4000
|| (insn & 0xf000) == 0x8000)
return ((insn & 0xf000) >> 8) & 0x7f;
if ((insn & 0xf200) == 0xf000)
return ((insn & 0xffc0) >> 8) & 0x7f;
return ((insn & 0xff00) >> 8) & 0x7f;
}
if ((insn & 0xff000000) == 0)
{
if ((insn & 0xf00000) != 0xf00000
|| (insn & 0xfc0000) == 0xf80000)
return ((insn & 0xfc0000) >> 16) & 0x7f;
if ((insn & 0xff0000) == 0xf50000)
return ((insn & 0xfff000) >> 12) & 0x7f;
return ((insn & 0xff0000) >> 16) & 0x7f;
}
return ((insn & 0xfff0000) >> 20) & 0x7f;
}
static INLINE void
dispatch (insn, extension, length)
uint32 insn;
uint32 extension;
int length;
{
struct hash_entry *h;
h = &hash_table[hash(insn)];
while ((insn & h->mask) != h->opcode
|| (length != h->ops->length))
{
if (!h->next)
{
(*mn10200_callback->printf_filtered) (mn10200_callback,
"ERROR looking up hash for 0x%x, PC=0x%x\n", insn, PC);
exit(1);
}
h = h->next;
}
#ifdef HASH_STAT
h->count++;
#endif
/* Now call the right function. */
(h->ops->func)(insn, extension);
PC += length;
}
/* FIXME These would more efficient to use than load_mem/store_mem,
but need to be changed to use the memory map. */
uint32
get_word (x)
uint8 *x;
{
uint8 *a = x;
return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
}
void
put_word (addr, data)
uint8 *addr;
uint32 data;
{
uint8 *a = addr;
a[0] = data & 0xff;
a[1] = (data >> 8) & 0xff;
a[2] = (data >> 16) & 0xff;
a[3] = (data >> 24) & 0xff;
}
void
sim_size (power)
int power;
{
if (State.mem)
free (State.mem);
max_mem = 1 << power;
State.mem = (uint8 *) calloc (1, 1 << power);
if (!State.mem)
{
(*mn10200_callback->printf_filtered) (mn10200_callback, "Allocation of main memory failed.\n");
exit (1);
}
}
static void
init_system ()
{
if (!State.mem)
sim_size(19);
}
int
sim_write (sd,addr, buffer, size)
SIM_DESC sd;
SIM_ADDR addr;
unsigned char *buffer;
int size;
{
int i;
init_system ();
for (i = 0; i < size; i++)
store_byte (addr + i, buffer[i]);
return size;
}
/* Compare two opcode table entries for qsort. */
static int
compare_simops (arg1, arg2)
const PTR arg1;
const PTR arg2;
{
unsigned long code1 = ((struct simops *)arg1)->opcode;
unsigned long code2 = ((struct simops *)arg2)->opcode;
if (code1 < code2)
return -1;
if (code2 < code1)
return 1;
return 0;
}
SIM_DESC
sim_open (kind, cb, abfd, argv)
SIM_OPEN_KIND kind;
host_callback *cb;
struct bfd *abfd;
char **argv;
{
struct simops *s;
struct hash_entry *h;
char **p;
int i;
mn10200_callback = cb;
/* Sort the opcode array from smallest opcode to largest.
This will generally improve simulator performance as the smaller
opcodes are generally preferred to the larger opcodes. */
for (i = 0, s = Simops; s->func; s++, i++)
;
qsort (Simops, i, sizeof (Simops[0]), compare_simops);
sim_kind = kind;
myname = argv[0];
for (p = argv + 1; *p; ++p)
{
if (strcmp (*p, "-E") == 0)
++p; /* ignore endian spec */
else
#ifdef DEBUG
if (strcmp (*p, "-t") == 0)
mn10200_debug = DEBUG;
else
#endif
(*mn10200_callback->printf_filtered) (mn10200_callback, "ERROR: unsupported option(s): %s\n",*p);
}
/* put all the opcodes in the hash table */
for (s = Simops; s->func; s++)
{
h = &hash_table[hash(s->opcode)];
/* go to the last entry in the chain */
while (h->next)
{
/* Don't insert the same opcode more than once. */
if (h->opcode == s->opcode
&& h->mask == s->mask
&& h->ops == s)
break;
else
h = h->next;
}
/* Don't insert the same opcode more than once. */
if (h->opcode == s->opcode
&& h->mask == s->mask
&& h->ops == s)
continue;
if (h->ops)
{
h->next = calloc(1,sizeof(struct hash_entry));
h = h->next;
}
h->ops = s;
h->mask = s->mask;
h->opcode = s->opcode;
#ifdef HASH_STAT
h->count = 0;
#endif
}
/* fudge our descriptor for now */
return (SIM_DESC) 1;
}
void
sim_set_profile (n)
int n;
{
(*mn10200_callback->printf_filtered) (mn10200_callback, "sim_set_profile %d\n", n);
}
void
sim_set_profile_size (n)
int n;
{
(*mn10200_callback->printf_filtered) (mn10200_callback, "sim_set_profile_size %d\n", n);
}
int
sim_stop (sd)
SIM_DESC sd;
{
State.exception = SIGINT;
return 1;
}
void
sim_resume (sd, step, siggnal)
SIM_DESC sd;
int step, siggnal;
{
uint32 inst;
if (step)
State.exception = SIGTRAP;
else
State.exception = 0;
State.exited = 0;
do
{
unsigned long insn, extension;
#ifdef NEED_UI_LOOP_HOOK
if (deprecated_ui_loop_hook != NULL && ui_loop_hook_counter-- < 0)
{
ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
deprecated_ui_loop_hook (0);
}
#endif /* NEED_UI_LOOP_HOOK */
/* Fetch the current instruction, fetch a double word to
avoid redundant fetching for the common cases below. */
inst = load_mem_big (PC, 2);
/* Using a giant case statement may seem like a waste because of the
code/rodata size the table itself will consume. However, using
a giant case statement speeds up the simulator by 10-15% by avoiding
cascading if/else statements or cascading case statements. */
switch ((inst >> 8) & 0xff)
{
/* All the single byte insns except 0x80, which must
be handled specially. */
case 0x00:
case 0x01:
case 0x02:
case 0x03:
case 0x04:
case 0x05:
case 0x06:
case 0x07:
case 0x08:
case 0x09:
case 0x0a:
case 0x0b:
case 0x0c:
case 0x0d:
case 0x0e:
case 0x0f:
case 0x10:
case 0x11:
case 0x12:
case 0x13:
case 0x14:
case 0x15:
case 0x16:
case 0x17:
case 0x18:
case 0x19:
case 0x1a:
case 0x1b:
case 0x1c:
case 0x1d:
case 0x1e:
case 0x1f:
case 0x20:
case 0x21:
case 0x22:
case 0x23:
case 0x24:
case 0x25:
case 0x26:
case 0x27:
case 0x28:
case 0x29:
case 0x2a:
case 0x2b:
case 0x2c:
case 0x2d:
case 0x2e:
case 0x2f:
case 0x30:
case 0x31:
case 0x32:
case 0x33:
case 0x34:
case 0x35:
case 0x36:
case 0x37:
case 0x38:
case 0x39:
case 0x3a:
case 0x3b:
case 0x3c:
case 0x3d:
case 0x3e:
case 0x3f:
case 0x90:
case 0x91:
case 0x92:
case 0x93:
case 0x94:
case 0x95:
case 0x96:
case 0x97:
case 0x98:
case 0x99:
case 0x9a:
case 0x9b:
case 0x9c:
case 0x9d:
case 0x9e:
case 0x9f:
case 0xa0:
case 0xa1:
case 0xa2:
case 0xa3:
case 0xa4:
case 0xa5:
case 0xa6:
case 0xa7:
case 0xa8:
case 0xa9:
case 0xaa:
case 0xab:
case 0xac:
case 0xad:
case 0xae:
case 0xaf:
case 0xb0:
case 0xb1:
case 0xb2:
case 0xb3:
case 0xb4:
case 0xb5:
case 0xb6:
case 0xb7:
case 0xb8:
case 0xb9:
case 0xba:
case 0xbb:
case 0xbc:
case 0xbd:
case 0xbe:
case 0xbf:
case 0xeb:
case 0xf6:
case 0xfe:
case 0xff:
insn = (inst >> 8) & 0xff;
extension = 0;
dispatch (insn, extension, 1);
break;
/* Special case as mov dX,dX really means mov imm8,dX. */
case 0x80:
case 0x85:
case 0x8a:
case 0x8f:
/* Fetch the full instruction. */
insn = inst;
extension = 0;
dispatch (insn, extension, 2);
break;
case 0x81:
case 0x82:
case 0x83:
case 0x84:
case 0x86:
case 0x87:
case 0x88:
case 0x89:
case 0x8b:
case 0x8c:
case 0x8d:
case 0x8e:
insn = (inst >> 8) & 0xff;
extension = 0;
dispatch (insn, extension, 1);
break;
/* And the two byte insns. */
case 0x40:
case 0x41:
case 0x42:
case 0x43:
case 0x44:
case 0x45:
case 0x46:
case 0x47:
case 0x48:
case 0x49:
case 0x4a:
case 0x4b:
case 0x4c:
case 0x4d:
case 0x4e:
case 0x4f:
case 0x50:
case 0x51:
case 0x52:
case 0x53:
case 0x54:
case 0x55:
case 0x56:
case 0x57:
case 0x58:
case 0x59:
case 0x5a:
case 0x5b:
case 0x5c:
case 0x5d:
case 0x5e:
case 0x5f:
case 0x60:
case 0x61:
case 0x62:
case 0x63:
case 0x64:
case 0x65:
case 0x66:
case 0x67:
case 0x68:
case 0x69:
case 0x6a:
case 0x6b:
case 0x6c:
case 0x6d:
case 0x6e:
case 0x6f:
case 0x70:
case 0x71:
case 0x72:
case 0x73:
case 0x74:
case 0x75:
case 0x76:
case 0x77:
case 0x78:
case 0x79:
case 0x7a:
case 0x7b:
case 0x7c:
case 0x7d:
case 0x7e:
case 0x7f:
case 0xd0:
case 0xd1:
case 0xd2:
case 0xd3:
case 0xd4:
case 0xd5:
case 0xd6:
case 0xd7:
case 0xd8:
case 0xd9:
case 0xda:
case 0xdb:
case 0xe0:
case 0xe1:
case 0xe2:
case 0xe3:
case 0xe4:
case 0xe5:
case 0xe6:
case 0xe7:
case 0xe8:
case 0xe9:
case 0xea:
case 0xf0:
case 0xf1:
case 0xf2:
case 0xf3:
/* Fetch the full instruction. */
insn = inst;
extension = 0;
dispatch (insn, extension, 2);
break;
/* And the 3 byte insns with a 16bit operand in little
endian format. */
case 0xc0:
case 0xc1:
case 0xc2:
case 0xc3:
case 0xc4:
case 0xc5:
case 0xc6:
case 0xc7:
case 0xc8:
case 0xc9:
case 0xca:
case 0xcb:
case 0xcc:
case 0xcd:
case 0xce:
case 0xcf:
case 0xdc:
case 0xdd:
case 0xde:
case 0xdf:
case 0xec:
case 0xed:
case 0xee:
case 0xef:
case 0xf8:
case 0xf9:
case 0xfa:
case 0xfb:
case 0xfc:
case 0xfd:
insn = load_byte (PC);
insn <<= 16;
insn |= load_half (PC + 1);
extension = 0;
dispatch (insn, extension, 3);
break;
/* 3 byte insns without 16bit operand. */
case 0xf5:
insn = load_mem_big (PC, 3);
extension = 0;
dispatch (insn, extension, 3);
break;
/* 4 byte insns. */
case 0xf7:
insn = inst;
insn <<= 16;
insn |= load_half (PC + 2);
extension = 0;
dispatch (insn, extension, 4);
break;
case 0xf4:
insn = inst;
insn <<= 16;
insn |= load_mem_big (PC + 4, 1) << 8;
insn |= load_mem_big (PC + 3, 1);
extension = load_mem_big (PC + 2, 1);
dispatch (insn, extension, 5);
break;
default:
abort ();
}
}
while (!State.exception);
#ifdef HASH_STAT
{
int i;
for (i = 0; i < MAX_HASH; i++)
{
struct hash_entry *h;
h = &hash_table[i];
printf("hash 0x%x:\n", i);
while (h)
{
printf("h->opcode = 0x%x, count = 0x%x\n", h->opcode, h->count);
h = h->next;
}
printf("\n\n");
}
fflush (stdout);
}
#endif
}
void
sim_close (sd, quitting)
SIM_DESC sd;
int quitting;
{
/* nothing to do */
}
int
sim_trace (sd)
SIM_DESC sd;
{
#ifdef DEBUG
mn10200_debug = DEBUG;
#endif
sim_resume (sd, 0, 0);
return 1;
}
void
sim_info (sd, verbose)
SIM_DESC sd;
int verbose;
{
(*mn10200_callback->printf_filtered) (mn10200_callback, "sim_info\n");
}
SIM_RC
sim_create_inferior (sd, abfd, argv, env)
SIM_DESC sd;
struct bfd *abfd;
char **argv;
char **env;
{
if (abfd != NULL)
PC = bfd_get_start_address (abfd);
else
PC = 0;
return SIM_RC_OK;
}
void
sim_set_callbacks (p)
host_callback *p;
{
mn10200_callback = p;
}
/* All the code for exiting, signals, etc needs to be revamped.
This is enough to get c-torture limping though. */
void
sim_stop_reason (sd, reason, sigrc)
SIM_DESC sd;
enum sim_stop *reason;
int *sigrc;
{
if (State.exited)
*reason = sim_exited;
else
*reason = sim_stopped;
if (State.exception == SIGQUIT)
*sigrc = 0;
else
*sigrc = State.exception;
}
int
sim_fetch_register (sd, rn, memory, length)
SIM_DESC sd;
int rn;
unsigned char *memory;
int length;
{
put_word (memory, State.regs[rn]);
return -1;
}
int
sim_store_register (sd, rn, memory, length)
SIM_DESC sd;
int rn;
unsigned char *memory;
int length;
{
State.regs[rn] = get_word (memory);
return -1;
}
int
sim_read (sd, addr, buffer, size)
SIM_DESC sd;
SIM_ADDR addr;
unsigned char *buffer;
int size;
{
int i;
for (i = 0; i < size; i++)
buffer[i] = load_byte (addr + i);
return size;
}
void
sim_do_command (sd, cmd)
SIM_DESC sd;
char *cmd;
{
(*mn10200_callback->printf_filtered) (mn10200_callback, "\"%s\" is not a valid mn10200 simulator command.\n", cmd);
}
SIM_RC
sim_load (sd, prog, abfd, from_tty)
SIM_DESC sd;
char *prog;
bfd *abfd;
int from_tty;
{
extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
bfd *prog_bfd;
prog_bfd = sim_load_file (sd, myname, mn10200_callback, prog, abfd,
sim_kind == SIM_OPEN_DEBUG,
0, sim_write);
if (prog_bfd == NULL)
return SIM_RC_FAIL;
if (abfd == NULL)
bfd_close (prog_bfd);
return SIM_RC_OK;
}

297
sim/mn10200/mn10200_sim.h
View file

@ -1,297 +0,0 @@
#include <stdio.h>
#include <ctype.h>
#include "ansidecl.h"
#include "gdb/callback.h"
#include "opcode/mn10200.h"
#include <limits.h>
#include "gdb/remote-sim.h"
#ifndef INLINE
#ifdef __GNUC__
#define INLINE inline
#else
#define INLINE
#endif
#endif
extern host_callback *mn10200_callback;
#define DEBUG_TRACE 0x00000001
#define DEBUG_VALUES 0x00000002
extern int mn10200_debug;
#ifdef __STDC__
#define SIGNED signed
#else
#define SIGNED
#endif
#if UCHAR_MAX == 255
typedef unsigned char uint8;
typedef SIGNED char int8;
#else
error "Char is not an 8-bit type"
#endif
#if SHRT_MAX == 32767
typedef unsigned short uint16;
typedef SIGNED short int16;
#else
error "Short is not a 16-bit type"
#endif
#if INT_MAX == 2147483647
typedef unsigned int uint32;
typedef SIGNED int int32;
#else
# if LONG_MAX == 2147483647
typedef unsigned long uint32;
typedef SIGNED long int32;
# else
error "Neither int nor long is a 32-bit type"
# endif
#endif
typedef uint32 reg_t;
struct simops
{
long opcode;
long mask;
void (*func)();
int length;
int format;
int numops;
int operands[16];
};
/* The current state of the processor; registers, memory, etc. */
struct _state
{
reg_t regs[11]; /* registers, d0-d3, a0-a3, pc, mdr, psw */
uint8 *mem; /* main memory */
int exception; /* Actually a signal number. */
int exited; /* Did the program exit? */
} State;
extern uint32 OP[4];
extern struct simops Simops[];
#define PC (State.regs[8])
#define PSW (State.regs[10])
#define PSW_ZF 0x1
#define PSW_NF 0x2
#define PSW_CF 0x4
#define PSW_VF 0x8
#define PSW_ZX 0x10
#define PSW_NX 0x20
#define PSW_CX 0x40
#define PSW_VX 0x80
#define REG_D0 0
#define REG_A0 4
#define REG_SP 7
#define REG_PC 8
#define REG_MDR 9
#define REG_PSW 10
#define SEXT3(x) ((((x)&0x7)^(~0x3))+0x4)
/* sign-extend a 4-bit number */
#define SEXT4(x) ((((x)&0xf)^(~0x7))+0x8)
/* sign-extend a 5-bit number */
#define SEXT5(x) ((((x)&0x1f)^(~0xf))+0x10)
/* sign-extend an 8-bit number */
#define SEXT8(x) ((((x)&0xff)^(~0x7f))+0x80)
/* sign-extend a 9-bit number */
#define SEXT9(x) ((((x)&0x1ff)^(~0xff))+0x100)
/* sign-extend a 16-bit number */
#define SEXT16(x) ((((x)&0xffff)^(~0x7fff))+0x8000)
/* sign-extend a 22-bit number */
#define SEXT22(x) ((((x)&0x3fffff)^(~0x1fffff))+0x200000)
/* sign-extend a 24-bit number */
#define SEXT24(x) ((((x)&0xffffff)^(~0x7fffff))+0x800000)
#ifdef _WIN32
#define SIGTRAP 5
#define SIGQUIT 3
#endif
extern int max_mem;
#define load_mem_big(addr,len) \
(len == 1 ? *(((addr) & 0xffffff) + State.mem) : \
len == 2 ? ((*(((addr) & 0xffffff) + State.mem) << 8) \
| *((((addr) + 1) & 0xffffff) + State.mem)) : \
((*(((addr) & 0xffffff) + State.mem) << 16) \
| (*((((addr) + 1) & 0xffffff) + State.mem) << 8) \
| *((((addr) + 2) & 0xffffff) + State.mem)))
static INLINE uint32
load_byte (addr)
SIM_ADDR addr;
{
uint8 *p = (addr & 0xffffff) + State.mem;
#ifdef CHECK_ADDR
if ((addr & 0xffffff) > max_mem)
abort ();
#endif
return p[0];
}
static INLINE uint32
load_half (addr)
SIM_ADDR addr;
{
uint8 *p = (addr & 0xffffff) + State.mem;
#ifdef CHECK_ADDR
if ((addr & 0xffffff) > max_mem)
abort ();
#endif
return p[1] << 8 | p[0];
}
static INLINE uint32
load_3_byte (addr)
SIM_ADDR addr;
{
uint8 *p = (addr & 0xffffff) + State.mem;
#ifdef CHECK_ADDR
if ((addr & 0xffffff) > max_mem)
abort ();
#endif
return p[2] << 16 | p[1] << 8 | p[0];
}
static INLINE uint32
load_word (addr)
SIM_ADDR addr;
{
uint8 *p = (addr & 0xffffff) + State.mem;
#ifdef CHECK_ADDR
if ((addr & 0xffffff) > max_mem)
abort ();
#endif
return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
}
static INLINE uint32
load_mem (addr, len)
SIM_ADDR addr;
int len;
{
uint8 *p = (addr & 0xffffff) + State.mem;
#ifdef CHECK_ADDR
if ((addr & 0xffffff) > max_mem)
abort ();
#endif
switch (len)
{
case 1:
return p[0];
case 2:
return p[1] << 8 | p[0];
case 3:
return p[2] << 16 | p[1] << 8 | p[0];
case 4:
return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
default:
abort ();
}
}
static INLINE void
store_byte (addr, data)
SIM_ADDR addr;
uint32 data;
{
uint8 *p = (addr & 0xffffff) + State.mem;
#ifdef CHECK_ADDR
if ((addr & 0xffffff) > max_mem)
abort ();
#endif
p[0] = data;
}
static INLINE void
store_half (addr, data)
SIM_ADDR addr;
uint32 data;
{
uint8 *p = (addr & 0xffffff) + State.mem;
#ifdef CHECK_ADDR
if ((addr & 0xffffff) > max_mem)
abort ();
#endif
p[0] = data;
p[1] = data >> 8;
}
static INLINE void
store_3_byte (addr, data)
SIM_ADDR addr;
uint32 data;
{
uint8 *p = (addr & 0xffffff) + State.mem;
#ifdef CHECK_ADDR
if ((addr & 0xffffff) > max_mem)
abort ();
#endif
p[0] = data;
p[1] = data >> 8;
p[2] = data >> 16;
}
static INLINE void
store_word (addr, data)
SIM_ADDR addr;
uint32 data;
{
uint8 *p = (addr & 0xffffff) + State.mem;
#ifdef CHECK_ADDR
if ((addr & 0xffffff) > max_mem)
abort ();
#endif
p[0] = data;
p[1] = data >> 8;
p[2] = data >> 16;
p[3] = data >> 24;
}
/* Function declarations. */
uint32 get_word PARAMS ((uint8 *));
void put_word PARAMS ((uint8 *, uint32));
extern uint8 *map PARAMS ((SIM_ADDR addr));

2449
sim/mn10200/simops.c
View file

File diff suppressed because it is too large Load diff

514
sim/z8k/ChangeLog
View file

@ -1,514 +0,0 @@
2003-02-27 Andrew Cagney <cagney@redhat.com>
* iface.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
2002-06-16 Andrew Cagney <ac131313@redhat.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
2002-06-09 Andrew Cagney <cagney@redhat.com>
* iface.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
* support.c: Ditto.
2002-06-06 Andrew Cagney <ac131313@redhat.com>
* writecode.c (lookup_inst): Generate inverse table on-the-fly.
(z8k_inv_list): Delete global.
(DIRTY_HACK): Delete macro.
(makelist): Delete global.
(main): Delete code making a list. Delete dirty hack code. Use
lookup_inst instead of z8k_inv_list.
* list.c: Delete file.
* Makefile.in (writecode): Do not link in list.o.
(list.o): Delete target.
2002-04-29 Nick Clifton <nickc@cambridge.redhat.com>
* writecode.c (lookup_inst): Ignore CLASS_IGNORE.
(info_args): Treat CLASS_IGNORE like CLASS_BIT.
Handle ARG_NIM4.
(info_len_in_words): Handle CLASS_IGNORE and ARG_NIM4.
Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Nov 25 18:22:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
* support.c: Include <errno.h>
Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
Sun Apr 26 15:18:45 1998 Tom Tromey <tromey@cygnus.com>
* acconfig.h: New file.
* configure.in: Reverted change of Apr 24; use sinclude again.
Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
Fri Apr 24 11:17:28 1998 Tom Tromey <tromey@cygnus.com>
* configure.in: Don't use sinclude.
Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Tue Feb 17 12:54:05 1998 Andrew Cagney <cagney@b1.cygnus.com>
* iface.c (sim_store_register, sim_fetch_register): Pass in length
parameter. Return -1.
Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
* iface.c (sim_load): Pass lma_p and sim_write args to
sim_load_file.
Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Sep 17 13:23:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
* Makefile.in (CONFIG_H): Use config.h from local directory.
Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
Tue Aug 26 10:43:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
* iface.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument.
(sim_load): Move setting of PC from here.
(sim_create_inferior): To here.
(sim_open, sim_load): Add FIXME about need to move arch test to
sim_open.
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
Mon Aug 25 16:36:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
* iface.c (sim_open): Add ABFD argument. Change ARGV to PARGV.
Tue May 20 10:28:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
* iface.c (sim_set_callbacs): Delete SIM_DESC argument.
(sim_open): Add callback argument.
Wed Apr 30 10:28:34 1997 Doug Evans <dje@canuck.cygnus.com>
* iface.c (sim_load): Set sim_z8001_mode if bfd_mach_z8001.
* tconfig.in (SIM_PRE_LOAD): Delete, no longer used.
Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Fri Apr 18 14:18:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
* mem.h (Z8k_PAGE_SIZE): Rename from PAGE_SIZE. Is it used?
* iface.c (sim_stop): New function.
(NULL): Define if not already.
Thu Apr 17 03:54:23 1997 Doug Evans <dje@canuck.cygnus.com>
* Makefile.in (SIM_OBJS): Add sim-load.o.
* iface.c: #include bfd.h.
(z8k_callback): New global.
(sim_kind, myname): New static locals.
(sim_open): Set sim_kind, myname.
(sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
load file into simulator. Set start address from bfd.
(sim_create_inferior): Return SIM_RC. Delete arg start_address.
(sim_set_callbacks): Set z8k_callback.
Thu Apr 17 11:36:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
* tm.h (sim_trace) : Remove prototype - now in remote-sim.h
* support.c (sim_trace): Update.
Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
* iface.c (sim_open): New arg `kind'.
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* configure: Re-generate.
Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
* configure: Regenerate to track ../common/aclocal.m4 changes.
Thu Mar 13 13:02:08 1997 Doug Evans <dje@canuck.cygnus.com>
* iface.c (sim_open): New SIM_DESC result. Argument is now
in argv form.
(other sim_*): New SIM_DESC argument.
Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
* Makefile.in (@COMMON_MAKEFILE_FRAG): Use
COMMON_{PRE,POST}_CONFIG_FRAG instead.
* configure.in: sinclude ../common/aclocal.m4.
* configure: Regenerated.
Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
* configure configure.in Makefile.in: Update to new configure
scheme which is more compatible with WinGDB builds.
* configure.in: Improve comment on how to run autoconf.
* configure: Re-run autoconf to get new ../common/aclocal.m4.
* Makefile.in: Use autoconf substitution to install common
makefile fragment.
Wed Nov 20 02:28:21 1996 Doug Evans <dje@canuck.cygnus.com>
* Makefile.in: Delete stuff moved to ../common/Make-common.in.
(SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
* configure.in: Simplify using macros in ../common/aclocal.m4.
* configure: Regenerated.
* iface.c (sim_size): New function.
(sim_stop_reason): Properly set sim_exited return code.
* support.c: #include "callback.h".
* run.c: Deleted, using one in ../common now.
* tconfig.in: New file.
Thu Oct 3 16:19:07 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
* Makefile.in (mostlyclean): Don't remove config.log here.
Wed Jun 26 12:32:29 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
(docdir): Removed.
* configure.in (AC_PREREQ): autoconf 2.5 or higher.
(AC_PROG_INSTALL): Added.
* configure: Rebuilt.
Wed Feb 21 12:17:27 1996 Ian Lance Taylor <ian@cygnus.com>
* configure: Regenerate with autoconf 2.7.
Thu Jan 11 16:59:07 1996 Jim Wilson <wilson@chestnut.cygnus.com>
* writecode.c (info_args, case CLASS_DISP8): Sign extend using
shifts instead of char cast.
(shift): Likewise.
Fri Jan 5 15:36:26 1996 Jim Wilson <wilson@chestnut.cygnus.com>
* mem.c (get_page_and_offset): Allocate 16MB not 8MB.
Fri Oct 13 15:02:45 1995 steve chamberlain <sac@slash.cygnus.com>
* iface.c (sim_set_callbacks): New.
Tue Oct 10 11:13:55 1995 Fred Fish <fnf@cygnus.com>
* Makefile.in (BISON): Remove macro.
Wed Sep 20 13:35:35 1995 Ian Lance Taylor <ian@cygnus.com>
* Makefile.in (maintainer-clean): New synonym for realclean.
Fri Sep 8 13:16:10 1995 Ian Lance Taylor <ian@cygnus.com>
* Makefile.in (install): Don't install in $(tooldir).
* configure.in: Call AC_CONFIG_HEADER. Don't try to use
bfd/hosts/*.h file or bfd/config/*.mh file. Call AC_PROG_CC and
AC_PROG_RANLIB. Substitute in values for CFLAGS, HDEFINES, AR,
and CC_FOR_BUILD. Call AC_CHECK_HEADERS for various header files.
Touch stamp.h if creating config.h.
* configure: Rebuild.
* config.in: New file, created by autoheader.
* Makefile.in (AR): Define as @AR@.
(CC): New variable, defined as @CC@.
(CFLAGS): Define as @CFLAGS@.
(CC_FOR_BUILD): New variable, defined as @CC_FOR_BUILD@.
(RANLIB): Define as @RANLIB@.
(HDEFINES, TDEFINES): New variables.
(@host_makefile_frag@): Remove.
(support.o, comped1.o, comped3.o): Depend upon config.h.
(compedb3.o, comped2.o): Likewise.
(mem.o): New target.
(tc-gen2.h): Depend upon writecode, not quick.c.
(writecode): Build using $(CC_FOR_BUILD).
(writecode.o, list.o, quick.o): New targets.
(mostlyclean): Make the same as clean, not distclean.
(clean): Remove config.log.
(distclean): Remove config.h and stamp-h.
(Makefile): Don't depend upon @frags@. Just rebuild Makefile when
invoking config.status.
(config.h, stamp-h): New targets.
* comped1.c: Don't include "sysdep.h".
(INLINE): Define as inline, not static inline.
* comped3.c, compedb3.c, run.c: Don't include "sysdep.h".
* mem.c: Include "config.h". Don't include "sysdep.h". Include
<stdlib.h> if it exists.
* support.c: Include "config.h". Don't include "sysdep.h".
Include <stdio.h>. Include <time.h> and <sys/times.h> if they
exists. Include <sys/types.h> and <sys/stat.h>.
(get_now): Only use times if <sys/times.h> exists; otherwise use
time.
* writecode.c: Include "config.h". Include <stdio.h>. Include
<stdlib.h> and <string.h> if they exist. Include <strings.h> if
it exists and <string.h> does not.
Thu Aug 3 10:45:37 1995 Fred Fish <fnf@cygnus.com>
* Update all FSF addresses except those in COPYING* files.
Mon Jul 31 10:18:06 1995 steve chamberlain <sac@slash.cygnus.com>
* support.c (normal_flags_16): Calculate carry correctly.
(support_call): Return values in std regs too.
Fri Jul 28 12:10:06 1995 steve chamberlain <sac@slash.cygnus.com>
* inlines.h (put_byte_mem_da): Moved.
* run.c (main): Return program result.
* support.c (support_call): Return exit argument.
* writecode.c (rotate): Fix a load of bugs.
(info_decode): Insert missing break after OPC_rrc.
Wed Jul 5 16:13:43 1995 J.T. Conklin <jtc@rtl.cygnus.com>
* Makefile.in, configure.in: converted to autoconf.
* configure: New file, generated with autconf 2.4.
* z8k.mt: Removed.
Fri Jun 30 16:53:09 1995 Stan Shebs <shebs@andros.cygnus.com>
* iface.c (sim_do_command): New function.
Wed May 24 16:31:38 1995 Jim Wilson <wilson@chestnut.cygnus.com>
* configure.in: Fix typo in last change.
Mon Mar 27 10:32:34 1995 J.T. Conklin <jtc@rtl.cygnus.com>
* run.c: parse arguments with getopt().
Tue Feb 28 17:31:00 1995 Ian Lance Taylor <ian@cygnus.com>
* configure.in: Use ../../bfd/hosts/std-host.h if specific
host unavailable.
Sun Feb 12 16:03:29 1995 Steve Chamberlain <sac@splat>
* iface.c (sim_stop_reason): (Make a bad syscall give a SIGILL.
* writecode.c (adiv): Divides are always signed.
Wed Dec 28 21:30:09 1994 Steve Chamberlain (sac@jonny.cygnus.com)
* inlines.h: Make INLINES static.
* mem.c (sitoptr): New instance.
* support.c (normal_flags_[32|16|8]): New functions.
(optimize_normal_flags): Use new functions.
* writecode.c (info_special): Handle sbc. (optimize_normal_flags):
Always recalc flags.
Wed May 18 14:38:49 1994 Doug Evans (dje@canuck.cygnus.com)
* support.c (sim_open): Delete from here.
(sim_set_args): Delete from here.
(sim_kill): Delete from here.
* iface.c (sim_*): Make result void where there isn't one.
(sim_clear_breakpoints): Delete.
(sim_set_pc): Delete.
(sim_info): Delete printf_fn arg, all callers changed.
(sim_open): Define here.
(sim_close): New function.
(sim_load): New function.
(sim_create_inferior): Renamed from sim_set_args.
(sim_kill): Define here.
* run.c (printf): Delete declaration.
(main): Call sim_create_inferior instead of sim_set_pc.
* sim.h (sim_clear_breakpoints): Delete.
Wed May 18 13:22:02 1994 Steve Chamberlain (sac@jonny.cygnus.com)
* writecode.c (main): Disable the chopping of large initializers.
GCC can now cope.
Sat May 7 17:24:46 1994 Steve Chamberlain (sac@cygnus.com)
* writecode.c (info_args): Add resflg and setflg.
* list.c : Regenerated.
* Makefile.in: First rule is now called 'all'
Sat Dec 11 16:39:30 1993 Steve Chamberlain (sac@thepub.cygnus.com)
* iface.c (sim_store_register): Get regval the right way up.
* writecode.c (info_args): Add lda.
Tue Oct 26 13:01:46 1993 Doug Evans (dje@canuck.cygnus.com)
* Makefile.in (INCDIR): Fix definition.
(CSEARCH): Add -I$(srcdir)/../../gdb
(comped1.o, comped3.o, compedb3.o, comped2.o): Use CSEARCH, not INCDIR.
* iface.c: Replace #include "../include/wait.h" with "remote-sim.h".
(sim_set_pc): int result, use SIM_ADDR for type of arg `addr'.
(sim_store_register): int result, pass value by reference.
(sim_fetch_register): Use unsigned char * for arg `buf'.
(sim_write): int result, use SIM_ADDR for `where' arg,
use unsigned char * for `what' arg.
(sim_read): Ditto.
(sim_resume): int result.
(sim_stop_reason): Renamed from sim_stop_signal, int result,
new arg `reason'.
(sim_info): int result, merge sim_info_print into here.
(sim_info_print): Deleted.
* run.c: #include <stdio.h>
(main): Update call to sim_info.
* sim.h: Remove various prototypes defined in remote-sim.h.
Sat Oct 23 15:16:45 1993 Doug Evans (dje@canuck.cygnus.com)
* iface.c (sim_stop_signal): Result is now enum sim_stop.
Thu Oct 7 19:01:07 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
* writecode.c (doset, info_docode): Understand set and res insns.
Thu Sep 30 11:30:42 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
* support.c (tm_info_print): If no timetaken, don't divide by zero.
Fri Jul 30 15:51:54 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com)
* writecode.c (div): rename to divide, to resolve conflict with
ANSI function div from <stdlib.h>
Mon Mar 15 15:48:50 1993 Ian Lance Taylor (ian@cygnus.com)
* z8k.mt (DO_INSTALL): Renamed from INSTALL.
Tue Mar 9 12:32:29 1993 Steve Chamberlain (sac@thepub.cygnus.com)
* writecode.c (main): Make the vector 'big' static, so that it
will compile on the apollo.
* support.c: Use the ANSI compilant __inline__.
Fri Mar 5 07:54:18 1993 Steve Chamberlain (sac@thepub.cygnus.com)
* writecode.c (main): When using gcc, split the tables into
sections so that it will compile.
* Makefile.in: Get ar args right.
* tm.h: Fix gcc prototypes.
Wed Mar 3 15:04:48 1993 Steve Chamberlain (sac@poseidon.cygnus.com)
* support.c (fail): Get the argument count right.
* tm.h: Lint.
* writecode.c (main): Pass all the arguments emit needs.
Tue Feb 2 07:49:42 1993 Steve Chamberlain (sac@thepub.cygnus.com)
* lint, prototypes
Fri Jan 15 12:43:08 1993 Steve Chamberlain (sac@thepub.cygnus.com)
* New

63
sim/z8k/Makefile.in
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@ -1,63 +0,0 @@
# Makefile template for Configure for the z8k sim library.
# Copyright (C) 1993, 95, 96, 1997 Free Software Foundation, Inc.
# Written by Cygnus Support.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
## COMMON_PRE_CONFIG_FRAG
SIM_OBJS = iface.o mem.o support.o quick.o \
comped1.o comped2.o comped3.o compedb3.o sim-load.o
# FIXME: hack to find syscall.h. Better support for syscall.h is
# in progress.
SIM_EXTRA_CFLAGS = -I$(srcdir)/../../newlib/libc/sys/z8k
SIM_EXTRA_CLEAN = clean-extra
CONFIG_H = config.h
## COMMON_POST_CONFIG_FRAG
support.o:support.c inlines.h $(CONFIG_H)
mem.o: mem.c tm.h mem.h sim.h $(CONFIG_H)
comped1.o:comped1.c tc-gen1.h $(CONFIG_H)
comped3.o:comped3.c tc-gen3.h $(CONFIG_H)
compedb3.o:compedb3.c tc-genb3.h $(CONFIG_H)
comped2.o:comped2.c tc-gen2.h $(CONFIG_H)
tc-gen1.h:writecode
./writecode -1 >tc-gen1.h
tc-gen2.h:writecode
./writecode -2 >tc-gen2.h
tc-gen3.h:writecode
./writecode -3 >tc-gen3.h
tc-genb3.h:writecode
./writecode -b3 >tc-genb3.h
writecode: writecode.o bquick.o
$(CC_FOR_BUILD) -o writecode writecode.o bquick.o
writecode.o: writecode.c $(CONFIG_H)
$(CC_FOR_BUILD) -c $(CFLAGS) $(HDEFINES) $(CSEARCH) $(CSWITCHES) $(srcdir)/writecode.c
# Two copies of quick.o are created. One for $build and one for $host.
bquick.o: quick.c
$(CC_FOR_BUILD) -c $(CFLAGS) $(HDEFINES) $(CSEARCH) $(CSWITCHES) $(srcdir)/quick.c -o bquick.o
clean-extra:
rm -f tc-gen1.h tc-gen2.h tc-gen3.h tc-genb3.h writecode

15
sim/z8k/acconfig.h
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@ -1,15 +0,0 @@
/* Define to 1 if NLS is requested. */
#undef ENABLE_NLS
/* Define as 1 if you have catgets and don't want to use GNU gettext. */
#undef HAVE_CATGETS
/* Define as 1 if you have gettext and don't want to use GNU gettext. */
#undef HAVE_GETTEXT
/* Define as 1 if you have the stpcpy function. */
#undef HAVE_STPCPY
/* Define if your locale.h file contains LC_MESSAGES. */
#undef HAVE_LC_MESSAGES

31
sim/z8k/comped1.c
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@ -1,31 +0,0 @@
/* instruction interpreter module 1
Copyright (C) 1992, 1993 Free Software Foundation, Inc.
This file is part of Z8KSIM
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
Z8KZIM is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Z8KZIM; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include <ansidecl.h>
#include "tm.h"
#include "sim.h"
#ifdef __GNUC__
#define INLINE inline
#include "inlines.h"
#endif
#include "tc-gen1.h"

25
sim/z8k/comped2.c
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@ -1,25 +0,0 @@
/* instruction interpreter module 2
Copyright (C) 1992, 1993 Free Software Foundation, Inc.
This file is part of Z8KSIM
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Z8KZIM; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include <ansidecl.h>
#include "tm.h"
#include "sim.h"
#include "tc-gen2.h"

28
sim/z8k/comped3.c
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@ -1,28 +0,0 @@
/* instruction interpreter module 2
Copyright (C) 1987, 1992 Free Software Foundation, Inc.
This file is part of Z8KSIM
Z8KSIM is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
Z8KSIM is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Z8KZIM; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include <ansidecl.h>
#include "tm.h"
#include "sim.h"
#include "inlines.h"
#include "tc-gen3.h"

29
sim/z8k/compedb3.c
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@ -1,29 +0,0 @@
/* instruction interpreter module 3
Copyright (C) 1992, 1993 Free Software Foundation, Inc.
This file is part of Z8KSIM
Z8KSIM is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
Z8KSIM is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Z8KZIM; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#define ushort_type unsigned short
#include <ansidecl.h>
#include "tm.h"
#include "sim.h"
#include "inlines.h"
#include "tc-genb3.h"

161
sim/z8k/config.in
View file

@ -1,161 +0,0 @@
/* config.in. Generated automatically from configure.in by autoheader. */
/* Define if using alloca.c. */
#undef C_ALLOCA
/* Define to empty if the keyword does not work. */
#undef const
/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
This function is required for alloca.c support on those systems. */
#undef CRAY_STACKSEG_END
/* Define if you have alloca, as a function or macro. */
#undef HAVE_ALLOCA
/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
#undef HAVE_ALLOCA_H
/* Define if you have a working `mmap' system call. */
#undef HAVE_MMAP
/* Define as __inline if that's what the C compiler calls it. */
#undef inline
/* Define to `long' if <sys/types.h> doesn't define. */
#undef off_t
/* Define if you need to in order for stat and other things to work. */
#undef _POSIX_SOURCE
/* Define as the return type of signal handlers (int or void). */
#undef RETSIGTYPE
/* Define to `unsigned' if <sys/types.h> doesn't define. */
#undef size_t
/* If using the C implementation of alloca, define if you know the
direction of stack growth for your system; otherwise it will be
automatically deduced at run-time.
STACK_DIRECTION > 0 => grows toward higher addresses
STACK_DIRECTION < 0 => grows toward lower addresses
STACK_DIRECTION = 0 => direction of growth unknown
*/
#undef STACK_DIRECTION
/* Define if you have the ANSI C header files. */
#undef STDC_HEADERS
/* Define to 1 if NLS is requested. */
#undef ENABLE_NLS
/* Define as 1 if you have gettext and don't want to use GNU gettext. */
#undef HAVE_GETTEXT
/* Define as 1 if you have the stpcpy function. */
#undef HAVE_STPCPY
/* Define if your locale.h file contains LC_MESSAGES. */
#undef HAVE_LC_MESSAGES
/* Define if you have the __argz_count function. */
#undef HAVE___ARGZ_COUNT
/* Define if you have the __argz_next function. */
#undef HAVE___ARGZ_NEXT
/* Define if you have the __argz_stringify function. */
#undef HAVE___ARGZ_STRINGIFY
/* Define if you have the __setfpucw function. */
#undef HAVE___SETFPUCW
/* Define if you have the dcgettext function. */
#undef HAVE_DCGETTEXT
/* Define if you have the getcwd function. */
#undef HAVE_GETCWD
/* Define if you have the getpagesize function. */
#undef HAVE_GETPAGESIZE
/* Define if you have the getrusage function. */
#undef HAVE_GETRUSAGE
/* Define if you have the munmap function. */
#undef HAVE_MUNMAP
/* Define if you have the putenv function. */
#undef HAVE_PUTENV
/* Define if you have the setenv function. */
#undef HAVE_SETENV
/* Define if you have the setlocale function. */
#undef HAVE_SETLOCALE
/* Define if you have the sigaction function. */
#undef HAVE_SIGACTION
/* Define if you have the stpcpy function. */
#undef HAVE_STPCPY
/* Define if you have the strcasecmp function. */
#undef HAVE_STRCASECMP
/* Define if you have the strchr function. */
#undef HAVE_STRCHR
/* Define if you have the time function. */
#undef HAVE_TIME
/* Define if you have the <argz.h> header file. */
#undef HAVE_ARGZ_H
/* Define if you have the <fcntl.h> header file. */
#undef HAVE_FCNTL_H
/* Define if you have the <fpu_control.h> header file. */
#undef HAVE_FPU_CONTROL_H
/* Define if you have the <limits.h> header file. */
#undef HAVE_LIMITS_H
/* Define if you have the <locale.h> header file. */
#undef HAVE_LOCALE_H
/* Define if you have the <malloc.h> header file. */
#undef HAVE_MALLOC_H
/* Define if you have the <nl_types.h> header file. */
#undef HAVE_NL_TYPES_H
/* Define if you have the <stdlib.h> header file. */
#undef HAVE_STDLIB_H
/* Define if you have the <string.h> header file. */
#undef HAVE_STRING_H
/* Define if you have the <strings.h> header file. */
#undef HAVE_STRINGS_H
/* Define if you have the <sys/param.h> header file. */
#undef HAVE_SYS_PARAM_H
/* Define if you have the <sys/resource.h> header file. */
#undef HAVE_SYS_RESOURCE_H
/* Define if you have the <sys/time.h> header file. */
#undef HAVE_SYS_TIME_H
/* Define if you have the <sys/times.h> header file. */
#undef HAVE_SYS_TIMES_H
/* Define if you have the <time.h> header file. */
#undef HAVE_TIME_H
/* Define if you have the <unistd.h> header file. */
#undef HAVE_UNISTD_H
/* Define if you have the <values.h> header file. */
#undef HAVE_VALUES_H

4024
sim/z8k/configure vendored
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File diff suppressed because it is too large Load diff

10
sim/z8k/configure.in
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@ -1,10 +0,0 @@
dnl Process this file with autoconf to produce a configure script.
sinclude(../common/aclocal.m4)
AC_PREREQ(2.5)dnl
AC_INIT(Makefile.in)
SIM_AC_COMMON
AC_CHECK_HEADERS(string.h strings.h stdlib.h time.h sys/times.h)
SIM_AC_OUTPUT

263
sim/z8k/iface.c
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@ -1,263 +0,0 @@
/* gdb->simulator interface.
Copyright (C) 1992, 1993, 1994, 1997 Free Software Foundation, Inc.
This file is part of Z8KSIM
Z8KSIM is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
Z8KSIM is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Z8KZIM; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "ansidecl.h"
#include "sim.h"
#include "tm.h"
#include "signal.h"
#include "bfd.h"
#include "gdb/callback.h"
#include "gdb/remote-sim.h"
#ifndef NULL
#define NULL 0
#endif
host_callback *z8k_callback;
static SIM_OPEN_KIND sim_kind;
static char *myname;
void
sim_size (n)
int n;
{
/* Size is fixed. */
}
int
sim_store_register (sd, regno, value, length)
SIM_DESC sd;
int regno;
unsigned char *value;
int length;
{
/* FIXME: Review the computation of regval. */
int regval = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
tm_store_register (regno, regval);
return -1;
}
int
sim_fetch_register (sd, regno, buf, length)
SIM_DESC sd;
int regno;
unsigned char *buf;
int length;
{
tm_fetch_register (regno, buf);
return -1;
}
int
sim_write (sd, where, what, howmuch)
SIM_DESC sd;
SIM_ADDR where;
unsigned char *what;
int howmuch;
{
int i;
for (i = 0; i < howmuch; i++)
tm_write_byte (where + i, what[i]);
return howmuch;
}
int
sim_read (sd, where, what, howmuch)
SIM_DESC sd;
SIM_ADDR where;
unsigned char *what;
int howmuch;
{
int i;
for (i = 0; i < howmuch; i++)
what[i] = tm_read_byte (where + i);
return howmuch;
}
static void
control_c (sig, code, scp, addr)
int sig;
int code;
char *scp;
char *addr;
{
tm_exception (SIM_INTERRUPT);
}
int
sim_stop (sd)
SIM_DESC sd;
{
tm_exception (SIM_INTERRUPT);
return 1;
}
void
sim_resume (sd, step, sig)
SIM_DESC sd;
int step;
int sig;
{
void (*prev) ();
prev = signal (SIGINT, control_c);
tm_resume (step);
signal (SIGINT, prev);
}
void
sim_stop_reason (sd, reason, sigrc)
SIM_DESC sd;
enum sim_stop *reason;
int *sigrc;
{
switch (tm_signal ())
{
case SIM_DIV_ZERO:
*sigrc = SIGFPE;
break;
case SIM_INTERRUPT:
*sigrc = SIGINT;
break;
case SIM_BAD_INST:
*sigrc = SIGILL;
break;
case SIM_BREAKPOINT:
*sigrc = SIGTRAP;
break;
case SIM_SINGLE_STEP:
*sigrc = SIGTRAP;
break;
case SIM_BAD_SYSCALL:
*sigrc = SIGILL;
break;
case SIM_BAD_ALIGN:
*sigrc = SIGSEGV;
break;
case SIM_DONE:
{
sim_state_type x;
tm_state (&x);
*sigrc = x.regs[2].word & 255;
*reason = sim_exited;
return;
}
default:
abort ();
}
*reason = sim_stopped;
}
void
sim_info (sd, verbose)
SIM_DESC sd;
int verbose;
{
sim_state_type x;
tm_state (&x);
tm_info_print (&x);
}
SIM_DESC
sim_open (kind, cb, abfd, argv)
SIM_OPEN_KIND kind;
host_callback *cb;
struct bfd *abfd;
char **argv;
{
/* FIXME: The code in sim_load that determines the exact z8k arch
should be moved to here */
sim_kind = kind;
myname = argv[0];
z8k_callback = cb;
/* fudge our descriptor for now */
return (SIM_DESC) 1;
}
void
sim_close (sd, quitting)
SIM_DESC sd;
int quitting;
{
/* nothing to do */
}
SIM_RC
sim_load (sd, prog, abfd, from_tty)
SIM_DESC sd;
char *prog;
bfd *abfd;
int from_tty;
{
extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
bfd *prog_bfd;
/* FIXME: The code determining the type of z9k processor should be
moved from here to sim_open. */
prog_bfd = sim_load_file (sd, myname, z8k_callback, prog, abfd,
sim_kind == SIM_OPEN_DEBUG,
0, sim_write);
if (prog_bfd == NULL)
return SIM_RC_FAIL;
if (bfd_get_mach (prog_bfd) == bfd_mach_z8001)
{
extern int sim_z8001_mode;
sim_z8001_mode = 1;
}
/* Close the bfd if we opened it. */
if (abfd == NULL)
bfd_close (prog_bfd);
return SIM_RC_OK;
}
SIM_RC
sim_create_inferior (sd, abfd, argv, env)
SIM_DESC sd;
struct bfd *abfd;
char **argv;
char **env;
{
if (abfd != NULL)
tm_store_register (REG_PC, bfd_get_start_address (abfd));
else
tm_store_register (REG_PC, 0);
return SIM_RC_OK;
}
void
sim_do_command (sd, cmd)
SIM_DESC sd;
char *cmd;
{
}
void
sim_set_callbacks (ptr)
host_callback *ptr;
{
z8k_callback = ptr;
}

486
sim/z8k/inlines.h
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@ -1,486 +0,0 @@
/* inline functions for Z8KSIM
Copyright (C) 1992, 1993 Free Software Foundation, Inc.
This file is part of Z8KSIM
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Z8KZIM; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef INLINE
#define INLINE
#endif
#define UGT 0x0b
#define ULE 0x03
#define ULT 0x07
#define UGE 0x0f
#define SLOW 0
#define T 0x8
#define F 0x0
#define LT 0x1
#define GT 0xa
#define LE 0x2
#define EQ 0x6
#define NE 0xe
#define GE 0x9
static int is_cond_true PARAMS((sim_state_type *context, int c));
static void makeflags PARAMS((sim_state_type *context, int mask));
static INLINE
long
sitoptr (si)
long si;
{
return ((si & 0xff000000) >> 8) | (si & 0xffff);
}
static INLINE long
ptrtosi (ptr)
long ptr;
{
return ((ptr & 0xff0000) << 8) | (ptr & 0xffff);
}
static INLINE
void
put_long_reg (context, reg, val)
sim_state_type *context;
int reg;
int val;
{
context->regs[reg].word = val >> 16;
context->regs[reg + 1].word = val;
}
static INLINE
void
put_quad_reg (context, reg, val1, val2)
sim_state_type *context;
int reg;
int val1;
int val2;
{
context->regs[reg].word = val2 >> 16;
context->regs[reg + 1].word = val2;
context->regs[reg + 2].word = val1 >> 16;
context->regs[reg + 3].word = val1;
}
static INLINE
void
put_word_reg (context, reg, val)
sim_state_type *context;
int reg;
int val;
{
context->regs[reg].word = val;
}
static INLINE
SItype get_long_reg (context, reg)
sim_state_type *context;
int reg;
{
USItype lsw = context->regs[reg + 1].word;
USItype msw = context->regs[reg].word;
return (msw << 16) | lsw;
}
#ifdef __GNUC__
static INLINE
struct UDIstruct
get_quad_reg (context, reg)
sim_state_type *context;
int reg;
{
UDItype res;
USItype lsw = get_long_reg (context, reg + 2);
USItype msw = get_long_reg (context, reg);
res.low = lsw;
res.high = msw;
return res;
}
#endif
static INLINE void
put_byte_mem_da (context, addr, value)
sim_state_type *context;
int addr;
int value;
{
((unsigned char *) (context->memory))[addr] = value;
}
static INLINE
void
put_byte_reg (context, reg, val)
sim_state_type *context;
int reg;
int val;
{
int old = context->regs[reg & 0x7].word;
if (reg & 0x8)
{
old = old & 0xff00 | (val & 0xff);
}
else
{
old = old & 0x00ff | (val << 8);
}
context->regs[reg & 0x7].word = old;
}
static INLINE
int
get_byte_reg (context, reg)
sim_state_type *context;
int reg;
{
if (reg & 0x8)
return context->regs[reg & 0x7].word & 0xff;
else
return (context->regs[reg & 0x7].word >> 8) & 0xff;
}
static INLINE
void
put_word_mem_da (context, addr, value)
sim_state_type *context;
int addr;
int value;
{
if (addr & 1)
{
context->exception = SIM_BAD_ALIGN;
addr &= ~1;
}
put_byte_mem_da(context, addr, value>>8);
put_byte_mem_da(context, addr+1, value);
}
static INLINE unsigned char
get_byte_mem_da (context, addr)
sim_state_type *context;
int addr;
{
return ((unsigned char *) (context->memory))[addr];
}
#if 0
#define get_word_mem_da(context,addr)\
*((unsigned short*)((char*)((context)->memory)+(addr)))
#else
#define get_word_mem_da(context,addr) (get_byte_mem_da(context, addr) << 8) | (get_byte_mem_da(context,addr+1))
#endif
#define get_word_reg(context,reg) (context)->regs[reg].word
static INLINE
SItype
get_long_mem_da (context, addr)
sim_state_type *context;
int addr;
{
USItype lsw = get_word_mem_da(context,addr+2);
USItype msw = get_word_mem_da(context, addr);
return (msw << 16) + lsw;
}
static INLINE
void
put_long_mem_da (context, addr, value)
sim_state_type *context;
int addr;
int value;
{
put_word_mem_da(context,addr, value>>16);
put_word_mem_da(context,addr+2, value);
}
static INLINE
int
get_word_mem_ir (context, reg)
sim_state_type *context;
int reg;
{
return get_word_mem_da (context, get_word_reg (context, reg));
}
static INLINE
void
put_word_mem_ir (context, reg, value)
sim_state_type *context;
int reg;
int value;
{
put_word_mem_da (context, get_word_reg (context, reg), value);
}
static INLINE
int
get_byte_mem_ir (context, reg)
sim_state_type *context;
int reg;
{
return get_byte_mem_da (context, get_word_reg (context, reg));
}
static INLINE
void
put_byte_mem_ir (context, reg, value)
sim_state_type *context;
int reg;
int value;
{
put_byte_mem_da (context, get_word_reg (context, reg), value);
}
static INLINE
int
get_long_mem_ir (context, reg)
sim_state_type *context;
int reg;
{
return get_long_mem_da (context, get_word_reg (context, reg));
}
static INLINE
void
put_long_mem_ir (context, reg, value)
sim_state_type *context;
int reg;
int value;
{
put_long_mem_da (context, get_word_reg (context, reg), value);
}
static INLINE
void
put_long_mem_x (context, base, reg, value)
sim_state_type *context;
int base;
int reg;
int value;
{
put_long_mem_da (context, get_word_reg (context, reg) + base, value);
}
static INLINE
void
put_word_mem_x (context, base, reg, value)
sim_state_type *context;
int base;
int reg;
int value;
{
put_word_mem_da (context, get_word_reg (context, reg) + base, value);
}
static INLINE
void
put_byte_mem_x (context, base, reg, value)
sim_state_type *context;
int base;
int reg;
int value;
{
put_byte_mem_da (context, get_word_reg (context, reg) + base, value);
}
static INLINE
int
get_word_mem_x (context, base, reg)
sim_state_type *context;
int base;
int reg;
{
return get_word_mem_da (context, base + get_word_reg (context, reg));
}
static INLINE
int
get_byte_mem_x (context, base, reg)
sim_state_type *context;
int base;
int reg;
{
return get_byte_mem_da (context, base + get_word_reg (context, reg));
}
static INLINE
int
get_long_mem_x (context, base, reg)
sim_state_type *context;
int base;
int reg;
{
return get_long_mem_da (context, base + get_word_reg (context, reg));
}
static
void
makeflags (context, mask)
sim_state_type *context;
int mask;
{
PSW_ZERO = (context->dst & mask) == 0;
PSW_SIGN = (context->dst >> (context->size - 1));
if (context->broken_flags == TST_FLAGS)
{
extern char the_parity[];
if (context->size == 8)
{
PSW_OVERFLOW = the_parity[context->dst & 0xff];
}
}
else
{
/* Overflow is set if both operands have the same sign and the
result is of different sign.
V = A==B && R!=B jumping logic
(~(A^B))&(R^B)
V = (A^B)^(R^B) boolean
*/
PSW_OVERFLOW =
((
(~(context->srca ^ context->srcb)
& (context->srca ^ context->dst))
) >> (context->size - 1)
);
if (context->size < 32)
{
PSW_CARRY = ((context->dst >> context->size)) & 1;
}
else
{
/* carry is set when the result is smaller than a source */
PSW_CARRY = (unsigned) context->dst > (unsigned) context->srca ;
}
}
context->broken_flags = 0;
}
/* There are two ways to calculate the flags. We can
either always calculate them and so the cc will always
be correct, or we can only keep the arguments around and
calc the flags when they're actually going to be used. */
/* Right now we always calc the flags - I think it may be faster*/
#define NORMAL_FLAGS(c,s,d,sa,sb,sub) \
if (s == 8) \
normal_flags_8(c,d,sa,sb,sub); \
else if (s == 16) \
normal_flags_16(c,d,sa,sb,sub); \
else if (s == 32) \
normal_flags_32(c,d,sa,sb,sub);
static INLINE
void
normal_flags (context, size, dst, srca, srcb)
sim_state_type *context;
int size;
int dst;
int srca;
int srcb;
{
context->srca = srca;
context->srcb = srcb;
context->dst = dst;
context->size = size;
context->broken_flags = CMP_FLAGS;
}
static INLINE
void
TEST_NORMAL_FLAGS (context, size, dst)
sim_state_type *context;
int size;
int dst;
{
context->dst = dst;
context->size = size;
context->broken_flags = TST_FLAGS;
}
static INLINE
void
put_ptr_long_reg (context, reg, val)
sim_state_type *context;
int reg;
int val;
{
context->regs[reg].word = (val >> 8) & 0x7f00;
context->regs[reg + 1].word = val;
}
static INLINE
long
get_ptr_long_reg (context, reg)
sim_state_type *context;
int reg;
{
int val;
val = (context->regs[reg].word << 8) | context->regs[reg + 1].word;
return val;
}
static INLINE
long
get_ptr_long_mem_ir (context, reg)
sim_state_type *context;
int reg;
{
return sitoptr (get_long_mem_da (context, get_ptr_long_reg (context, reg)));
}
static INLINE
long
get_ptr_long_mem_da (context, addr)
sim_state_type *context;
long addr;
{
return sitoptr (get_long_mem_da (context, addr));
}
static INLINE
void
put_ptr_long_mem_da (context, addr, ptr)
sim_state_type *context;
long addr;
long ptr;
{
put_long_mem_da (context, addr, ptrtosi (ptr));
}

126
sim/z8k/mem.c
View file

@ -1,126 +0,0 @@
/* memory support for Z8KSIM
Copyright (C) 1987, 1992 Free Software Foundation, Inc.
This file is part of Z8KSIM
Z8KSIM is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
Z8KSIM is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Z8KZIM; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "config.h"
#include <ansidecl.h>
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
#endif
#include "tm.h"
#include "mem.h"
#include "sim.h"
#define INLINE
static
long
sitoptr (si)
long si;
{
return ((si & 0xff000000) >> 8) | (si & 0xffff);
}
static
unsigned short *
get_page_and_offset (context, where, offset_ptr)
sim_state_type *context;
sim_phys_addr_type where;
int *offset_ptr;
{
/* Is the page allocated ? */
if (context->memory == 0)
{
/* Must allocate 16MB in order to run Z8001 programs. */
context->memory = (unsigned short *)calloc(64*1024*64,4);
}
*offset_ptr = sitoptr(where);
return context->memory;
}
void
sim_write_byte (context, where, what)
sim_state_type *context;
sim_phys_addr_type where;
int what;
{
unsigned int offset;
char *ptr = (char *)get_page_and_offset (context, where, &offset);
ptr[offset] = what;
}
void
sim_write_short (context, where, what)
sim_state_type *context;
sim_phys_addr_type where;
int what;
{
int offset;
char *ptr = (char *)get_page_and_offset (context, where, &offset);
ptr[offset] = what >> 8;
ptr[offset + 1] = what;
}
void
sim_write_long (context, where, what)
sim_state_type *context;
sim_phys_addr_type where;
int what;
{
int offset;
char *ptr = (char *)get_page_and_offset (context, where, &offset);
ptr[offset] = what >> 24;
ptr[offset + 1] = what >> 16;
ptr[offset + 3] = what >> 8;
ptr[offset + 4] = what;
}
int
sim_read_byte (context, where)
sim_state_type *context;
sim_phys_addr_type where;
{
int offset;
char *ptr = (char *)get_page_and_offset (context, where, &offset);
return ptr[offset];
}
unsigned
sim_read_short (context, where)
sim_state_type *context;
sim_phys_addr_type where;
{
int what;
int offset;
char *ptr = (char *)get_page_and_offset (context, where, &offset);
what = (ptr[offset] << 8) | ptr[offset + 1];
return what;
}

8
sim/z8k/mem.h
View file

@ -1,8 +0,0 @@
#define Z8k_PAGE_SIZE (1<<PAGE_POWER)
int sim_read_byte PARAMS((sim_state_type *, sim_phys_addr_type));
unsigned int sim_read_short PARAMS((sim_state_type *, sim_phys_addr_type));
void sim_write_long PARAMS((sim_state_type *, sim_phys_addr_type,
int));
void sim_write_short PARAMS((sim_state_type *, sim_phys_addr_type, int));
void sim_write_byte PARAMS((sim_state_type *, sim_phys_addr_type, int));

783
sim/z8k/quick.c
View file

@ -1,783 +0,0 @@
/* list of opcodes to compile all the way */
int quick[]=
{
#if 0
/* 110000*/ 0xc,
/* 35*/ 0x104,
/* 4*/ 0x105,
/* 3*/ 0x107,
/* 20*/ 0x10d,
/* 2*/ 0x1dc,
/* 69*/ 0x20f,
/* 1*/ 0x40d,
/* 40*/ 0x501,
/* 7*/ 0x504,
/* 7*/ 0x505,
/* 6*/ 0x508,
/* 6*/ 0x509,
/* 8*/ 0x609,
/* 118*/ 0x60c,
/* 2*/ 0x702,
/* 85*/ 0x704,
/* 88*/ 0x705,
/* 3*/ 0x707,
/* 5*/ 0x708,
/* 4*/ 0x709,
/* 110000*/ 0xa08,
/* 101571*/ 0xa09,
/* 110000*/ 0xa0c,
/* 100000*/ 0xa0f,
/* 300000*/ 0xa6d,
/* 101681*/ 0xb02,
/* 100077*/ 0xb04,
/* 8*/ 0xb05,
/* 110000*/ 0xb07,
/* 10005*/ 0xb08,
/* 140000*/ 0xb0a,
/* 100036*/ 0xb0c,
/* 100042*/ 0xb0d,
/* 3*/ 0xc25,
/* 105158*/ 0xc58,
/* 300236*/ 0xc74,
/* 20*/ 0xd41,
/* 100008*/ 0xd45,
/* 10*/ 0xd51,
/* 10*/ 0xd54,
/* 110000*/ 0xdc5,
/* 100000*/ 0xdd5,
/* 79*/ 0xdf9,
/* 6*/ 0x1004,
/* 53*/ 0x1008,
/* 5*/ 0x13f4,
/* 1*/ 0x1402,
/* 2*/ 0x1404,
/* 2*/ 0x1406,
/* 7*/ 0x1408,
/* 4*/ 0x1606,
/* 72*/ 0x1e48,
/* 6*/ 0x1f40,
/* 100006*/ 0x205e,
/* 2*/ 0x2068,
/* 110000*/ 0x206c,
/* 110000*/ 0x207c,
/* 300000*/ 0x207d,
/* 101642*/ 0x2088,
/* 101539*/ 0x2089,
/* 101679*/ 0x208c,
/* 40*/ 0x209c,
/* 8*/ 0x2102,
/* 120009*/ 0x2104,
/* 110003*/ 0x2105,
/* 130000*/ 0x2106,
/* 110068*/ 0x2107,
/* 32*/ 0x2108,
/* 1*/ 0x2109,
/* 105*/ 0x210c,
/* 1*/ 0x210d,
/* 3*/ 0x2126,
/* 3*/ 0x2142,
/* 120002*/ 0x2144,
/* 100012*/ 0x2145,
/* 10000*/ 0x2147,
/* 100000*/ 0x2148,
/* 6*/ 0x2156,
/* 100000*/ 0x2157,
/* 100000*/ 0x2158,
/* 101677*/ 0x2165,
/* 100000*/ 0x2168,
/* 110000*/ 0x2174,
/* 2*/ 0x2190,
/* 2*/ 0x2198,
/* 2*/ 0x21c4,
/* 2*/ 0x21c5,
/* 110000*/ 0x21c8,
/* 110000*/ 0x21ca,
/* 2*/ 0x21cd,
/* 100002*/ 0x21d7,
/* 100000*/ 0x21dc,
/* 101677*/ 0x2960,
/* 2*/ 0x29c0,
/* 4*/ 0x2e48,
/* 101677*/ 0x2e5c,
/* 100000*/ 0x2e7c,
/* 31*/ 0x2f24,
/* 1*/ 0x2f28,
/* 100000*/ 0x2f45,
/* 3*/ 0x2f46,
/* 100000*/ 0x2f47,
/* 100000*/ 0x2f48,
/* 100000*/ 0x2f54,
/* 130000*/ 0x2f56,
/* 100000*/ 0x2f58,
/* 10000*/ 0x2f64,
/* 100000*/ 0x2f65,
/* 100000*/ 0x2f72,
/* 110000*/ 0x2f74,
/* 10000*/ 0x2f78,
/* 110000*/ 0x2fa4,
/* 110000*/ 0x2fa8,
/* 1*/ 0x2fc2,
/* 100000*/ 0x2fc4,
/* 100000*/ 0x2fc7,
/* 2*/ 0x2fc8,
/* 110000*/ 0x2fca,
/* 100002*/ 0x2fdc,
/* 77*/ 0x3144,
/* 3*/ 0x3146,
/* 2*/ 0x3342,
/* 3*/ 0x3346,
/* 100000*/ 0x3445,
/* 2*/ 0x3454,
/* 100000*/ 0x3456,
/* 10000*/ 0x3458,
/* 6*/ 0x3459,
/* 100000*/ 0x3464,
/* 100000*/ 0x3468,
/* 10000*/ 0x3485,
/* 100000*/ 0x3486,
/* 1*/ 0x34a0,
/* 110026*/ 0x34a4,
/* 110069*/ 0x34a5,
/* 110014*/ 0x34a6,
/* 20038*/ 0x34a7,
/* 1*/ 0x34a9,
/* 1*/ 0x34ad,
/* 100000*/ 0x34c4,
/* 100000*/ 0x34c5,
/* 2*/ 0x34d4,
/* 100000*/ 0x34f5,
/* 100000*/ 0x34f7,
/* 4*/ 0x4102,
/* 4*/ 0x4104,
/* 1*/ 0x4169,
/* 110000*/ 0x41a4,
/* 100000*/ 0x41a5,
/* 100000*/ 0x41a6,
/* 100000*/ 0x41a8,
/* 100000*/ 0x41f4,
/* 100000*/ 0x4302,
/* 100000*/ 0x4305,
/* 110000*/ 0x4308,
/* 1*/ 0x4369,
/* 1*/ 0x43a4,
/* 100000*/ 0x43a5,
/* 100000*/ 0x43a8,
/* 100000*/ 0x43a9,
/* 120000*/ 0x43ac,
/* 2*/ 0x43c5,
/* 100000*/ 0x43f5,
/* 100000*/ 0x43fa,
/* 110000*/ 0x4504,
/* 4*/ 0x45a1,
/* 18*/ 0x45a4,
/* 100018*/ 0x45a5,
/* 1*/ 0x4968,
/* 130000*/ 0x4a08,
/* 100000*/ 0x4a0b,
/* 100000*/ 0x4aac,
/* 3*/ 0x4b68,
/* 100000*/ 0x4ba8,
/* 100000*/ 0x4ba9,
/* 4*/ 0x4bc5,
/* 110000*/ 0x4c01,
/* 120000*/ 0x4c05,
/* 32*/ 0x4c78,
/* 100000*/ 0x4ca1,
/* 100000*/ 0x4ca5,
/* 1*/ 0x4cc4,
/* 20*/ 0x4cd4,
/* 110007*/ 0x4d04,
/* 110004*/ 0x4d05,
/* 110000*/ 0x4d08,
/* 2*/ 0x4d25,
/* 1*/ 0x4d28,
/* 8*/ 0x4d41,
/* 100000*/ 0x4d44,
/* 100000*/ 0x4d45,
/* 101679*/ 0x4d64,
/* 100034*/ 0x4da1,
/* 110005*/ 0x4da4,
/* 140014*/ 0x4da5,
/* 100001*/ 0x4da8,
/* 100003*/ 0x4dc4,
/* 110000*/ 0x4dc5,
/* 2*/ 0x4dd4,
/* 100000*/ 0x4dd5,
/* 100000*/ 0x4df5,
/* 3*/ 0x4e2d,
/* 30000*/ 0x4ea8,
/* 52*/ 0x4ea9,
/* 100000*/ 0x4eab,
/* 100000*/ 0x4eac,
/* 32*/ 0x4ead,
/* 100000*/ 0x4eae,
/* 100000*/ 0x4eaf,
/* 2*/ 0x4ec8,
/* 2*/ 0x4ecd,
/* 3*/ 0x50a6,
/* 32*/ 0x50a8,
/* 1*/ 0x520c,
/* 18*/ 0x52a8,
/* 2*/ 0x53f0,
/* 6*/ 0x53f4,
/* 3*/ 0x53fa,
/* 1*/ 0x5406,
/* 8*/ 0x5448,
/* 4*/ 0x54a2,
/* 42*/ 0x54a4,
/* 10*/ 0x54a6,
/* 322*/ 0x54a8,
/* 3*/ 0x56a4,
/* 3*/ 0x56a6,
/* 110000*/ 0x59a4,
/* 100000*/ 0x59f4,
/* 4*/ 0x5d02,
/* 1*/ 0x5d0c,
/* 2*/ 0x5d48,
/* 33*/ 0x5da4,
/* 48*/ 0x5da6,
/* 213*/ 0x5da8,
/* 32*/ 0x5e01,
/* 110005*/ 0x5e02,
/* 100005*/ 0x5e03,
/* 101728*/ 0x5e06,
/* 31*/ 0x5e07,
/* 100266*/ 0x5e08,
/* 100006*/ 0x5e09,
/* 100033*/ 0x5e0a,
/* 100080*/ 0x5e0b,
/* 100030*/ 0x5e0e,
/* 1*/ 0x5e0f,
/* 262032*/ 0x5f00,
/* 110000*/ 0x6008,
/* 100000*/ 0x6009,
/* 2*/ 0x600c,
/* 110000*/ 0x604c,
/* 4*/ 0x604d,
/* 6*/ 0x606f,
/* 36*/ 0x6089,
/* 140064*/ 0x60a8,
/* 48*/ 0x60a9,
/* 100096*/ 0x60ac,
/* 100000*/ 0x60ad,
/* 2*/ 0x60c8,
/* 19*/ 0x60cc,
/* 2*/ 0x60cd,
/* 8*/ 0x60dc,
/* 120009*/ 0x6104,
/* 120032*/ 0x6105,
/* 110001*/ 0x6106,
/* 110000*/ 0x6107,
/* 2*/ 0x6108,
/* 1*/ 0x6109,
/* 1*/ 0x610d,
/* 1*/ 0x610f,
/* 4*/ 0x6145,
/* 100000*/ 0x6147,
/* 2*/ 0x614c,
/* 2*/ 0x614d,
/* 100000*/ 0x6157,
/* 100002*/ 0x6158,
/* 3*/ 0x6159,
/* 6*/ 0x6165,
/* 12*/ 0x6168,
/* 32*/ 0x6181,
/* 4*/ 0x6191,
/* 2*/ 0x6194,
/* 2*/ 0x6198,
/* 68*/ 0x61a0,
/* 101682*/ 0x61a1,
/* 110066*/ 0x61a2,
/* 100040*/ 0x61a3,
/* 120232*/ 0x61a4,
/* 110172*/ 0x61a5,
/* 101800*/ 0x61a6,
/* 110119*/ 0x61a7,
/* 143923*/ 0x61a8,
/* 110098*/ 0x61a9,
/* 44*/ 0x61ac,
/* 4*/ 0x61c0,
/* 2*/ 0x61c4,
/* 1*/ 0x61c5,
/* 110002*/ 0x61c7,
/* 3*/ 0x61c8,
/* 100000*/ 0x61d4,
/* 2*/ 0x61d8,
/* 2*/ 0x61dc,
/* 100000*/ 0x61f3,
/* 100000*/ 0x61f4,
/* 100000*/ 0x61f5,
/* 100000*/ 0x61f7,
/* 100000*/ 0x61fb,
/* 100000*/ 0x68a0,
/* 110000*/ 0x6940,
/* 110032*/ 0x69a0,
/* 100000*/ 0x69f0,
/* 2*/ 0x6b40,
/* 101679*/ 0x6b60,
/* 100044*/ 0x6ba0,
/* 2*/ 0x6bc0,
/* 6*/ 0x6f02,
/* 120000*/ 0x6f04,
/* 100002*/ 0x6f05,
/* 7*/ 0x6f45,
/* 110000*/ 0x6f47,
/* 100007*/ 0x6f48,
/* 15*/ 0x6f49,
/* 100000*/ 0x6f4b,
/* 100000*/ 0x6f54,
/* 100000*/ 0x6f58,
/* 10000*/ 0x6f64,
/* 10000*/ 0x6f68,
/* 2*/ 0x6f94,
/* 145*/ 0x6fa0,
/* 101714*/ 0x6fa1,
/* 94*/ 0x6fa2,
/* 120060*/ 0x6fa4,
/* 100109*/ 0x6fa5,
/* 100123*/ 0x6fa6,
/* 100157*/ 0x6fa7,
/* 111842*/ 0x6fa8,
/* 100091*/ 0x6fa9,
/* 4*/ 0x6fc0,
/* 1*/ 0x6fc2,
/* 1*/ 0x6fc5,
/* 1*/ 0x6fcd,
/* 2*/ 0x6fd8,
/* 100000*/ 0x6ff4,
/* 56*/ 0x705c,
/* 100000*/ 0x706d,
/* 100000*/ 0x7078,
/* 100000*/ 0x708d,
/* 100000*/ 0x708e,
/* 100000*/ 0x709e,
/* 110000*/ 0x70dd,
/* 110000*/ 0x7157,
/* 100000*/ 0x715b,
/* 56*/ 0x727c,
/* 120000*/ 0x7348,
/* 31*/ 0x7424,
/* 100000*/ 0x7446,
/* 100000*/ 0x7447,
/* 10000*/ 0x7449,
/* 120000*/ 0x7454,
/* 2*/ 0x7468,
/* 32*/ 0x7472,
/* 110000*/ 0x74a4,
/* 100000*/ 0x74b4,
/* 100000*/ 0x74b5,
/* 10*/ 0x74c2,
/* 100000*/ 0x74c4,
/* 32*/ 0x74d4,
/* 1*/ 0x7f01,
/* 2*/ 0x7f04,
/* 2*/ 0x7f13,
/* 1*/ 0x7f16,
/* 2*/ 0x7f17,
/* 2*/ 0x8128,
/* 190091*/ 0x8144,
/* 100000*/ 0x8145,
/* 100000*/ 0x8154,
/* 110000*/ 0x8155,
/* 100000*/ 0x8156,
/* 100000*/ 0x8164,
/* 100000*/ 0x8165,
/* 110000*/ 0x8166,
/* 100000*/ 0x8167,
/* 140000*/ 0x8176,
/* 100000*/ 0x8177,
/* 130000*/ 0x8184,
/* 40*/ 0x818c,
/* 100000*/ 0x8194,
/* 110000*/ 0x81b4,
/* 100000*/ 0x81bb,
/* 2*/ 0x81c9,
/* 36*/ 0x81d0,
/* 4*/ 0x81d1,
/* 40*/ 0x81dc,
/* 111677*/ 0x8222,
/* 110076*/ 0x8244,
/* 100038*/ 0x8255,
/* 110006*/ 0x8266,
/* 131679*/ 0x8277,
/* 107*/ 0x8300,
/* 131*/ 0x8311,
/* 140015*/ 0x8322,
/* 2*/ 0x832d,
/* 110056*/ 0x8342,
/* 100019*/ 0x8344,
/* 100000*/ 0x8352,
/* 100000*/ 0x8354,
/* 110003*/ 0x8355,
/* 100001*/ 0x8366,
/* 6*/ 0x8377,
/* 71*/ 0x8388,
/* 2*/ 0x838d,
/* 34*/ 0x8399,
/* 100000*/ 0x83a4,
/* 120002*/ 0x83c4,
/* 4*/ 0x83c8,
/* 113*/ 0x83cc,
/* 2*/ 0x83d4,
/* 4*/ 0x84c9,
/* 4*/ 0x84d9,
/* 3*/ 0x8524,
/* 4*/ 0x8559,
/* 100000*/ 0x8adc,
/* 10000*/ 0x8ae8,
/* 100000*/ 0x8ae9,
/* 130000*/ 0x8aef,
/* 100000*/ 0x8af8,
/* 2*/ 0x8b26,
/* 20000*/ 0x8b28,
/* 1*/ 0x8b45,
/* 100000*/ 0x8b48,
/* 32*/ 0x8b49,
/* 20000*/ 0x8b56,
/* 10000*/ 0x8b58,
/* 100000*/ 0x8b59,
/* 105158*/ 0x8b65,
/* 100000*/ 0x8b68,
/* 2*/ 0x8b75,
/* 2*/ 0x8b82,
/* 260*/ 0x8b8c,
/* 100000*/ 0x8ba3,
/* 100000*/ 0x8bab,
/* 100000*/ 0x8bc2,
/* 100000*/ 0x8bc3,
/* 10000*/ 0x8bc8,
/* 10002*/ 0x8bc9,
/* 2*/ 0x8bd5,
/* 4*/ 0x8bd9,
/* 32*/ 0x8bdc,
/* 101674*/ 0x8c84,
/* 100063*/ 0x8cc4,
/* 1*/ 0x8ce2,
/* 100000*/ 0x8ce4,
/* 32*/ 0x8d04,
/* 107*/ 0x8d14,
/* 140019*/ 0x8d24,
/* 20*/ 0x8d28,
/* 100040*/ 0x8d44,
/* 120003*/ 0x8d48,
/* 110013*/ 0x8d54,
/* 2*/ 0x8d58,
/* 2*/ 0x8d62,
/* 100088*/ 0x8d64,
/* 218*/ 0x8d84,
/* 91*/ 0x8dc4,
/* 85*/ 0x8dd4,
/* 110127*/ 0x91fc,
/* 1*/ 0x93f0,
/* 36*/ 0x93f1,
/* 3*/ 0x93f4,
/* 1*/ 0x93f8,
/* 6*/ 0x93f9,
/* 142037*/ 0x93fa,
/* 120015*/ 0x93fc,
/* 100000*/ 0x9420,
/* 4*/ 0x9426,
/* 1*/ 0x942c,
/* 42*/ 0x9446,
/* 1*/ 0x9462,
/* 3*/ 0x9464,
/* 1*/ 0x94c4,
/* 1*/ 0x94c6,
/* 110126*/ 0x95fc,
/* 3*/ 0x9646,
/* 32*/ 0x9666,
/* 110*/ 0x9688,
/* 142033*/ 0x97fa,
/* 120014*/ 0x97fc,
/* 1*/ 0x9a40,
/* 110112*/ 0x9b20,
/* 100000*/ 0x9b40,
/* 64*/ 0x9c48,
/* 38*/ 0x9c88,
/* 100000*/ 0x9e06,
/* 262035*/ 0x9e08,
/* 110000*/ 0x9e0e,
/* 100002*/ 0xa08c,
/* 32*/ 0xa08d,
/* 20000*/ 0xa08f,
/* 8*/ 0xa0ac,
/* 111681*/ 0xa0ca,
/* 100000*/ 0xa0cd,
/* 110001*/ 0xa0ce,
/* 101684*/ 0xa0cf,
/* 100032*/ 0xa0dc,
/* 110000*/ 0xa0df,
/* 100000*/ 0xa0ec,
/* 100006*/ 0xa0ed,
/* 101677*/ 0xa0fc,
/* 6*/ 0xa0fe,
/* 100056*/ 0xa104,
/* 100000*/ 0xa105,
/* 100000*/ 0xa108,
/* 110000*/ 0xa114,
/* 100000*/ 0xa115,
/* 56*/ 0xa116,
/* 100032*/ 0xa124,
/* 76*/ 0xa12d,
/* 1*/ 0xa134,
/* 40*/ 0xa13d,
/* 100000*/ 0xa141,
/* 100041*/ 0xa142,
/* 1*/ 0xa143,
/* 1*/ 0xa144,
/* 110009*/ 0xa145,
/* 100007*/ 0xa146,
/* 100008*/ 0xa147,
/* 110000*/ 0xa148,
/* 100000*/ 0xa149,
/* 100000*/ 0xa14a,
/* 100000*/ 0xa14b,
/* 110000*/ 0xa14c,
/* 100002*/ 0xa14d,
/* 100000*/ 0xa150,
/* 100004*/ 0xa154,
/* 100000*/ 0xa156,
/* 100006*/ 0xa157,
/* 100000*/ 0xa158,
/* 100000*/ 0xa159,
/* 100000*/ 0xa15a,
/* 110000*/ 0xa15c,
/* 100002*/ 0xa15d,
/* 112*/ 0xa161,
/* 120006*/ 0xa164,
/* 100006*/ 0xa165,
/* 100000*/ 0xa167,
/* 6*/ 0xa168,
/* 10000*/ 0xa16b,
/* 120012*/ 0xa16c,
/* 100062*/ 0xa172,
/* 60*/ 0xa174,
/* 100000*/ 0xa175,
/* 100000*/ 0xa176,
/* 6*/ 0xa179,
/* 110000*/ 0xa17a,
/* 110008*/ 0xa17c,
/* 110014*/ 0xa17d,
/* 110000*/ 0xa184,
/* 110000*/ 0xa185,
/* 20000*/ 0xa186,
/* 100004*/ 0xa189,
/* 100000*/ 0xa18b,
/* 4*/ 0xa191,
/* 56*/ 0xa192,
/* 100000*/ 0xa1a1,
/* 100000*/ 0xa1a5,
/* 110000*/ 0xa1a6,
/* 110000*/ 0xa1a7,
/* 112033*/ 0xa1af,
/* 10000*/ 0xa1c1,
/* 100062*/ 0xa1c2,
/* 110009*/ 0xa1c4,
/* 110005*/ 0xa1c5,
/* 120000*/ 0xa1c6,
/* 15*/ 0xa1c7,
/* 4*/ 0xa1d0,
/* 2*/ 0xa1d2,
/* 4*/ 0xa1d4,
/* 100004*/ 0xa1d5,
/* 120036*/ 0xa1d6,
/* 110004*/ 0xa1d7,
/* 112038*/ 0xa1fa,
/* 20000*/ 0xa880,
/* 101499*/ 0xa910,
/* 3*/ 0xa921,
/* 100002*/ 0xa940,
/* 100000*/ 0xa941,
/* 100000*/ 0xa943,
/* 100000*/ 0xa945,
/* 110000*/ 0xa949,
/* 105160*/ 0xa950,
/* 120000*/ 0xa955,
/* 100000*/ 0xa959,
/* 310005*/ 0xa960,
/* 100000*/ 0xa965,
/* 1*/ 0xa967,
/* 290180*/ 0xa970,
/* 130000*/ 0xa971,
/* 3*/ 0xa974,
/* 111751*/ 0xa980,
/* 100036*/ 0xa981,
/* 100000*/ 0xa984,
/* 1*/ 0xa987,
/* 100040*/ 0xa990,
/* 5*/ 0xa991,
/* 2*/ 0xa993,
/* 1*/ 0xa997,
/* 110000*/ 0xa9a0,
/* 100194*/ 0xa9c0,
/* 100000*/ 0xa9d0,
/* 63*/ 0xa9f1,
/* 40*/ 0xa9f3,
/* 110000*/ 0xab40,
/* 100004*/ 0xab50,
/* 56*/ 0xab80,
/* 55*/ 0xabc0,
/* 100069*/ 0xabf1,
/* 100000*/ 0xabf3,
/* 100001*/ 0xabf5,
/* 100006*/ 0xabf7,
/* 50*/ 0xabf9,
/* 100014*/ 0xabfb,
/* 2*/ 0xabfd,
/* 2*/ 0xabff,
/* 20*/ 0xaf26,
/* 120000*/ 0xaf46,
/* 3*/ 0xaf47,
/* 1*/ 0xaf56,
/* 1*/ 0xaf5e,
/* 1*/ 0xb107,
/* 110112*/ 0xb10a,
/* 4*/ 0xb120,
/* 100001*/ 0xb12a,
/* 3*/ 0xb14a,
/* 5*/ 0xb170,
/* 1*/ 0xb18a,
/* 4*/ 0xb2d1,
/* 6*/ 0xb2e1,
/* 2*/ 0xb345,
/* 1*/ 0xb347,
/* 130000*/ 0xb349,
/* 4*/ 0xb359,
/* 2*/ 0xb35b,
/* 100006*/ 0xb369,
/* 6*/ 0xb36d,
/* 100017*/ 0xb379,
/* 2*/ 0xb37b,
/* 67*/ 0xb385,
/* 2*/ 0xb3cb,
/* 120002*/ 0xba51,
/* 110000*/ 0xbd21,
/* 2*/ 0xbd32,
/* 100000*/ 0xbd41,
/* 100000*/ 0xbd4a,
/* 2*/ 0xbd51,
/* 100000*/ 0xbd5a,
/* 2*/ 0xbd5b,
/* 4*/ 0xbd61,
/* 110000*/ 0xbd6a,
/* 2*/ 0xbd71,
/* 110000*/ 0xbd7a,
/* 1*/ 0xbd91,
/* 32*/ 0xbd9a,
/* 110000*/ 0xbda2,
/* 100000*/ 0xbda3,
/* 34*/ 0xbdc1,
/* 100000*/ 0xbdc2,
/* 110000*/ 0xbdc3,
/* 120000*/ 0xc841,
/* 100000*/ 0xcb41,
/* 110000*/ 0xcc41,
/* 110000*/ 0xce41,
/* 100000*/ 0xcf41,
/* 2*/ 0xe106,
/* 3*/ 0xe10a,
/* 110000*/ 0xe1ea,
/* 220*/ 0xe1ec,
/* 40*/ 0xe1f2,
/* 2*/ 0xe202,
/* 40*/ 0xe203,
/* 32*/ 0xe204,
/* 2*/ 0xe2ea,
/* 100000*/ 0xe2ec,
/* 110000*/ 0xe2ee,
/* 120000*/ 0xe2f9,
/* 100000*/ 0xe2fb,
/* 30000*/ 0xe3db,
/* 7*/ 0xe602,
/* 300128*/ 0xe603,
/* 15*/ 0xe604,
/* 110002*/ 0xe605,
/* 32*/ 0xe606,
/* 72*/ 0xe607,
/* 3*/ 0xe608,
/* 101624*/ 0xe609,
/* 34*/ 0xe60a,
/* 110002*/ 0xe60b,
/* 100040*/ 0xe60c,
/* 120000*/ 0xe60d,
/* 1*/ 0xe60e,
/* 1*/ 0xe60f,
/* 3*/ 0xe610,
/* 40*/ 0xe614,
/* 2*/ 0xe616,
/* 2*/ 0xe619,
/* 30*/ 0xe622,
/* 3*/ 0xe62c,
/* 180*/ 0xe62d,
/* 4*/ 0xe632,
/* 2*/ 0xe639,
/* 56*/ 0xe63a,
/* 40*/ 0xe640,
/* 2*/ 0xe6f2,
/* 300000*/ 0xe6f9,
/* 4*/ 0xe706,
/* 105158*/ 0xe7fc,
/* 100045*/ 0xe801,
/* 121677*/ 0xe802,
/* 110000*/ 0xe803,
/* 110002*/ 0xe804,
/* 110000*/ 0xe806,
/* 42*/ 0xe808,
/* 40*/ 0xe80a,
/* 2*/ 0xe80e,
/* 40*/ 0xe810,
/* 103*/ 0xe815,
/* 1*/ 0xe81b,
/* 2*/ 0xe81c,
/* 10000*/ 0xe820,
/* 2*/ 0xe831,
/* 2*/ 0xe83b,
/* 34*/ 0xe901,
/* 32*/ 0xe903,
/* 1*/ 0xe906,
/* 101679*/ 0xe908,
/* 32*/ 0xe90f,
/* 110000*/ 0xe916,
/* 24*/ 0xe9ee,
/* 22*/ 0xe9ef,
/* 110000*/ 0xea02,
/* 110000*/ 0xea03,
/* 100000*/ 0xea11,
/* 110000*/ 0xea13,
/* 4*/ 0xeaee,
/* 33*/ 0xeaf9,
/* 110000*/ 0xeb01,
/* 100000*/ 0xeb24,
/* 100000*/ 0xeb26,
/* 40*/ 0xebbf,
/* 110000*/ 0xee01,
/* 110002*/ 0xee02,
/* 8*/ 0xee03,
/* 130076*/ 0xee04,
/* 6*/ 0xee05,
/* 110002*/ 0xee06,
/* 1*/ 0xee0b,
/* 4*/ 0xee0e,
/* 1*/ 0xee0f,
/* 20000*/ 0xee11,
/* 100000*/ 0xee14,
/* 110000*/ 0xee15,
/* 1*/ 0xee18,
/* 1*/ 0xee27,
/* 1*/ 0xee2d,
/* 103*/ 0xee33,
/* 2*/ 0xee3b,
/* 1*/ 0xee42,
/* 3*/ 0xeee1,
/* 101539*/ 0xeee2,
/* 110000*/ 0xeef4,
/* 2*/ 0xeef9,
/* 100000*/ 0xeefa,
/* 14*/ 0xeefc,
/* 180*/ 0xeefd,
/* 2*/ 0xef02,
/* 1*/ 0xef04,
/* 2*/ 0xef11,
/* 2*/ 0xef15,
#endif
0,};

9
sim/z8k/sim.h
View file

@ -1,9 +0,0 @@
#define SIM_SINGLE_STEP 1
#define SIM_DONE 2
#define SIM_BREAKPOINT 3
#define SIM_INTERRUPT 4
#define SIM_BAD_INST 5
#define SIM_DIV_ZERO 6
#define SIM_BAD_SYSCALL 7
#define SIM_BAD_ALIGN 8
#define SIM_BAD_ADDR 9

784
sim/z8k/support.c
View file

@ -1,784 +0,0 @@
/* support routines for interpreted instructions
Copyright (C) 1992, 1993 Free Software Foundation, Inc.
This file is part of Z8KSIM
Z8KSIM is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
Z8KSIM is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Z8KZIM; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "config.h"
#include <ansidecl.h>
#include <signal.h>
#include <errno.h>
#include "tm.h"
#include "sim.h"
#include "mem.h"
#include <stdio.h>
#ifdef HAVE_TIME_H
#include <time.h>
#endif
#ifdef HAVE_SYS_TIMES_H
#include <sys/times.h>
#endif
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/param.h>
#include "gdb/callback.h"
#include "gdb/remote-sim.h"
#include "syscall.h"
static int get_now PARAMS ((void));
static int now_persec PARAMS ((void));
static int put_long PARAMS ((sim_state_type * context, int ptr, int value));
static int put_short PARAMS ((sim_state_type * context, int ptr, int value));
int sim_z8001_mode;
static int
get_now ()
{
#ifdef HAVE_SYS_TIMES_H
struct tms b;
times (&b);
return b.tms_utime + b.tms_stime;
#else
return time (0);
#endif
}
static int
now_persec ()
{
return 50;
}
/* #define LOG /* define this to print instruction use counts */
#ifdef __GNUC__
#define INLINE __inline__
#include "inlines.h"
#else
#include "inlines.h"
#endif
/* This holds the entire cpu context */
static sim_state_type the_state;
int
fail (context, dummy)
sim_state_type *context;
int dummy;
{
context->exception = SIM_BAD_INST;
return 1;
}
void
sfop_bad1 (context)
sim_state_type *context;
{
context->exception
= SIM_BAD_INST;
}
void
bfop_bad1 (context)
sim_state_type *context;
{
context->exception
= SIM_BAD_INST;
}
void
fop_bad (context)
sim_state_type *context;
{
context->exception =
SIM_BAD_INST;
}
/* Table of bit counts for all byte values */
char the_parity[256] =
{
0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4, 1, 2, 2, 3, 2, 3, 3,
4, 2, 3, 3, 4, 3, 4, 4, 5, 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4,
4, 5, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 1, 2, 2, 3, 2,
3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5,
4, 5, 5, 6, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 3, 4, 4,
5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7, 1, 2, 2, 3, 2, 3, 3, 4, 2, 3,
3, 4, 3, 4, 4, 5, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 2,
3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 3, 4, 4, 5, 4, 5, 5, 6,
4, 5, 5, 6, 5, 6, 6, 7, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5,
6, 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7, 3, 4, 4, 5, 4, 5,
5, 6, 4, 5, 5, 6, 5, 6, 6, 7, 4, 5, 5, 6, 5, 6, 6, 7, 5, 6, 6, 7, 6,
7, 7, 8};
int read ();
int write ();
int open ();
int close ();
int open ();
int close ();
int link ();
int fstat ();
static int
put_short (context, ptr, value)
sim_state_type *context;
int ptr;
int value;
{
put_word_mem_da (context, ptr, value);
return ptr + 2;
}
static int
put_long (context, ptr, value)
sim_state_type *context;
int
ptr;
int value;
{
put_long_mem_da (context, ptr, value);
return ptr + 4;
}
#define aptr(x) ((sitoptr(x)) + (char *)(context->memory))
static int args[3];
static int arg_index; /* Translate a z8k system call into a host system call */
void
support_call (context, sc)
sim_state_type *context;
int sc;
{
extern int errno;
int ret;
int retnext = 0;
int fd;
int olderrno = errno;
errno = 0;
switch (sc)
{
case SYS_ARG:
args[arg_index++] = context->regs[0].word << 16 | context->regs[1].word;
break;
case SYS_exit:
context->exception = SIM_DONE;
ret = args[0];
arg_index = 0;
break;
case SYS_close:
ret = close ((int) (args[0]));
arg_index = 0;
break;
case SYS_creat:
ret = creat (aptr (args[0]), args[1]);
arg_index = 0;
break;
case SYS_isatty:
ret = isatty (args[0]);
arg_index = 0;
break;
case SYS_open:
ret = open (aptr (args[0]), args[1], args[2]);
arg_index = 0;
break;
case SYS_lseek:
ret = lseek (args[0], (off_t) args[1], args[2]);
arg_index = 0;
break;
case SYS_read:
ret = read (args[0], aptr (args[1]), args[2]);
arg_index = 0;
break;
case SYS_write:
ret = write (args[0],aptr (args[1]), args[2]);
arg_index = 0;
break;
case SYS_time:
{
int dst = args[0];
ret = time (0);
if (dst)
{
put_long_mem_da (context,
sitoptr (dst), ret);
}
retnext = ret;
ret = retnext >> 16;
arg_index = 0;
}
break;
case SYS_fstat:
{
int buf;
struct stat host_stat;
fd = args[0];
buf = sitoptr (args[1]);
ret = fstat (fd, &host_stat);
buf = put_short (context, buf, host_stat.st_dev);
buf = put_short (context, buf, host_stat.st_ino);
/* FIXME: Isn't mode_t 4 bytes? */
buf = put_short (context, buf, host_stat.st_mode);
buf = put_short (context, buf, host_stat.st_nlink);
buf = put_short (context, buf, host_stat.st_uid);
buf = put_short (context, buf, host_stat.st_uid);
buf = put_short (context, buf, host_stat.st_rdev);
buf = put_long (context, buf, host_stat.st_size);
buf = put_long (context, buf, host_stat.st_atime);
arg_index = 0;
} break;
default:
case SYS_link:
context->exception = SIM_BAD_SYSCALL;
arg_index = 0;
break;
}
context->regs[2].word = ret;
context->regs[3].word = retnext;
context->regs[5].word = errno;
/* support for the stdcall calling convention */
context->regs[6].word = retnext;
context->regs[7].word = ret;
errno = olderrno;
}
#undef get_word_mem_da
int
get_word_mem_da (context, addr)
sim_state_type *context;
int addr;
{
return (get_byte_mem_da (context, addr) << 8) | (get_byte_mem_da (context, addr + 1));
}
#undef get_word_reg
int
get_word_reg (context, reg) sim_state_type
* context;
int reg;
{
return context->regs[reg].word;
}
#ifdef LOG
int log[64 * 1024];
#endif
void
tm_store_register (regno, value)
int regno;
int value;
{
switch
(regno)
{
case REG_PC:
the_state.sometimes_pc = value;
break;
default:
put_word_reg (&the_state, regno, value);
}
}
void
swap_long (buf, val)
char *buf;
int val;
{
buf[0] = val >> 24;
buf[1] = val >> 16;
buf[2] = val >> 8;
buf[3] = val >> 0;
}
void
swap_word (buf, val)
char *buf;
int val;
{
buf[0] = val >> 8;
buf[1] = val >> 0;
}
void
tm_fetch_register (regno, buf)
int regno;
char *buf;
{
switch
(regno)
{
case REG_CYCLES:
swap_long (buf, the_state.cycles);
break;
case REG_INSTS:
swap_long (buf, the_state.insts);
break;
case
REG_TIME:
swap_long (buf, the_state.ticks);
break;
case REG_PC:
swap_long (buf, the_state.sometimes_pc);
break;
case REG_SP:
{
if (sim_z8001_mode)
{
swap_long (buf, get_long_reg (&the_state, 14));
}
else
{
swap_long (buf, get_word_reg (&the_state, 15));
}
}
break;
case
REG_FP:
{
if (sim_z8001_mode)
{
swap_long (buf, get_long_reg
(&the_state, 10));
}
else
{
swap_long (buf,
get_word_reg (&the_state, 10));
}
}
break;
default:
{
swap_word (buf,
get_word_reg (&the_state, regno));
}
}
}
void
tm_resume (step)
int step;
{
int now = get_now ();
struct op_info
*p;
int word;
int pc;
extern int (*(sfop_table[])) ();
extern int (*(bfop_table[])) ();
int (*((*table))) ();
sim_state_type *context = &the_state;
if (step)
{
context->exception = SIM_SINGLE_STEP;
}
else
{
context->exception = 0;
}
pc = context->sometimes_pc;
if (sim_z8001_mode)
{
table = bfop_table;
pc = MAP_PHYSICAL_TO_LOGICAL (pc);
}
else
{
table = sfop_table;
}
do
{
word = get_word_mem_da (context, pc);
p = op_info_table + word;
#ifdef LOG
log[word]++;
#endif
pc = table[p->exec] (context, pc, word);
context->insts++;
}
while (!context->exception);
context->sometimes_pc = MAP_LOGICAL_TO_PHYSICAL (pc);
context->ticks += get_now () - now;
}
int
tm_signal ()
{
return the_state.exception;
}
void
tm_info_print (x)
sim_state_type *x;
{
double timetaken = (double) x->ticks / (double) now_persec ();
double virttime = x->cycles / 4.0e6;
printf ("instructions executed : %9d\n", x->insts);
printf ("cycles counted : %9d \n", x->cycles);
printf ("cycles / inst : %9.1f \n", (double) x->cycles / (double) x->insts);
printf ("virtual time taked (at 4 Mhz) : %9.1f \n", virttime);
printf ("real time taken : %9.1f \n", timetaken);
if (timetaken)
{
printf ("virtual instructions per second : %9.1f\n", x->insts / timetaken);
printf ("emulation speed : %9.1f%%\n", virttime / timetaken * 100.0);
}
#ifdef LOG
{
extern int quick[];
for (i = 0; quick[i]; i++)
{
log[quick[i]] += 100000;
}
}
for (i = 0; i < 64 * 1024; i++)
{
if (log[i])
{
printf (" /*%7d*/ 0x%x,\n", log[i], i);
}
}
#endif
}
int
sim_trace (sd)
SIM_DESC sd;
{
int i;
char buffer[10];
int r;
printf ("\n");
for (r = 0; r < 16; r++)
{
int m;
printf ("r%2d", r);
printf ("=%04x ", get_word_reg (&the_state,
r));
for (m = -4; m < 8; m++)
{
if (m == 0)
printf (">");
printf ("%04x ",
get_word_mem_da (&the_state, (0xfffe & get_word_reg (&the_state, r)) + m * 2));
}
printf ("\n");
}
printf ("\n");
printf ("%9d %9d %08x ", the_state.cycles,
the_state.insts, the_state.sometimes_pc);
for (i = 0; i < 6; i++)
{
buffer[i] = get_byte_mem_da (&the_state,
the_state.sometimes_pc + i);
}
print_insn_z8001 (the_state.sometimes_pc, buffer, stdout);
printf
("\n");
tm_resume (1);
if (the_state.exception != SIM_SINGLE_STEP)
return 1;
return 0;
}
void
tm_state (x)
sim_state_type *x;
{
*x = the_state;
}
void
tm_exception (x)
int x;
{
the_state.exception = x;
}
int
tm_read_byte (x)
int x;
{
x &= 0x3f00ffff;
return sim_read_byte (&the_state, x);
}
void
tm_write_byte (x, y)
int x, y;
{
x &= 0x3f00ffff;
sim_write_byte (&the_state, x, y);
}
#define SIGN(x) ((x) & MASK)
normal_flags_32(context,d,sa,sb,sub)
sim_state_type *context;
unsigned int d;
unsigned int sa;
unsigned int sb;
unsigned int sub;
{
#undef MASK
#define MASK (1<<31)
context->broken_flags = 0;
if (sub)
PSW_CARRY = sa < sb;
else
PSW_CARRY = d < sa;
if (sub)
PSW_OVERFLOW = (SIGN(sa) != SIGN(sb)) && (SIGN(d) == SIGN(sb));
else
PSW_OVERFLOW = (SIGN(sa) == SIGN(sb)) && (SIGN(d) != SIGN(sb));
PSW_SIGN = ((int)d) <0;
PSW_ZERO = d == 0;
}
normal_flags_16(context,d,sal,sbl,sub)
sim_state_type *context;
unsigned int d;
unsigned int sal;
unsigned int sbl;
unsigned short int sub;
{
unsigned short sa = sal;
unsigned short sb = sbl;
#undef MASK
#define MASK (1<<15)
context->broken_flags = 0;
if (sub)
PSW_CARRY = sal < sbl;
else
PSW_CARRY = (d & 0x10000) != 0;
if (sub)
PSW_OVERFLOW = (SIGN(sa) != SIGN(sb)) && (SIGN(d) == SIGN(sb));
else
PSW_OVERFLOW = (SIGN(sa) == SIGN(sb)) && (SIGN(d) != SIGN(sb));
PSW_SIGN = ((short int)d) <0;
PSW_ZERO = ((short)d) == 0;
}
normal_flags_8(context,d,sa,sb,sub)
sim_state_type *context;
unsigned char d;
unsigned char sa;
unsigned char sb;
unsigned char sub;
{
#undef MASK
#define MASK (1<<7)
context->broken_flags = 0;
if (sub)
PSW_CARRY = sa < sb;
else
PSW_CARRY = d < sa;
if (sub)
PSW_OVERFLOW = (SIGN(sa) != SIGN(sb)) && (SIGN(d) == SIGN(sb));
else
PSW_OVERFLOW = (SIGN(sa) == SIGN(sb)) && (SIGN(d) != SIGN(sb));
PSW_SIGN = ((char)d) <0;
PSW_ZERO = d == 0;
}
static int
is_cond_true (context, c)
sim_state_type *context;
int c;
{
switch (c)
{
case T:
return 1;
case F:
return 0; /* F */
case LE:
return (PSW_ZERO | (PSW_SIGN ^ PSW_OVERFLOW)) & 1; /*LE */
case GT:
return (~(PSW_ZERO | (PSW_SIGN ^ PSW_OVERFLOW))) & 1; /*GT */
case 0x5:
return (PSW_SIGN & 1); /* sign */
case 0xd:
return (~(PSW_SIGN)) & 1; /* not sign */
case 0x3:
return ((PSW_CARRY | PSW_ZERO) & 1); /* ule*/
case UGT:
return ((~(PSW_CARRY | PSW_ZERO)) & 1); /* ugt */
case 0x4:
return (PSW_OVERFLOW & 1);/* overflow */
case 0xc:
return (~(PSW_OVERFLOW)) & 1; /* not overflow */
case LT:
return (PSW_SIGN ^ PSW_OVERFLOW) & 1; /* LT */
case GE:
return (~(PSW_SIGN ^ PSW_OVERFLOW)) & 1; /* GE */
case EQ:
return (PSW_ZERO) & 1; /* zero */
case NE:
return ((~PSW_ZERO) & 1); /* not zero */
case 0x7:
return (PSW_CARRY) & 1; /* carry */
case 0xf:
return (~PSW_CARRY) & 1; /* not carry */
default:
abort ();
}
}
int
COND (context, c)
sim_state_type *context;
int c;
{
if (c == 8)
return 1;
/* We can calculate what the flags would have been by
looking at the src and dst and size of the operation */
if (context->broken_flags)
{
int slow = 0;
int size;
int dst;
int srca;
int srcb;
int mask;
int ans;
/* see if we can short-cut the nasty flag calcs */
switch (size = context->size)
{
default:
abort();
return 0;
case 8:
srca = (char) (context->srca);
srcb = (char) (context->srcb);
dst = (char) (context->dst);
mask = 0xff;
break;
case 16:
srca = (short) (context->srca);
srcb = (short) (context->srcb);
dst = (short) (context->dst);
mask = 0xffff;
break;
case 32:
srca = (long) (context->srca);
srcb = (long) (context->srcb);
dst = (long) (context->dst);
mask = 0xffffffff;
break;
}
switch (c)
{
case T:
return 1;
case F:
return 0;
case EQ:
return !dst;
case NE:
return dst;
case GT:
ans = ((dst)) > 0;
if (slow)
{
if (is_cond_true (context, c) != ans)
abort ();
}
return ans;
case LE:
ans = ((dst)) <= 0;
if (slow)
{
if (is_cond_true (context, c) != ans)
abort ();
}
return ans;
case GE:
ans = ((dst)) >= 0;
if (slow)
{
if (is_cond_true (context, c) != ans)
abort ();
}
return ans;
case LT:
ans = ((dst)) < 0;
if (slow)
{
if (is_cond_true (context, c) != ans)
abort ();
}
return ans;
default:
break;
}
/* Can't fake it, we'll have to work out the flags the
hard way */
makeflags (context, mask);
}
/* don't know how to fake a test, inspect the flags
the hard way */
return is_cond_true (context, c);
}

43
sim/z8k/syscall.h
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@ -1,43 +0,0 @@
/* system call numbers
Copyright (C) 1992, 1993 Free Software Foundation, Inc.
This file is part of Z8KSIM
Z8KSIM is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
Z8KSIM is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Z8KZIM; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#define SYS_exit 1
#define SYS_fork 2
#define SYS_read 3
#define SYS_write 4
#define SYS_open 5
#define SYS_close 6
#define SYS_wait4 7
#define SYS_creat 8
#define SYS_link 9
#define SYS_unlink 10
#define SYS_execv 11
#define SYS_chdir 12
#define SYS_mknod 14
#define SYS_chmod 15
#define SYS_chown 16
#define SYS_lseek 19
#define SYS_getpid 20
#define SYS_isatty 21
#define SYS_fstat 22
#define SYS_time 23
#define SYS_ARG 24

13
sim/z8k/tconfig.in
View file

@ -1,13 +0,0 @@
/* z8k target configuration file. */
/* Define this if the simulator supports profiling.
See the mips simulator for an example.
This enables the `-p foo' and `-s bar' options.
The target is required to provide sim_set_profile{,_size}. */
/* #define SIM_HAVE_PROFILE */
/* Define this if the simulator uses an instruction cache.
See the h8/300 simulator for an example.
This enables the `-c size' option to set the size of the cache.
The target is required to provide sim_set_simcache_size. */
/* #define SIM_HAVE_SIMCACHE */

192
sim/z8k/tm.h
View file

@ -1,192 +0,0 @@
/* tm.h
Copyright (C) 1992, 1993 Free Software Foundation, Inc.
This file is part of Z8KSIM
Z8KSIM is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
Z8KSIM is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Z8KZIM; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef _TM_H
#define _TM_H
#ifdef __FOOBEYGNUC__
typedef SFtype __attribute__ ((mode (SF)));
typedef DFtype __attribute__ ((mode (DF)));
typedef int HItype __attribute__ ((mode (HI)));
typedef int SItype __attribute__ ((mode (SI)));
typedef unsigned int UHItype __attribute__ ((mode (HI)));
typedef unsigned int USItype __attribute__ ((mode (SI)));
#else
typedef float SFtype;
typedef double DFtype;
typedef short int HItype;
typedef long int SItype;
typedef unsigned short UHItype ;
typedef unsigned int USItype ;
#endif
typedef struct UDIstruct
{
USItype high;
USItype low;
} UDItype;
#define BIG_ENDIAN_HOST
typedef unsigned int sim_phys_addr_type;
typedef unsigned int sim_logical_addr_type;
#define PAGE_POWER 23 /* only one pages */
#define MAP_PHYSICAL_TO_LOGICAL(x) (((x >> 8) & 0x7f0000) | (x & 0xffff))
#define MAP_LOGICAL_TO_PHYSICAL(x) (((x <<8) & 0x7f000000) | (x & 0xffff))
#define REG_PC 17
#define REG_CYCLES 18
#define REG_INSTS 19
#define REG_TIME 20
#define REG_FP 21
#define REG_SP 22
#define REG_CCR 16
#define SET_REG(x,y) set_reg(x,y)
#define SINGLE_STEP 1
#define PSW_CARRY context->carry
#define PSW_OP context->op
#define PSW_OVERFLOW context->overflow
#define PSW_SIGN context->sign
#define PSW_ZERO context->zero
#define GET_PC() context->pc
#define SET_PC(x) context->pc = x
struct op_info
{
short int exec;
};
extern struct op_info op_info_table[];
typedef union
{
unsigned short int word;
}
borw_type;
typedef struct state_struct
{
unsigned short *memory;
int carry;
int sign;
int zero;
int overflow;
int op;
int cycles;
borw_type regs[16];
sim_phys_addr_type sometimes_pc;
#ifdef __GNUC__
volatile
#endif
int exception;
#define iwords_0 iwords0
#define iwords_1 iwords1
#define iwords_2 iwords2
#define iwords_3 iwords3
#define ibytes_0 (iwords_0>>8)
#define ibytes_1 (iwords_0&0xff)
#define ibytes_2 (iwords_1>>8)
#define ibytes_3 (iwords_1& 0xff)
#define ibytes_4 (iwords_2>>8)
int insts;
int ticks;
int next_inst;
int broken_flags;
int srca;
int srcb;
int dst;
int size;
}
sim_state_type;
#define CMP_FLAGS 100
#define TST_FLAGS 101
#endif
extern int get_word_mem_da PARAMS((sim_state_type *context, int addr));
extern int get_word_reg PARAMS((sim_state_type *context, int reg));
extern void support_call PARAMS((sim_state_type *context, int sc));
extern void tm_exception PARAMS((int x));
extern int tm_read_byte PARAMS((int x));
extern int tm_signal PARAMS((void));
extern void tm_state PARAMS((sim_state_type *x));
extern void tm_write_byte PARAMS((int x, int y));
extern void bfop_bad1 PARAMS(());
extern int fail PARAMS((sim_state_type *context, int v));
extern void fop_bad PARAMS((sim_state_type *context));
extern void sfop_bad1 PARAMS(());
extern void swap_long PARAMS((char *buf, int val));
extern void swap_word PARAMS((char *buf, int val));
extern void tm_fetch_register PARAMS((int regno, char *buf));
extern void tm_info_print PARAMS((sim_state_type *x));
extern void tm_resume PARAMS((int step));
extern void tm_store_register PARAMS((int regno, int value));
#ifndef __GNUC__
/* If were using gnuc then these will be inlined, so the prototypes
won't be right */
long int sitoptr PARAMS((long int si));
long int ptrtosi PARAMS((long int ptr));
void put_long_reg PARAMS((sim_state_type *context, int reg, int val));
void put_quad_reg PARAMS((sim_state_type *context, int reg, int val1, int val2));
void put_word_reg PARAMS((sim_state_type *context, int reg, int val));
SItype get_long_reg PARAMS((sim_state_type *context, int reg));
void put_byte_reg PARAMS((sim_state_type *context, int reg, int val));
int get_byte_reg PARAMS((sim_state_type *context, int reg));
void put_word_mem_da PARAMS((sim_state_type *context, int addr, int value));
unsigned char get_byte_mem_da PARAMS((sim_state_type *context, int addr));
void put_byte_mem_da PARAMS((sim_state_type *context, int addr, int value));
SItype get_long_mem_da PARAMS((sim_state_type *context, int addr));
void put_long_mem_da PARAMS((sim_state_type *context, int addr, int value));
int get_word_mem_ir PARAMS((sim_state_type *context, int reg));
void put_word_mem_ir PARAMS((sim_state_type *context, int reg, int value));
int get_byte_mem_ir PARAMS((sim_state_type *context, int reg));
void put_byte_mem_ir PARAMS((sim_state_type *context, int reg, int value));
int get_long_mem_ir PARAMS((sim_state_type *context, int reg));
void put_long_mem_ir PARAMS((sim_state_type *context, int reg, int value));
void put_long_mem_x PARAMS((sim_state_type *context, int base, int reg, int value));
void put_word_mem_x PARAMS((sim_state_type *context, int base, int reg, int value));
void put_byte_mem_x PARAMS((sim_state_type *context, int base, int reg, int value));
int get_word_mem_x PARAMS((sim_state_type *context, int base, int reg));
int get_byte_mem_x PARAMS((sim_state_type *context, int base, int reg));
int get_long_mem_x PARAMS((sim_state_type *context, int base, int reg));
int COND PARAMS((sim_state_type *context, int c));
void NORMAL_FLAGS PARAMS((sim_state_type *context, int size, int dst, int srca, int srcb));
void TEST_NORMAL_FLAGS PARAMS((sim_state_type *context, int size, int dst));
void put_ptr_long_reg PARAMS((sim_state_type *context, int reg, int val));
long int get_ptr_long_reg PARAMS((sim_state_type *context, int reg));
long int get_ptr_long_mem_ir PARAMS((sim_state_type *context, int reg));
long int get_ptr_long_mem_da PARAMS((sim_state_type *context, long int addr));
void put_ptr_long_mem_da PARAMS((sim_state_type *context, long int addr, long int ptr));
#endif

1948
sim/z8k/writecode.c
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