Add support for M340
This commit is contained in:
Nick Clifton
parent
6c784c9aab
commit
bec504668f
3 changed files with 198 additions and 6 deletions
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@ -1,3 +1,21 @@
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2000-02-10 Nick Clifton <nickc@cygnus.com>
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* config/tc-mcore.c (INST_BYTE0): Redefine to handle big and
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little endian targets.
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(INST_BYTE1): Redefine to handle big and little endian
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targets.
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(cpu_type): New type: Select between M340 and M210.
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(parse_psrmod): New function: Parse the PSRCLR and PSRSET
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instructions of the M340.
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(md_assemble): Add support for the MULSH and OPSR classes of
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instructions.
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(md_atof): Add support for little endian targets.
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(md_parse_option): Add support for -EL, -EB and -mcpu command
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line switches.
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(md_convert_frag): Add support for little endian targets.
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(md_apply_fix3): Add support for little endian targets.
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(md_number_to_chars): Add support for little endian targets.
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2000-02-10 Timothy Wall <twall@redhat.com>
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* read.c (read_a_source_file): If TC_START_LABEL_WITHOUT_COLON is
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@ -48,6 +48,7 @@ static char * parse_exp PARAMS ((char *, expressionS *));
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static char * parse_rt PARAMS ((char *, char **, int, expressionS *));
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static char * parse_imm PARAMS ((char *, unsigned *, unsigned, unsigned));
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static char * parse_mem PARAMS ((char *, unsigned *, unsigned *, unsigned));
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static char * parse_psrmod PARAMS ((char *, unsigned *));
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static void make_name PARAMS ((char *, char *, int));
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static int enter_literal PARAMS ((expressionS *, int));
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static void dump_literals PARAMS ((int));
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@ -64,8 +65,8 @@ static void mcore_s_comm PARAMS ((int));
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object. They should use MCORE_INST_XXX macros to get the opcodes
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and then use these two macros to crack the MCORE_INST value into
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the appropriate byte values. */
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#define INST_BYTE0(x) (((x) >> 8) & 0xFF)
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#define INST_BYTE1(x) ((x) & 0xFF)
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#define INST_BYTE0(x) (target_big_endian ? (((x) >> 8) & 0xFF) : ((x) & 0xFF))
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#define INST_BYTE1(x) (target_big_endian ? ((x) & 0xFF) : (((x) >> 8) & 0xFF))
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const char comment_chars[] = "#/";
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const char line_separator_chars[] = ";";
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@ -103,6 +104,14 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
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#define U12_LEN 2
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#define U32_LEN 8 /* allow for align */
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typedef enum
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{
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M210,
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M340
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}
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cpu_type;
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cpu_type cpu = M340;
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/* Initialize the relax table */
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const relax_typeS md_relax_table[] =
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@ -586,6 +595,46 @@ parse_creg (s, reg)
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return s;
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}
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static char *
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parse_psrmod (s, reg)
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char * s;
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unsigned * reg;
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{
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int i;
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char buf[10];
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static struct psrmods
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{
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char * name;
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unsigned int value;
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}
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psrmods[] =
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{
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{ "ie", 1 },
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{ "fe", 2 },
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{ "ee", 4 },
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{ "af", 8 } /* Really 0 and non-combinable. */
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};
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for (i = 0; i < 2; i++)
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buf[i] = isascii (s[i]) ? tolower (s[i]) : 0;
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for (i = sizeof (psrmods) / sizeof (psrmods[0]); i--;)
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{
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if (! strncmp (psrmods[i].name, buf, 2))
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{
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* reg = psrmods[i].value;
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return s + 2;
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}
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}
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as_bad (_("bad/missing psr specifier"));
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* reg = 0;
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return s;
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}
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static char *
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parse_exp (s, e)
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char * s;
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@ -1032,6 +1081,13 @@ md_assemble (str)
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output = frag_more (2);
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break;
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case MULSH:
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if (cpu == M210)
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{
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as_bad (_("M340 specific opcode used when assembling for M210"));
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break;
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}
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/* drop through... */
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case O2:
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op_end = parse_reg (op_end + 1, & reg);
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inst |= reg;
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@ -1601,6 +1657,35 @@ md_assemble (str)
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output = frag_more (2);
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break;
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case OPSR:
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if (cpu == M210)
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{
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as_bad (_("M340 specific opcode used when assembling for M210"));
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break;
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}
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op_end = parse_psrmod (op_end + 1, & reg);
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/* Look for further selectors. */
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while (* op_end == ',')
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{
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unsigned value;
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op_end = parse_psrmod (op_end + 1, & value);
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if (value & reg)
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as_bad (_("duplicated psr bit specifier"));
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reg |= value;
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}
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if (reg > 8)
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as_bad (_("`af' must appear alone"));
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inst |= (reg & 0x7);
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output = frag_more (2);
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break;
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default:
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as_bad (_("unimplemented opcode \"%s\""), name);
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}
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@ -1690,6 +1775,16 @@ md_atof (type, litP, sizeP)
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*sizeP = prec * sizeof (LITTLENUM_TYPE);
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if (! target_big_endian)
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{
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for (i = prec - 1; i >= 0; i--)
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{
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md_number_to_chars (litP, (valueT) words[i],
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sizeof (LITTLENUM_TYPE));
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litP += sizeof (LITTLENUM_TYPE);
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}
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}
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else
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for (i = 0; i < prec; i++)
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{
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md_number_to_chars (litP, (valueT) words[i],
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@ -1706,6 +1801,9 @@ CONST char * md_shortopts = "";
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#define OPTION_JSRI2BSR_OFF (OPTION_MD_BASE + 1)
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#define OPTION_SIFILTER_ON (OPTION_MD_BASE + 2)
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#define OPTION_SIFILTER_OFF (OPTION_MD_BASE + 3)
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#define OPTION_CPU (OPTION_MD_BASE + 4)
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#define OPTION_EB (OPTION_MD_BASE + 5)
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#define OPTION_EL (OPTION_MD_BASE + 6)
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struct option md_longopts[] =
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{
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@ -1713,6 +1811,9 @@ struct option md_longopts[] =
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{ "jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_ON},
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{ "sifilter", no_argument, NULL, OPTION_SIFILTER_ON},
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{ "no-sifilter", no_argument, NULL, OPTION_SIFILTER_OFF},
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{ "cpu", required_argument, NULL, OPTION_CPU},
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{ "EB", no_argument, NULL, OPTION_EB},
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{ "EL", no_argument, NULL, OPTION_EL},
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{ NULL, no_argument, NULL, 0}
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};
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@ -1728,7 +1829,20 @@ md_parse_option (c, arg)
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switch (c)
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{
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case OPTION_CPU:
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if (streq (arg, "210"))
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{
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cpu = M210;
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target_big_endian = 1;
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}
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else if (streq (arg, "340"))
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cpu = M340;
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else
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as_warn (_("unrecognised cpu type '%s'"), arg);
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break;
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case OPTION_EB: target_big_endian = 1; break;
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case OPTION_EL: target_big_endian = 0; cpu = M340; break;
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case OPTION_JSRI2BSR_ON: do_jsri2bsr = 1; break;
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case OPTION_JSRI2BSR_OFF: do_jsri2bsr = 0; break;
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case OPTION_SIFILTER_ON: sifilter_mode = 1; break;
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@ -1746,7 +1860,10 @@ md_show_usage (stream)
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fprintf (stream, _("\
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MCORE specific options:\n\
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-{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis)\n\
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-{no-}sifilter {dis}able silicon filter behavior (def: dis)"));
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-{no-}sifilter {dis}able silicon filter behavior (def: dis)\n\
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-cpu=[210|340] select CPU type\n\
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-EB assemble for a big endian system (default)\n\
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-EL assemble for a little endian system\n"));
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}
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int md_short_jump_size;
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@ -1800,6 +1917,16 @@ md_convert_frag (abfd, sec, fragP)
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as_bad (_("odd displacement at %x"), next_inst - 2);
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disp >>= 1;
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if (! target_big_endian)
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{
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t0 = buffer[1] & 0xF8;
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md_number_to_chars (buffer, disp, 2);
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buffer[1] = (buffer[1] & 0x07) | t0;
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}
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else
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{
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t0 = buffer[0] & 0xF8;
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@ -1829,6 +1956,9 @@ md_convert_frag (abfd, sec, fragP)
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int first_inst = fragP->fr_fix + fragP->fr_address;
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int needpad = (first_inst & 3);
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if (! target_big_endian)
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buffer[1] ^= 0x08;
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else
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buffer[0] ^= 0x08; /* Toggle T/F bit */
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buffer[2] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi */
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@ -1836,6 +1966,12 @@ md_convert_frag (abfd, sec, fragP)
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if (needpad)
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{
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if (! target_big_endian)
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{
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buffer[0] = 4; /* branch over jmpi, pad, and ptr */
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buffer[2] = 1; /* jmpi offset of 1 gets the pointer */
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}
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else
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{
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buffer[1] = 4; /* branch over jmpi, pad, and ptr */
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buffer[3] = 1; /* jmpi offset of 1 gets the pointer */
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@ -1860,6 +1996,12 @@ md_convert_frag (abfd, sec, fragP)
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shrinking the fragment. '3' is the amount of code that
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we inserted here, but '4' is right for the space we reserved
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for this fragment. */
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if (! target_big_endian)
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{
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buffer[0] = 3; /* branch over jmpi, and ptr */
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buffer[2] = 0; /* jmpi offset of 0 gets the pointer */
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}
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else
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{
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buffer[1] = 3; /* branch over jmpi, and ptr */
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buffer[3] = 0; /* jmpi offset of 0 gets the pointer */
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@ -1880,6 +2022,9 @@ md_convert_frag (abfd, sec, fragP)
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the branch displacement so that it goes beyond the
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full length of the fragment, not just what we actually
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filled in. */
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if (! target_big_endian)
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buffer[0] = 4; /* jmpi, ptr, and the 'tail pad' */
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else
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buffer[1] = 4; /* jmpi, ptr, and the 'tail pad' */
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}
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@ -1905,6 +2050,9 @@ md_convert_frag (abfd, sec, fragP)
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if (needpad)
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{
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if (! target_big_endian)
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buffer[0] = 1; /* jmpi offset of 1 since padded */
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else
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buffer[1] = 1; /* jmpi offset of 1 since padded */
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buffer[2] = 0; /* alignment */
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buffer[3] = 0;
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@ -1921,6 +2069,9 @@ md_convert_frag (abfd, sec, fragP)
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}
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else
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{
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if (! target_big_endian)
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buffer[0] = 0; /* jmpi offset of 0 if no pad */
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else
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buffer[1] = 0; /* jmpi offset of 0 if no pad */
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buffer[2] = 0; /* space for 32 bit address */
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buffer[3] = 0;
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@ -1988,8 +2139,16 @@ md_apply_fix3 (fixP, valp, segment)
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as_bad_where (file, fixP->fx_line,
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_("pcrel for branch to %s too far (0x%x)"),
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symname, val);
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if (target_big_endian)
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{
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buf[0] |= ((val >> 8) & 0x7);
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buf[1] |= (val & 0xff);
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}
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else
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{
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buf[0] |= ((val >> 8) & 0x7);
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buf[1] |= (val & 0xff);
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}
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break;
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case BFD_RELOC_MCORE_PCREL_IMM8BY4: /* lower 8 bits of 2 byte opcode */
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@ -1999,6 +2158,8 @@ md_apply_fix3 (fixP, valp, segment)
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as_bad_where (file, fixP->fx_line,
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_("pcrel for lrw/jmpi/jsri to %s too far (0x%x)"),
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symname, val);
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else if (! target_big_endian)
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buf[0] |= (val & 0xff);
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else
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buf[1] |= (val & 0xff);
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break;
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@ -2008,6 +2169,9 @@ md_apply_fix3 (fixP, valp, segment)
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as_bad_where (file, fixP->fx_line,
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_("pcrel for loopt too far (0x%x)"), val);
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val /= 2;
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if (! target_big_endian)
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buf[0] |= (val & 0xf);
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else
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buf[1] |= (val & 0xf);
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break;
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@ -2144,6 +2308,16 @@ md_number_to_chars (ptr, use, nbytes)
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valueT use;
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int nbytes;
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{
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if (! target_big_endian)
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switch (nbytes)
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{
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case 4: ptr[3] = (use >> 24) & 0xff; /* fall through */
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case 3: ptr[2] = (use >> 16) & 0xff; /* fall through */
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case 2: ptr[1] = (use >> 8) & 0xff; /* fall through */
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case 1: ptr[0] = (use >> 0) & 0xff; break;
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default: abort ();
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}
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else
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switch (nbytes)
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{
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case 4: *ptr++ = (use >> 24) & 0xff; /* fall through */
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@ -1,6 +1,6 @@
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/* This file is tc-mcore.h
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Copyright (C) 1999 Free Software Foundation, Inc.
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Copyright (C) 1999, 2000 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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@ -15,8 +15,8 @@
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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along with GAS; see the file COPYING. If not, write to the
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Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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02111-1307, USA. */
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#ifndef TC_MCORE
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