* sim-fpu.h (enum sim_fpu_class): Add sim_fpu_class_denorm.
(sim_fpu_fpto, sim_fpu_tofp): Define.
This commit is contained in:
Andrew Cagney
parent
3c1e924307
commit
bdfe5c0439
3 changed files with 351 additions and 52 deletions
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@ -1,3 +1,8 @@
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Mon Feb 23 13:24:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-fpu.h (enum sim_fpu_class): Add sim_fpu_class_denorm.
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(sim_fpu_fpto, sim_fpu_tofp): Define.
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Fri Feb 20 18:08:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-fpu.c (sim_fpu_cmp): New function.
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@ -163,6 +163,7 @@ typedef union {
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#define MAX_UINT (is_64bit ? MAX_UINT64 : MAX_UINT32)
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#define NR_INTBITS (is_64bit ? 64 : 32)
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/* Squeese an unpacked sim_fpu struct into a 32/64 bit integer */
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STATIC_INLINE_SIM_FPU (unsigned64)
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pack_fpu (const sim_fpu *src,
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int is_double)
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@ -202,6 +203,7 @@ pack_fpu (const sim_fpu *src,
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fraction = 0;
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break;
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case sim_fpu_class_number:
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case sim_fpu_class_denorm:
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ASSERT (src->fraction >= IMPLICIT_1);
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ASSERT (src->fraction < IMPLICIT_2);
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if (src->normal_exp < NORMAL_EXPMIN)
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@ -293,6 +295,7 @@ pack_fpu (const sim_fpu *src,
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}
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/* Unpack a 32/64 bit integer into a sim_fpu structure */
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STATIC_INLINE_SIM_FPU (void)
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unpack_fpu (sim_fpu *dst, unsigned64 packed, int is_double)
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{
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@ -315,7 +318,7 @@ unpack_fpu (sim_fpu *dst, unsigned64 packed, int is_double)
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so there isn't a leading implicit one - we'll shift it so
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it gets one. */
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dst->normal_exp = exp - EXPBIAS + 1;
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dst->class = sim_fpu_class_number;
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dst->class = sim_fpu_class_denorm;
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dst->sign = sign;
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fraction <<= NR_GUARDS;
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while (fraction < IMPLICIT_1)
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@ -389,6 +392,7 @@ unpack_fpu (sim_fpu *dst, unsigned64 packed, int is_double)
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}
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/* Convert a floating point into an integer */
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STATIC_INLINE_SIM_FPU (int)
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fpu2i (signed64 *i,
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const sim_fpu *s,
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@ -488,6 +492,7 @@ fpu2i (signed64 *i,
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return status;
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}
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/* convert an integer into a floating point */
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STATIC_INLINE_SIM_FPU (int)
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i2fpu (sim_fpu *f, signed64 i, int is_64bit)
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{
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@ -559,6 +564,7 @@ i2fpu (sim_fpu *f, signed64 i, int is_64bit)
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}
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/* Convert a floating point into an integer */
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STATIC_INLINE_SIM_FPU (int)
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fpu2u (unsigned64 *u, const sim_fpu *s, int is_64bit)
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{
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@ -615,6 +621,7 @@ fpu2u (unsigned64 *u, const sim_fpu *s, int is_64bit)
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return 0;
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}
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/* Convert an unsigned integer into a floating point */
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STATIC_INLINE_SIM_FPU (int)
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u2fpu (sim_fpu *f, unsigned64 u, int is_64bit)
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{
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@ -831,6 +838,7 @@ do_round (sim_fpu *f,
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return sim_fpu_status_invalid_snan;
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break;
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case sim_fpu_class_number:
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case sim_fpu_class_denorm:
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{
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int status;
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ASSERT (f->fraction < IMPLICIT_2);
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@ -846,10 +854,11 @@ do_round (sim_fpu *f,
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if (shift + NR_GUARDS <= NR_FRAC_GUARD + 1
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&& !(denorm & sim_fpu_denorm_zero))
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{
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status = do_normal_round (f, shift + NR_GUARDS, round);
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if (f->fraction == 0) /* rounding underflowed */
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status |= do_normal_underflow (f, is_double, round);
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{
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status |= do_normal_underflow (f, is_double, round);
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}
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else if (f->normal_exp < NORMAL_EXPMIN) /* still underflow? */
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{
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status |= sim_fpu_status_denorm;
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@ -858,6 +867,8 @@ do_round (sim_fpu *f,
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before rounding, some after! */
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if (status & sim_fpu_status_inexact)
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status |= sim_fpu_status_underflow;
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/* Flag that resultant value has been denormalized */
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f->class = sim_fpu_class_denorm;
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}
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else if ((denorm & sim_fpu_denorm_underflow_inexact))
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{
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@ -885,7 +896,8 @@ do_round (sim_fpu *f,
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/* oops! rounding caused overflow */
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status |= do_normal_overflow (f, is_double, round);
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}
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ASSERT ((f->class == sim_fpu_class_number)
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ASSERT ((f->class == sim_fpu_class_number
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|| f->class == sim_fpu_class_denorm)
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<= (f->fraction < IMPLICIT_2 && f->fraction >= IMPLICIT_1));
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return status;
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}
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@ -1959,6 +1971,7 @@ sim_fpu_is_number (const sim_fpu *d)
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{
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switch (d->class)
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{
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case sim_fpu_class_denorm:
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case sim_fpu_class_number:
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return 1;
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default:
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@ -1966,6 +1979,18 @@ sim_fpu_is_number (const sim_fpu *d)
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}
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}
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INLINE_SIM_FPU (int)
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sim_fpu_is_denorm (const sim_fpu *d)
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{
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switch (d->class)
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{
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case sim_fpu_class_denorm:
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return 1;
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default:
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return 0;
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}
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}
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INLINE_SIM_FPU (int)
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sim_fpu_is (const sim_fpu *d)
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{
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@ -1980,21 +2005,14 @@ sim_fpu_is (const sim_fpu *d)
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return SIM_FPU_IS_PINF;
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case sim_fpu_class_number:
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if (d->sign)
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return SIM_FPU_IS_NNUM;
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return SIM_FPU_IS_NNUMBER;
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else
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return SIM_FPU_IS_PNUM;
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#if 0
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/* FIXME: Since the intermediate sim_fpu format can hold numbers
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far smaller then the targets FP format, the test for denorm
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is currently bogus. Perhaphs the code converting a number to
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the internal format should flag such situtations with
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`ndemorm' */
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case ???:
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return SIM_FPU_IS_PNUMBER;
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case sim_fpu_class_denorm:
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if (d->sign)
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return SIM_FPU_IS_NDENORM;
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else
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return SIM_FPU_IS_PDENORM;
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#endif
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case sim_fpu_class_zero:
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if (d->sign)
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return SIM_FPU_IS_NZERO;
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@ -2219,6 +2237,7 @@ sim_fpu_print_fpu (const sim_fpu *f,
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print (arg, "INF");
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break;
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case sim_fpu_class_number:
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case sim_fpu_class_denorm:
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print (arg, "1.");
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print_bits (f->fraction, NR_FRAC_GUARD - 1, print, arg);
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print (arg, "*2^%+-5d", f->normal_exp);
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@ -20,68 +20,343 @@ with this program; if not, write to the Free Software Foundation, Inc.,
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#ifndef _SIM_FPU_H_
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#define _SIM_FPU_H_
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#ifndef SIM_FPU_H
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#define SIM_FPU_H
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/* the FPU intermediate type */
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/* The FPU intermediate type - this object, passed by reference,
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should be treated as opaque.
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Pragmatics - pass struct by ref:
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The alternatives for this object/interface that were considered
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were: a packed 64 bit value; an unpacked structure passed by value;
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and an unpacked structure passed by reference.
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The packed 64 bit value was rejected because: it limited the
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precision of intermediate values; reasonable performance would only
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be achieved when the sim_fpu package was in-lined allowing repeated
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unpacking operations to be eliminated.
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For unpacked structures (passed by value and reference), the code
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quality of GCC-2.7 (on x86) for each alternative was compared.
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Needless to say the results, while better then for a packed 64 bit
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object, were still poor (GCC had only limited support for the
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optimization of references to structure members). Regardless, the
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struct-by-ref alternative achieved better results when compiled
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with (better speed) and without (better code density) in-lining.
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Here's looking forward to an improved GCC optimizer.
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Pragmatics - avoid host FP hardware:
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FP operations can be implemented by either: the host's floating
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point hardware; or by emulating the FP operations using integer
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only routines. This is direct tradeoff between speed, portability
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and correctness.
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The two principal reasons for selecting portability and correctness
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over speed are:
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1 - Correctness. The assumption that FP correctness wasn't an
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issue for code being run on simulators was wrong. Instead of
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running FP tolerant (?) code, simulator users instead typically run
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very aggressive FP code sequences. The sole purpose of those
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sequences being to test the target ISA's FP implementation.
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2 - Portability. The host FP implementation is not predictable. A
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simulator modeling aggressive FP code sequences using the hosts FPU
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relies heavily on the correctness of the hosts FP implementation.
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It turns out that such trust can be misplaced. The behavior of
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host FP implementations when handling edge conditions such as SNaNs
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and exceptions varied widely.
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*/
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typedef enum
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{
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sim_fpu_class_zero,
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sim_fpu_class_snan,
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sim_fpu_class_qnan,
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sim_fpu_class_number,
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sim_fpu_class_denorm,
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sim_fpu_class_infinity,
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} sim_fpu_class;
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typedef struct _sim_fpu {
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double val;
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sim_fpu_class class;
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int normal_exp;
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int result;
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int sign;
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unsigned64 fraction;
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} sim_fpu;
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/* Directly map a 32/64bit register quantity into the sim_fpu internal
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type ready for various arithmetic and conversion operations. */
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INLINE_SIM_FPU (sim_fpu) sim_fpu_32to (unsigned32 s);
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INLINE_SIM_FPU (sim_fpu) sim_fpu_64to (unsigned64 s);
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/* Rounding options.
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INLINE_SIM_FPU (unsigned32) sim_fpu_to32 (sim_fpu s);
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INLINE_SIM_FPU (unsigned64) sim_fpu_to64 (sim_fpu s);
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The value zero (sim_fpu_round_default) for ALU operations indicates
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that, when possible, rounding should be avoided. */
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typedef enum
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{
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sim_fpu_round_default = 0,
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sim_fpu_round_near = 1,
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sim_fpu_round_zero = 2,
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sim_fpu_round_up = 3,
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sim_fpu_round_down = 4,
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} sim_fpu_round;
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/* Arrithmetic operators */
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/* Options when handling denormalized numbers. */
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INLINE_SIM_FPU (sim_fpu) sim_fpu_add (sim_fpu l, sim_fpu r);
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INLINE_SIM_FPU (sim_fpu) sim_fpu_sub (sim_fpu l, sim_fpu r);
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INLINE_SIM_FPU (sim_fpu) sim_fpu_mul (sim_fpu l, sim_fpu r);
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INLINE_SIM_FPU (sim_fpu) sim_fpu_div (sim_fpu l, sim_fpu r);
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INLINE_SIM_FPU (sim_fpu) sim_fpu_inv (sim_fpu l);
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INLINE_SIM_FPU (sim_fpu) sim_fpu_sqrt (sim_fpu sqr);
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typedef enum
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{
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sim_fpu_denorm_underflow_inexact = 1,
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sim_fpu_denorm_zero = 2,
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} sim_fpu_denorm;
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/* Conversion of integer value into floating point types */
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INLINE_SIM_FPU (sim_fpu) sim_fpu_i32to (signed32 s);
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INLINE_SIM_FPU (sim_fpu) sim_fpu_u32to (unsigned32 s);
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INLINE_SIM_FPU (sim_fpu) sim_fpu_i64to (signed64 s);
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INLINE_SIM_FPU (sim_fpu) sim_fpu_u64to (unsigned64 s);
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/* Status values returned by FPU operators.
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When checking the result of an FP sequence (ex 32to, add, single,
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to32) the caller may either: check the return value of each FP
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operator; or form the union (OR) of the returned values and examine
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them once at the end.
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FIXME: This facility is still being developed. The choice of
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status values returned and their exact meaning may changed in the
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future. */
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typedef enum
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{
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sim_fpu_status_invalid_snan = 1,
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sim_fpu_status_invalid_qnan = 2,
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sim_fpu_status_invalid_isi = 4, /* (inf - inf) */
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sim_fpu_status_invalid_idi = 8, /* (inf / inf) */
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sim_fpu_status_invalid_zdz = 16, /* (0 / 0) */
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sim_fpu_status_invalid_imz = 32, /* (inf * 0) */
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sim_fpu_status_invalid_cvi = 64, /* convert to integer */
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sim_fpu_status_invalid_div0 = 128, /* (X / 0) */
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sim_fpu_status_invalid_cmp = 256, /* compare */
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sim_fpu_status_invalid_sqrt = 512,
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sim_fpu_status_rounded = 1024,
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sim_fpu_status_inexact = 2048,
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sim_fpu_status_overflow = 4096,
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sim_fpu_status_underflow = 8192,
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sim_fpu_status_denorm = 16384,
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} sim_fpu_status;
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/* Conversion of internal sim_fpu type to host float and double
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formats - for debuging/tracing */
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INLINE_SIM_FPU (float) sim_fpu_2f (sim_fpu f);
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INLINE_SIM_FPU (double) sim_fpu_2d (sim_fpu d);
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#if 0
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INLINE_SIM_FPU (sim_fpu) sim_fpu_f2 (float f);
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INLINE_SIM_FPU (sim_fpu) sim_fpu_d2 (double d);
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/* Directly map between a 32/64 bit register and the sim_fpu internal
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type.
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When converting from the 32/64 bit packed format to the sim_fpu
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internal type, the operation is exact.
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When converting from the sim_fpu internal type to 32/64 bit packed
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format, the operation may result in a loss of precision. The
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configuration macro WITH_FPU_CONVERSION controls this. By default,
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silent round to nearest is performed. Alternativly, round up,
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round down and round to zero can be performed. In a simulator
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emulating exact FPU behavour, sim_fpu_round_{32,64} should be
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called before packing the sim_fpu value. */
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INLINE_SIM_FPU (void) sim_fpu_32to (sim_fpu *f, unsigned32 s);
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INLINE_SIM_FPU (void) sim_fpu_232to (sim_fpu *f, unsigned32 h, unsigned32 l);
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INLINE_SIM_FPU (void) sim_fpu_64to (sim_fpu *f, unsigned64 d);
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INLINE_SIM_FPU (void) sim_fpu_to32 (unsigned32 *s, const sim_fpu *f);
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INLINE_SIM_FPU (void) sim_fpu_to232 (unsigned32 *h, unsigned32 *l, const sim_fpu *f);
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INLINE_SIM_FPU (void) sim_fpu_to64 (unsigned64 *d, const sim_fpu *f);
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#if WITH_TARGET_FLOATING_POINT_BITSIZE == 32
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#define sim_fpu_tofp sim_fpu_to32
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#define sim_fpu_fpto sim_fpu_32to
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#define sim_fpu_round_fp sim_fpu_round_32
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#endif
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#if WITH_TARGET_FLOATING_POINT_BITSIZE == 64
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#define sim_fpu_tofp sim_fpu_to64
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#define sim_fpu_fpto sim_fpu_64to
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#define sim_fpu_round_fp sim_fpu_round_64
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#endif
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/* Signalling or NonSignalling NaN */
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/* Rounding operators.
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INLINE_SIM_FPU (int) sim_fpu_is_nan (sim_fpu s);
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Force an intermediate result to an exact 32/64 bit
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representation. */
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INLINE_SIM_FPU (int) sim_fpu_round_32 (sim_fpu *f,
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sim_fpu_round round,
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sim_fpu_denorm denorm);
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INLINE_SIM_FPU (int) sim_fpu_round_64 (sim_fpu *f,
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sim_fpu_round round,
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sim_fpu_denorm denorm);
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/* compare l with r; return <0, ==0, >0 accordingly */
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INLINE_SIM_FPU (int) sim_fpu_is_lt (sim_fpu l, sim_fpu r);
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INLINE_SIM_FPU (int) sim_fpu_is_le (sim_fpu l, sim_fpu r);
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INLINE_SIM_FPU (int) sim_fpu_is_eq (sim_fpu l, sim_fpu r);
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INLINE_SIM_FPU (int) sim_fpu_is_ne (sim_fpu l, sim_fpu r);
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INLINE_SIM_FPU (int) sim_fpu_is_ge (sim_fpu l, sim_fpu r);
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INLINE_SIM_FPU (int) sim_fpu_is_gt (sim_fpu l, sim_fpu r);
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/* Arrithmetic operators.
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FIXME: In the future, additional arguments ROUNDING and BITSIZE may
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be added. */
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INLINE_SIM_FPU (int) sim_fpu_add (sim_fpu *f,
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const sim_fpu *l, const sim_fpu *r);
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INLINE_SIM_FPU (int) sim_fpu_sub (sim_fpu *f,
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const sim_fpu *l, const sim_fpu *r);
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INLINE_SIM_FPU (int) sim_fpu_mul (sim_fpu *f,
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const sim_fpu *l, const sim_fpu *r);
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INLINE_SIM_FPU (int) sim_fpu_div (sim_fpu *f,
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const sim_fpu *l, const sim_fpu *r);
|
||||
INLINE_SIM_FPU (int) sim_fpu_neg (sim_fpu *f,
|
||||
const sim_fpu *a);
|
||||
INLINE_SIM_FPU (int) sim_fpu_abs (sim_fpu *f,
|
||||
const sim_fpu *a);
|
||||
INLINE_SIM_FPU (int) sim_fpu_inv (sim_fpu *f,
|
||||
const sim_fpu *a);
|
||||
INLINE_SIM_FPU (int) sim_fpu_sqrt (sim_fpu *f,
|
||||
const sim_fpu *sqr);
|
||||
|
||||
|
||||
|
||||
/* Conversion of integer <-> floating point. */
|
||||
|
||||
INLINE_SIM_FPU (int) sim_fpu_i32to (sim_fpu *f, signed32 i,
|
||||
sim_fpu_round round);
|
||||
INLINE_SIM_FPU (int) sim_fpu_u32to (sim_fpu *f, unsigned32 u,
|
||||
sim_fpu_round round);
|
||||
INLINE_SIM_FPU (int) sim_fpu_i64to (sim_fpu *f, signed64 i,
|
||||
sim_fpu_round round);
|
||||
INLINE_SIM_FPU (int) sim_fpu_u64to (sim_fpu *f, unsigned64 u,
|
||||
sim_fpu_round round);
|
||||
INLINE_SIM_FPU (int) sim_fpu_i232to (sim_fpu *f, signed32 h, signed32 l,
|
||||
sim_fpu_round round);
|
||||
INLINE_SIM_FPU (int) sim_fpu_u232to (sim_fpu *f, unsigned32 h, unsigned32 l,
|
||||
sim_fpu_round round);
|
||||
|
||||
INLINE_SIM_FPU (int) sim_fpu_to32i (signed32 *i, const sim_fpu *f,
|
||||
sim_fpu_round round);
|
||||
INLINE_SIM_FPU (int) sim_fpu_to32u (unsigned32 *u, const sim_fpu *f,
|
||||
sim_fpu_round round);
|
||||
INLINE_SIM_FPU (int) sim_fpu_to64i (signed64 *i, const sim_fpu *f,
|
||||
sim_fpu_round round);
|
||||
INLINE_SIM_FPU (int) sim_fpu_to64u (unsigned64 *u, const sim_fpu *f,
|
||||
sim_fpu_round round);
|
||||
INLINE_SIM_FPU (int) sim_fpu_to232i (signed64 *h, signed64 *l, const sim_fpu *f,
|
||||
sim_fpu_round round);
|
||||
INLINE_SIM_FPU (int) sim_fpu_to232u (unsigned64 *h, unsigned64 *l, const sim_fpu *f,
|
||||
sim_fpu_round round);
|
||||
|
||||
|
||||
|
||||
/* Conversion of internal sim_fpu type to host double format.
|
||||
|
||||
For debuging/tracing only. A SNaN is never returned. */
|
||||
|
||||
/* INLINE_SIM_FPU (float) sim_fpu_2f (const sim_fpu *f); */
|
||||
INLINE_SIM_FPU (double) sim_fpu_2d (const sim_fpu *d);
|
||||
|
||||
/* INLINE_SIM_FPU (void) sim_fpu_f2 (sim_fpu *f, float s); */
|
||||
INLINE_SIM_FPU (void) sim_fpu_d2 (sim_fpu *f, double d);
|
||||
|
||||
|
||||
|
||||
/* Specific number classes.
|
||||
|
||||
NB: When either a 32/64 bit floating points is converted to
|
||||
internal format, or an internal format number is rounded to 32/64
|
||||
bit precision, a special marker is retained that indicates that the
|
||||
value was normalized. For such numbers both is_number and
|
||||
is_denorm will return true. */
|
||||
|
||||
INLINE_SIM_FPU (int) sim_fpu_is_nan (const sim_fpu *s); /* 1 => SNaN or QNaN */
|
||||
INLINE_SIM_FPU (int) sim_fpu_is_snan (const sim_fpu *s); /* 1 => SNaN */
|
||||
INLINE_SIM_FPU (int) sim_fpu_is_qnan (const sim_fpu *s); /* 1 => QNaN */
|
||||
|
||||
INLINE_SIM_FPU (int) sim_fpu_is_zero (const sim_fpu *s);
|
||||
INLINE_SIM_FPU (int) sim_fpu_is_infinity (const sim_fpu *s);
|
||||
INLINE_SIM_FPU (int) sim_fpu_is_number (const sim_fpu *s); /* !zero */
|
||||
INLINE_SIM_FPU (int) sim_fpu_is_denorm (const sim_fpu *s); /* !zero */
|
||||
|
||||
|
||||
/* Specific comparison operators
|
||||
|
||||
The comparison operators set *IS to zero and return a nonzero
|
||||
result for NaNs et.al. */
|
||||
|
||||
INLINE_SIM_FPU (int) sim_fpu_lt (int *is, const sim_fpu *l, const sim_fpu *r);
|
||||
INLINE_SIM_FPU (int) sim_fpu_le (int *is, const sim_fpu *l, const sim_fpu *r);
|
||||
INLINE_SIM_FPU (int) sim_fpu_eq (int *is, const sim_fpu *l, const sim_fpu *r);
|
||||
INLINE_SIM_FPU (int) sim_fpu_ne (int *is, const sim_fpu *l, const sim_fpu *r);
|
||||
INLINE_SIM_FPU (int) sim_fpu_ge (int *is, const sim_fpu *l, const sim_fpu *r);
|
||||
INLINE_SIM_FPU (int) sim_fpu_gt (int *is, const sim_fpu *l, const sim_fpu *r);
|
||||
|
||||
INLINE_SIM_FPU (int) sim_fpu_is_lt (const sim_fpu *l, const sim_fpu *r);
|
||||
INLINE_SIM_FPU (int) sim_fpu_is_le (const sim_fpu *l, const sim_fpu *r);
|
||||
INLINE_SIM_FPU (int) sim_fpu_is_eq (const sim_fpu *l, const sim_fpu *r);
|
||||
INLINE_SIM_FPU (int) sim_fpu_is_ne (const sim_fpu *l, const sim_fpu *r);
|
||||
INLINE_SIM_FPU (int) sim_fpu_is_ge (const sim_fpu *l, const sim_fpu *r);
|
||||
INLINE_SIM_FPU (int) sim_fpu_is_gt (const sim_fpu *l, const sim_fpu *r);
|
||||
|
||||
|
||||
|
||||
/* General number class and comparison operators.
|
||||
|
||||
The result of the comparison is indicated by returning one of the
|
||||
values below. Efficient emulation of a target FP compare
|
||||
instruction can be achieved by redefining the values below to match
|
||||
corresponding target FP status bits.
|
||||
|
||||
For instance. SIM_FPU_QNAN may be redefined to be the bit
|
||||
`INVALID' while SIM_FPU_NINF might be redefined as the bits
|
||||
`NEGATIVE | INFINITY | VALID'. */
|
||||
|
||||
#ifndef SIM_FPU_IS_SNAN
|
||||
enum {
|
||||
SIM_FPU_IS_SNAN = 1, /* Noisy not-a-number */
|
||||
SIM_FPU_IS_QNAN = 2, /* Quite not-a-number */
|
||||
SIM_FPU_IS_NINF = 3, /* -infinity */
|
||||
SIM_FPU_IS_PINF = 4, /* +infinity */
|
||||
SIM_FPU_IS_NNUMBER = 5, /* -number - [ -MAX .. -MIN ] */
|
||||
SIM_FPU_IS_PNUMBER = 6, /* +number - [ +MIN .. +MAX ] */
|
||||
SIM_FPU_IS_NDENORM = 7, /* -denorm - ( MIN .. 0 ) */
|
||||
SIM_FPU_IS_PDENORM = 8, /* +denorm - ( 0 .. MIN ) */
|
||||
SIM_FPU_IS_NZERO = 9, /* -0 */
|
||||
SIM_FPU_IS_PZERO = 10, /* +0 */
|
||||
};
|
||||
#endif
|
||||
|
||||
INLINE_SIM_FPU (int) sim_fpu_is (const sim_fpu *l);
|
||||
INLINE_SIM_FPU (int) sim_fpu_cmp (const sim_fpu *l, const sim_fpu *r);
|
||||
|
||||
|
||||
|
||||
/* A constant of useful numbers */
|
||||
|
||||
extern const sim_fpu sim_fpu_zero;
|
||||
extern const sim_fpu sim_fpu_one;
|
||||
extern const sim_fpu sim_fpu_two;
|
||||
extern const sim_fpu sim_fpu_qnan;
|
||||
|
||||
|
||||
/* For debugging */
|
||||
|
||||
typedef void sim_fpu_print_func (void *, char *, ...);
|
||||
|
||||
INLINE_SIM_FPU (void) sim_fpu_print_fpu (const sim_fpu *f,
|
||||
sim_fpu_print_func *print,
|
||||
void *arg);
|
||||
|
||||
INLINE_SIM_FPU (void) sim_fpu_print_status (int status,
|
||||
sim_fpu_print_func *print,
|
||||
void *arg);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in a new issue