Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
* i386.h: Change occurences of Data16 to Size16, Data32 to Size32, IgnoreDataSize to IgnoreSize. Flag address and data size prefixes with Size16|IgnoreSize or Size32|IgnoreSize.
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2 changed files with 45 additions and 41 deletions
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@ -1,3 +1,9 @@
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Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
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* i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
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IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
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with Size16|IgnoreSize or Size32|IgnoreSize.
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Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
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* i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
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@ -24,7 +24,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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we're stuck with it.
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eg. `fsub %st(3),%st' results in st <- st - st(3) as expected, but
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`fusb %st,%st(3)' results in st(3) <- st - st(3), rather than
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`fsub %st,%st(3)' results in st(3) <- st - st(3), rather than
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the expected st(3) <- st(3) - st !
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This happens with all the non-commutative arithmetic floating point
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@ -52,9 +52,9 @@ static const template i386_optab[] = {
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#define wl_Suf (No_bSuf|No_sSuf)
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#define sl_Suf (No_bSuf|No_wSuf)
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#define bwl_Suf No_sSuf
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#define FP (NoSuf|IgnoreDataSize)
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#define l_FP (l_Suf|IgnoreDataSize)
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#define sl_FP (sl_Suf|IgnoreDataSize)
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#define FP (NoSuf|IgnoreSize)
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#define l_FP (l_Suf|IgnoreSize)
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#define sl_FP (sl_Suf|IgnoreSize)
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#if UNIXWARE_COMPAT
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#define FloatDR FloatD
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#else
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@ -73,24 +73,22 @@ static const template i386_optab[] = {
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are set to an implementation defined value (on the Pentium Pro,
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the implementation defined value is zero). */
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{ "mov", 2, 0x8c, X, wl_Suf|Modrm, { SReg3|SReg2, WordReg|WordMem, 0 } },
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{ "mov", 2, 0x8e, X, wl_Suf|Modrm|IgnoreDataSize, { WordReg|WordMem, SReg3|SReg2, 0 } },
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{ "mov", 2, 0x8e, X, wl_Suf|Modrm|IgnoreSize, { WordReg|WordMem, SReg3|SReg2, 0 } },
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/* move to/from control debug registers */
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{ "mov", 2, 0x0f20, X, l_Suf|D|Modrm|IgnoreDataSize, { Control, Reg32, 0} },
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{ "mov", 2, 0x0f21, X, l_Suf|D|Modrm|IgnoreDataSize, { Debug, Reg32, 0} },
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{ "mov", 2, 0x0f24, X, l_Suf|D|Modrm|IgnoreDataSize, { Test, Reg32, 0} },
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{ "mov", 2, 0x0f20, X, l_Suf|D|Modrm|IgnoreSize, { Control, Reg32, 0} },
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{ "mov", 2, 0x0f21, X, l_Suf|D|Modrm|IgnoreSize, { Debug, Reg32, 0} },
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{ "mov", 2, 0x0f24, X, l_Suf|D|Modrm|IgnoreSize, { Test, Reg32, 0} },
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/* move with sign extend */
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/* "movsbl" & "movsbw" must not be unified into "movsb" to avoid
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conflict with the "movs" string move instruction. Thus,
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{"movsb", 2, 0x0fbe, X, ReverseModrm, { Reg8|ByteMem, WordReg, 0} },
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is not kosher; we must seperate the two instructions. */
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{"movsbl", 2, 0x0fbe, X, NoSuf|ReverseModrm|Data32, { Reg8|ByteMem, Reg32, 0} },
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{"movsbw", 2, 0x0fbe, X, NoSuf|ReverseModrm|Data16, { Reg8|ByteMem, Reg16, 0} },
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{"movswl", 2, 0x0fbf, X, NoSuf|ReverseModrm|Data32, { Reg16|ShortMem, Reg32, 0} },
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conflict with the "movs" string move instruction. */
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{"movsbl", 2, 0x0fbe, X, NoSuf|ReverseModrm, { Reg8|ByteMem, Reg32, 0} },
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{"movsbw", 2, 0x0fbe, X, NoSuf|ReverseModrm, { Reg8|ByteMem, Reg16, 0} },
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{"movswl", 2, 0x0fbf, X, NoSuf|ReverseModrm, { Reg16|ShortMem, Reg32, 0} },
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/* move with zero extend */
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{"movzb", 2, 0x0fb6, X, wl_Suf|ReverseModrm, { Reg8|ByteMem, WordReg, 0} },
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{"movzwl", 2, 0x0fb7, X, NoSuf|ReverseModrm|Data32, { Reg16|ShortMem, Reg32, 0} },
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{"movzb", 2, 0x0fb6, X, wl_Suf|ReverseModrm, { Reg8|ByteMem, WordReg, 0} },
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{"movzwl", 2, 0x0fb7, X, NoSuf|ReverseModrm, { Reg16|ShortMem, Reg32, 0} },
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/* push instructions */
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{"push", 1, 0x50, X, wl_Suf|ShortForm, { WordReg,0,0 } },
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@ -219,15 +217,15 @@ static const template i386_optab[] = {
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/* conversion insns */
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/* conversion: intel naming */
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{"cbw", 0, 0x98, X, NoSuf|Data16, { 0, 0, 0} },
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{"cwde", 0, 0x98, X, NoSuf|Data32, { 0, 0, 0} },
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{"cwd", 0, 0x99, X, NoSuf|Data16, { 0, 0, 0} },
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{"cdq", 0, 0x99, X, NoSuf|Data32, { 0, 0, 0} },
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{"cbw", 0, 0x98, X, NoSuf|Size16, { 0, 0, 0} },
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{"cwde", 0, 0x98, X, NoSuf|Size32, { 0, 0, 0} },
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{"cwd", 0, 0x99, X, NoSuf|Size16, { 0, 0, 0} },
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{"cdq", 0, 0x99, X, NoSuf|Size32, { 0, 0, 0} },
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/* att naming */
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{"cbtw", 0, 0x98, X, NoSuf|Data16, { 0, 0, 0} },
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{"cwtl", 0, 0x98, X, NoSuf|Data32, { 0, 0, 0} },
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{"cwtd", 0, 0x99, X, NoSuf|Data16, { 0, 0, 0} },
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{"cltd", 0, 0x99, X, NoSuf|Data32, { 0, 0, 0} },
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{"cbtw", 0, 0x98, X, NoSuf|Size16, { 0, 0, 0} },
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{"cwtl", 0, 0x98, X, NoSuf|Size32, { 0, 0, 0} },
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{"cwtd", 0, 0x99, X, NoSuf|Size16, { 0, 0, 0} },
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{"cltd", 0, 0x99, X, NoSuf|Size32, { 0, 0, 0} },
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/* Warning! the mul/imul (opcode 0xf6) must only have 1 operand! They are
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expanding 64-bit multiplies, and *cannot* be selected to accomplish
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@ -348,8 +346,8 @@ static const template i386_optab[] = {
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{"jg", 1, 0x7f, X, NoSuf|Jump, { Disp, 0, 0} },
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/* jcxz vs. jecxz is chosen on the basis of the address size prefix. */
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{"jcxz", 1, 0xe3, X, NoSuf|JumpByte|Data16, { Disp, 0, 0} },
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{"jecxz", 1, 0xe3, X, NoSuf|JumpByte|Data32, { Disp, 0, 0} },
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{"jcxz", 1, 0xe3, X, NoSuf|JumpByte|Size16, { Disp, 0, 0} },
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{"jecxz", 1, 0xe3, X, NoSuf|JumpByte|Size32, { Disp, 0, 0} },
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/* The loop instructions also use the address size prefix to select
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%cx rather than %ecx for the loop count, so the `w' form of these
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@ -458,23 +456,23 @@ static const template i386_optab[] = {
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{"nop", 0, 0x90, X, NoSuf, { 0, 0, 0} },
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/* protection control */
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{"arpl", 2, 0x63, X, NoSuf|Modrm|IgnoreDataSize, { Reg16, Reg16|ShortMem, 0} },
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{"arpl", 2, 0x63, X, NoSuf|Modrm|IgnoreSize,{ Reg16, Reg16|ShortMem, 0} },
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{"lar", 2, 0x0f02, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
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{"lgdt", 1, 0x0f01, 2, wl_Suf|Modrm, { WordMem, 0, 0} },
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{"lidt", 1, 0x0f01, 3, wl_Suf|Modrm, { WordMem, 0, 0} },
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{"lldt", 1, 0x0f00, 2, NoSuf|Modrm|IgnoreDataSize, { Reg16|ShortMem, 0, 0} },
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{"lmsw", 1, 0x0f01, 6, NoSuf|Modrm|IgnoreDataSize, { Reg16|ShortMem, 0, 0} },
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{"lldt", 1, 0x0f00, 2, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} },
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{"lmsw", 1, 0x0f01, 6, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} },
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{"lsl", 2, 0x0f03, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
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{"ltr", 1, 0x0f00, 3, NoSuf|Modrm|IgnoreDataSize, { Reg16|ShortMem, 0, 0} },
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{"ltr", 1, 0x0f00, 3, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} },
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{"sgdt", 1, 0x0f01, 0, wl_Suf|Modrm, { WordMem, 0, 0} },
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{"sidt", 1, 0x0f01, 1, wl_Suf|Modrm, { WordMem, 0, 0} },
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{"sldt", 1, 0x0f00, 0, wl_Suf|Modrm, { WordReg|WordMem, 0, 0} },
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{"smsw", 1, 0x0f01, 4, wl_Suf|Modrm, { WordReg|WordMem, 0, 0} },
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{"str", 1, 0x0f00, 1, NoSuf|Modrm|IgnoreDataSize, { Reg16|ShortMem, 0, 0} },
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{"str", 1, 0x0f00, 1, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} },
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{"verr", 1, 0x0f00, 4, NoSuf|Modrm|IgnoreDataSize, { Reg16|ShortMem, 0, 0} },
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{"verw", 1, 0x0f00, 5, NoSuf|Modrm|IgnoreDataSize, { Reg16|ShortMem, 0, 0} },
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{"verr", 1, 0x0f00, 4, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} },
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{"verw", 1, 0x0f00, 5, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} },
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/* floating point instructions */
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opcode prefixes; we allow them as seperate insns too
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*/
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#define ADDR_PREFIX_OPCODE 0x67
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{"addr16", 0, 0x67, X, NoSuf|IsPrefix, { 0, 0, 0} },
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{"addr32", 0, 0x67, X, NoSuf|IsPrefix, { 0, 0, 0} },
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{"aword", 0, 0x67, X, NoSuf|IsPrefix, { 0, 0, 0} },
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{"adword", 0, 0x67, X, NoSuf|IsPrefix, { 0, 0, 0} },
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{"addr16", 0, 0x67, X, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} },
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{"addr32", 0, 0x67, X, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} },
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{"aword", 0, 0x67, X, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} },
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{"adword", 0, 0x67, X, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} },
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#define DATA_PREFIX_OPCODE 0x66
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{"data16", 0, 0x66, X, NoSuf|IsPrefix, { 0, 0, 0} },
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{"data32", 0, 0x66, X, NoSuf|IsPrefix, { 0, 0, 0} },
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{"word", 0, 0x66, X, NoSuf|IsPrefix, { 0, 0, 0} },
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{"dword", 0, 0x66, X, NoSuf|IsPrefix, { 0, 0, 0} },
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{"data16", 0, 0x66, X, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} },
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{"data32", 0, 0x66, X, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} },
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{"word", 0, 0x66, X, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} },
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{"dword", 0, 0x66, X, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} },
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#define LOCK_PREFIX_OPCODE 0xf0
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{"lock", 0, 0xf0, X, NoSuf|IsPrefix, { 0, 0, 0} },
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{"wait", 0, 0x9b, X, NoSuf|IsPrefix, { 0, 0, 0} },
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