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* m10300-opc.c (lsr_add): Fix typo for "lsr_add imm,reg,reg,reg" case.

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pr17742
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Jeff Law 1998-10-12 16:46:31 +00:00
parent 454e0c7d51
commit b657e68db8
2 changed files with 5 additions and 1 deletions
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opcodes/ChangeLog
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@ -1,3 +1,7 @@
Mon Oct 12 10:43:51 1998 Jeffrey A Law (law@cygnus.com)
* m10300-opc.c (lsr_add): Fix typo for "lsr_add imm,reg,reg,reg" case.
Fri Oct 9 14:01:56 1998 Doug Evans <devans@seba.cygnus.com>
* m32r-opc.h,m32r-opc.c: Regenerate.

2
opcodes/m10300-opc.c
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@ -1480,7 +1480,7 @@ const struct mn10300_opcode mn10300_opcodes[] = {
{ "cmp_xor", 0xf74a0000, 0xffff0000, 0xa, FMT_D10, AM33, {RM2, RN0, RM6, RN4}},
{ "cmp_xor", 0xf75a0000, 0xffff0000, 0xa, FMT_D10, AM33, {SIMM4_2, RN0, RM6, RN4}},
{ "lsr_add", 0xf7a00000, 0xffff0000, 0xa, FMT_D10, AM33, {RM2, RN0, RM6, RN4}},
{ "lsr_add", 0xf7900000, 0xffff0000, 0xa, FMT_D10, AM33, {IMM4_2, RN0, RM6, RN4}},
{ "lsr_add", 0xf7b00000, 0xffff0000, 0xa, FMT_D10, AM33, {IMM4_2, RN0, RM6, RN4}},
{ "lsr_add", 0xf7a40000, 0xffff0000, 0xa, FMT_D10, AM33, {RM2, RN0, SIMM4_6, RN4}},
{ "lsr_add", 0xf7b40000, 0xffff0000, 0xa, FMT_D10, AM33, {IMM4_2, RN0, SIMM4_6, RN4}},
{ "lsr_and", 0xf7a80000, 0xffff0000, 0xa, FMT_D10, AM33, {RM2, RN0, RM6, RN4}},