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* config/tc-ppc.c (parse_cpu): Handle "-mpower5".

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(md_show_usage): Document it.
	(ppc_setup_opcodes): Insert POWER5 mnemonics.
	* doc/c-ppc.texi (PowerPC-Opts): Document "-mpower5".
This commit is contained in:
Alan Modra 2005-05-19 07:02:14 +00:00
parent 1ed8e1e4fb
commit b0648eec61
3 changed files with 21 additions and 1 deletions
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7
gas/ChangeLog
View file

@ -1,3 +1,10 @@
2005-05-19 Anton Blanchard <anton@samba.org>
* config/tc-ppc.c (parse_cpu): Handle "-mpower5".
(md_show_usage): Document it.
(ppc_setup_opcodes): Insert POWER5 mnemonics.
* doc/c-ppc.texi (PowerPC-Opts): Document "-mpower5".
2005-05-19 Jan Beulich <jbeulich@novell.com> 2005-05-19 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (dot_endp): Don't use global symbol for unwind * config/tc-ia64.c (dot_endp): Don't use global symbol for unwind

12
gas/config/tc-ppc.c
View file

@ -906,6 +906,12 @@ parse_cpu (const char *arg)
ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
| PPC_OPCODE_64 | PPC_OPCODE_POWER4); | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
} }
else if (strcmp (arg, "power5") == 0)
{
ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
| PPC_OPCODE_64 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5);
}
/* -mcom means assemble for the common intersection between Power /* -mcom means assemble for the common intersection between Power
and PowerPC. At present, we just allow the union, rather and PowerPC. At present, we just allow the union, rather
than the intersection. */ than the intersection. */
@ -1100,6 +1106,7 @@ PowerPC options:\n\
-mbooke64 generate code for 64-bit PowerPC BookE\n\ -mbooke64 generate code for 64-bit PowerPC BookE\n\
-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\ -mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
-mpower4 generate code for Power4 architecture\n\ -mpower4 generate code for Power4 architecture\n\
-mpower5 generate code for Power5 architecture\n\
-mcom generate code Power/PowerPC common instructions\n\ -mcom generate code Power/PowerPC common instructions\n\
-many generate code for any architecture (PWR/PWRX/PPC)\n")); -many generate code for any architecture (PWR/PWRX/PPC)\n"));
fprintf (stream, _("\ fprintf (stream, _("\
@ -1255,7 +1262,10 @@ ppc_setup_opcodes (void)
|| (ppc_cpu & PPC_OPCODE_BOOKE) == 0) || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
&& ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
|| ((op->flags & PPC_OPCODE_POWER4) || ((op->flags & PPC_OPCODE_POWER4)
== (ppc_cpu & PPC_OPCODE_POWER4)))) == (ppc_cpu & PPC_OPCODE_POWER4)))
&& ((op->flags & PPC_OPCODE_POWER5) == 0
|| ((op->flags & PPC_OPCODE_POWER5)
== (ppc_cpu & PPC_OPCODE_POWER5))))
{ {
const char *retval; const char *retval;

3
gas/doc/c-ppc.texi
View file

@ -73,6 +73,9 @@ Generate code for processors with AltiVec instructions.
@item -mpower4 @item -mpower4
Generate code for Power4 architecture. Generate code for Power4 architecture.
@item -mpower5
Generate code for Power5 architecture.
@item -mcom @item -mcom
Generate code Power/PowerPC common instructions. Generate code Power/PowerPC common instructions.