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* arch-utils.c (TARGET_BYTE_ORDER_DEFAULT): Delete macro.

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(target_byte_order): Initialize to BFD_ENDIAN_BIG.
(initialize_current_architecture): Update target_byte_order using
information from BFD.
* config/powerpc/tm-ppcle-eabi.h (TARGET_BYTE_ORDER_DEFAULT):
* config/mcore/tm-mcore.h (TARGET_BYTE_ORDER_DEFAULT):
* config/arm/tm-arm.h (TARGET_BYTE_ORDER_DEFAULT): Delete.

Update doco.
This commit is contained in:
Andrew Cagney 2002-01-29 03:51:19 +00:00
parent 75bc7ddf1b
commit afe64c1a68
6 changed files with 33 additions and 23 deletions
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10
gdb/ChangeLog
View file

@ -1,3 +1,13 @@
2002-01-28 Andrew Cagney <ac131313@redhat.com>
* arch-utils.c (TARGET_BYTE_ORDER_DEFAULT): Delete macro.
(target_byte_order): Initialize to BFD_ENDIAN_BIG.
(initialize_current_architecture): Update target_byte_order using
information from BFD.
* config/powerpc/tm-ppcle-eabi.h (TARGET_BYTE_ORDER_DEFAULT):
* config/mcore/tm-mcore.h (TARGET_BYTE_ORDER_DEFAULT):
* config/arm/tm-arm.h (TARGET_BYTE_ORDER_DEFAULT): Delete.
2002-01-28 Andrew Cagney <ac131313@redhat.com> 2002-01-28 Andrew Cagney <ac131313@redhat.com>
* config/vax/tm-vax.h (INVALID_FLOAT): Move macro from here... * config/vax/tm-vax.h (INVALID_FLOAT): Move macro from here...

23
gdb/arch-utils.c
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@ -399,13 +399,14 @@ generic_register_virtual_size (int regnum)
/* Functions to manipulate the endianness of the target. */ /* Functions to manipulate the endianness of the target. */
#ifndef TARGET_BYTE_ORDER_DEFAULT
#define TARGET_BYTE_ORDER_DEFAULT BFD_ENDIAN_BIG /* arbitrary */
#endif
/* ``target_byte_order'' is only used when non- multi-arch. /* ``target_byte_order'' is only used when non- multi-arch.
Multi-arch targets obtain the current byte order using Multi-arch targets obtain the current byte order using the
TARGET_BYTE_ORDER which is controlled by gdbarch.*. */ TARGET_BYTE_ORDER gdbarch method.
int target_byte_order = TARGET_BYTE_ORDER_DEFAULT;
The choice of initial value is entirely arbitrary. During startup,
the function initialize_current_architecture() updates this value
based on default byte-order information extracted from BFD. */
int target_byte_order = BFD_ENDIAN_BIG;
int target_byte_order_auto = 1; int target_byte_order_auto = 1;
static const char endian_big[] = "big"; static const char endian_big[] = "big";
@ -725,9 +726,7 @@ initialize_current_architecture (void)
"initialize_current_architecture: Arch not found"); "initialize_current_architecture: Arch not found");
} }
/* take several guesses at a byte order. */ /* Take several guesses at a byte order. */
/* NB: can't use TARGET_BYTE_ORDER_DEFAULT as its definition is
forced above. */
if (info.byte_order == BFD_ENDIAN_UNKNOWN if (info.byte_order == BFD_ENDIAN_UNKNOWN
&& default_bfd_vec != NULL) && default_bfd_vec != NULL)
{ {
@ -769,7 +768,13 @@ initialize_current_architecture (void)
} }
} }
else else
{
/* If the multi-arch logic comes up with a byte-order (from BFD)
use it for the non-multi-arch case. */
if (info.byte_order != BFD_ENDIAN_UNKNOWN)
target_byte_order = info.byte_order;
initialize_non_multiarch (); initialize_non_multiarch ();
}
/* Create the ``set architecture'' command appending ``auto'' to the /* Create the ``set architecture'' command appending ``auto'' to the
list of architectures. */ list of architectures. */

7
gdb/config/arm/tm-arm.h
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@ -29,10 +29,6 @@
struct type; struct type;
struct value; struct value;
/* Target byte order on ARM defaults to selectable, and defaults to
little endian. */
#define TARGET_BYTE_ORDER_DEFAULT BFD_ENDIAN_LITTLE
/* IEEE format floating point. */ /* IEEE format floating point. */
#define TARGET_DOUBLE_FORMAT (target_byte_order == BFD_ENDIAN_BIG \ #define TARGET_DOUBLE_FORMAT (target_byte_order == BFD_ENDIAN_BIG \
? &floatformat_ieee_double_big \ ? &floatformat_ieee_double_big \
@ -169,6 +165,9 @@ extern void arm_float_info (void);
#define NUM_GREGS 16 /* Number of general purpose registers. */ #define NUM_GREGS 16 /* Number of general purpose registers. */
#define NUM_REGS (NUM_GREGS + NUM_FREGS + NUM_SREGS) #define NUM_REGS (NUM_GREGS + NUM_FREGS + NUM_SREGS)
/* An array of names of registers. */
extern char **arm_register_names;
#define REGISTER_NAME(i) arm_register_name(i) #define REGISTER_NAME(i) arm_register_name(i)
char *arm_register_name (int); char *arm_register_name (int);

3
gdb/config/mcore/tm-mcore.h
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@ -20,9 +20,6 @@
#include "regcache.h" #include "regcache.h"
/* The mcore is little endian (by default) */
#define TARGET_BYTE_ORDER_DEFAULT BFD_ENDIAN_LITTLE
/* All registers are 32 bits */ /* All registers are 32 bits */
#define REGISTER_SIZE 4 #define REGISTER_SIZE 4
#define MAX_REGISTER_RAW_SIZE 4 #define MAX_REGISTER_RAW_SIZE 4

5
gdb/doc/ChangeLog
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@ -1,3 +1,8 @@
2002-01-28 Andrew Cagney <ac131313@redhat.com>
* gdbint.texinfo (Target Architecture Definition): Delete
description of TARGET_BYTE_ORDER_DEFAULT.
2002-01-27 Eli Zaretskii <eliz@is.elta.co.il> 2002-01-27 Eli Zaretskii <eliz@is.elta.co.il>
* gdb.texinfo: Fix typos and markup. From Dmitry Sivachenko * gdb.texinfo: Fix typos and markup. From Dmitry Sivachenko

6
gdb/doc/gdbint.texinfo
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@ -3471,12 +3471,6 @@ where @var{valbuf} is the address of the value to be stored.
The default value of the ``symbol-reloading'' variable. (Never defined in The default value of the ``symbol-reloading'' variable. (Never defined in
current sources.) current sources.)
@item TARGET_BYTE_ORDER_DEFAULT
@findex TARGET_BYTE_ORDER_DEFAULT
The ordering of bytes in the target. This must be either
@code{BFD_ENDIAN_BIG} or @code{BFD_ENDIAN_LITTLE}. This macro replaces
@code{TARGET_BYTE_ORDER} which is deprecated.
@item TARGET_CHAR_BIT @item TARGET_CHAR_BIT
@findex TARGET_CHAR_BIT @findex TARGET_CHAR_BIT
Number of bits in a char; defaults to 8. Number of bits in a char; defaults to 8.