xtensa: Avoid designated inits, for C++ compliance
C++ does not officially support designators in initializer lists. Thus some compilers may issue errors when encountering them. Modern versions of GCC seem to allow them by default, as a GCC extension, even though the GCC documentation explicitly states otherwise: "[...] This extension is not implemented in GNU C++." But some older GCC versions (like 4.4.7) did indeed emit an error instead, like this: .../gdb/xtensa-config.c:219: error: expected primary-expression before ‘.’ token This patch removes the only such instance I've seen when building with '--enable-targets=all'. gdb/ChangeLog: * xtensa-tdep.h (XTENSA_GDBARCH_TDEP_INSTANTIATE): Replace designated initializer list by plain initializer list, for C++ compliance.
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2 changed files with 55 additions and 49 deletions
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@ -1,3 +1,9 @@
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2016-08-25 Andreas Arnez <arnez@linux.vnet.ibm.com>
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* xtensa-tdep.h (XTENSA_GDBARCH_TDEP_INSTANTIATE): Replace
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designated initializer list by plain initializer list, for C++
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compliance.
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2016-08-25 Adhemerval Zanella <adhemerval.zanella@linaro.org>
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* aarch64-linux-nat.c (ps_get_thread_area): Remove const from
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@ -224,55 +224,55 @@ struct gdbarch_tdep
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/* Macro to instantiate a gdbarch_tdep structure. */
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#define XTENSA_GDBARCH_TDEP_INSTANTIATE(rmap,spillsz) \
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{ \
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.target_flags = 0, \
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.spill_location = -1, \
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.spill_size = (spillsz), \
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.unused = 0, \
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.call_abi = (XSHAL_ABI == XTHAL_ABI_CALL0 \
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? CallAbiCall0Only \
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: CallAbiDefault), \
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.debug_interrupt_level = XCHAL_DEBUGLEVEL, \
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.icache_line_bytes = XCHAL_ICACHE_LINESIZE, \
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.dcache_line_bytes = XCHAL_DCACHE_LINESIZE, \
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.dcache_writeback = XCHAL_DCACHE_IS_WRITEBACK, \
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.isa_use_windowed_registers = (XSHAL_ABI != XTHAL_ABI_CALL0), \
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.isa_use_density_instructions = XCHAL_HAVE_DENSITY, \
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.isa_use_exceptions = XCHAL_HAVE_EXCEPTIONS, \
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.isa_use_ext_l32r = XSHAL_USE_ABSOLUTE_LITERALS, \
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.isa_max_insn_size = XCHAL_MAX_INSTRUCTION_SIZE, \
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.debug_num_ibreaks = XCHAL_NUM_IBREAK, \
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.debug_num_dbreaks = XCHAL_NUM_DBREAK, \
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.regmap = rmap, \
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.num_regs = 0, \
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.num_nopriv_regs = 0, \
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.num_pseudo_regs = 0, \
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.num_aregs = XCHAL_NUM_AREGS, \
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.num_contexts = XCHAL_NUM_CONTEXTS, \
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.ar_base = -1, \
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.a0_base = -1, \
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.wb_regnum = -1, \
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.ws_regnum = -1, \
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.pc_regnum = -1, \
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.ps_regnum = -1, \
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.lbeg_regnum = -1, \
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.lend_regnum = -1, \
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.lcount_regnum = -1, \
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.sar_regnum = -1, \
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.litbase_regnum = -1, \
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.interrupt_regnum = -1, \
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.interrupt2_regnum = -1, \
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.cpenable_regnum = -1, \
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.debugcause_regnum = -1, \
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.exccause_regnum = -1, \
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.excvaddr_regnum = -1, \
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.max_register_raw_size = 0, \
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.max_register_virtual_size = 0, \
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.fp_layout = 0, \
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.fp_layout_bytes = 0, \
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.gregmap = 0, \
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}
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#define XTENSA_GDBARCH_TDEP_INSTANTIATE(rmap,spillsz) \
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{ \
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0, /* target_flags */ \
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-1, /* spill_location */ \
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(spillsz), /* spill_size */ \
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0, /* unused */ \
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(XSHAL_ABI == XTHAL_ABI_CALL0 \
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? CallAbiCall0Only \
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: CallAbiDefault), /* call_abi */ \
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XCHAL_DEBUGLEVEL, /* debug_interrupt_level */ \
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XCHAL_ICACHE_LINESIZE, /* icache_line_bytes */ \
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XCHAL_DCACHE_LINESIZE, /* dcache_line_bytes */ \
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XCHAL_DCACHE_IS_WRITEBACK, /* dcache_writeback */ \
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(XSHAL_ABI != XTHAL_ABI_CALL0), /* isa_use_windowed_registers */ \
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XCHAL_HAVE_DENSITY, /* isa_use_density_instructions */ \
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XCHAL_HAVE_EXCEPTIONS, /* isa_use_exceptions */ \
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XSHAL_USE_ABSOLUTE_LITERALS, /* isa_use_ext_l32r */ \
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XCHAL_MAX_INSTRUCTION_SIZE, /* isa_max_insn_size */ \
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XCHAL_NUM_IBREAK, /* debug_num_ibreaks */ \
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XCHAL_NUM_DBREAK, /* debug_num_dbreaks */ \
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rmap, /* regmap */ \
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0, /* num_regs */ \
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0, /* num_nopriv_regs */ \
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0, /* num_pseudo_regs */ \
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XCHAL_NUM_AREGS, /* num_aregs */ \
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XCHAL_NUM_CONTEXTS, /* num_contexts */ \
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-1, /* ar_base */ \
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-1, /* a0_base */ \
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-1, /* wb_regnum */ \
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-1, /* ws_regnum */ \
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-1, /* pc_regnum */ \
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-1, /* ps_regnum */ \
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-1, /* lbeg_regnum */ \
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-1, /* lend_regnum */ \
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-1, /* lcount_regnum */ \
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-1, /* sar_regnum */ \
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-1, /* litbase_regnum */ \
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-1, /* interrupt_regnum */ \
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-1, /* interrupt2_regnum */ \
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-1, /* cpenable_regnum */ \
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-1, /* debugcause_regnum */ \
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-1, /* exccause_regnum */ \
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-1, /* excvaddr_regnum */ \
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0, /* max_register_raw_size */ \
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0, /* max_register_virtual_size */ \
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0, /* fp_layout */ \
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0, /* fp_layout_bytes */ \
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0, /* gregmap */ \
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}
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#define XTENSA_CONFIG_INSTANTIATE(rmap,spill_size) \
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struct gdbarch_tdep xtensa_tdep = \
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XTENSA_GDBARCH_TDEP_INSTANTIATE(rmap,spill_size);
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