2010-10-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

* s390-opc.c: Make the instruction masks for the load/store on
	condition instructions to cover the condition code mask as well.
	* s390-opc.txt: lgoc -> locg and stgoc -> stocg.

2010-10-11  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/zarch-z196.d: Adjust the load/store on condition
	instructions.
	* gas/s390/zarch-z196.s: Likewise.
This commit is contained in:
Andreas Krebbel 2010-10-11 11:56:53 +00:00
parent b8f9044ba9
commit a3ec2691d0
6 changed files with 143 additions and 131 deletions

View file

@ -1,3 +1,9 @@
2010-10-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/zarch-z196.d: Adjust the load/store on condition
instructions.
* gas/s390/zarch-z196.s: Likewise.
2010-10-07 Bernd Schmidt <bernds@codesourcery.com>
* gas/tic6x/insns-c674x-sploop.d: Add two more sploop/spkernel tests.

View file

@ -90,90 +90,90 @@ Disassembly of section .text:
.*: b9 e2 d0 67 [ ]*locgrnh %r6,%r7
.*: b9 e2 e0 67 [ ]*locgrno %r6,%r7
.*: b9 e2 80 67 [ ]*locgre %r6,%r7
.*: eb 61 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),1
.*: eb 62 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),2
.*: eb 62 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),2
.*: eb 63 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),3
.*: eb 64 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),4
.*: eb 64 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),4
.*: eb 65 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),5
.*: eb 66 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),6
.*: eb 67 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),7
.*: eb 67 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),7
.*: eb 68 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),8
.*: eb 68 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),8
.*: eb 69 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),9
.*: eb 6a 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),10
.*: eb 6b 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),11
.*: eb 6b 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),11
.*: eb 6c 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),12
.*: eb 6d 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),13
.*: eb 6d 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),13
.*: eb 6e 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),14
.*: eb 68 7a 4d fe f2 [ ]*loc %r6,-5555\(%r7\),8
.*: eb 61 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),1
.*: eb 62 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),2
.*: eb 62 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),2
.*: eb 63 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),3
.*: eb 64 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),4
.*: eb 64 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),4
.*: eb 65 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),5
.*: eb 66 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),6
.*: eb 67 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),7
.*: eb 67 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),7
.*: eb 68 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),8
.*: eb 68 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),8
.*: eb 69 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),9
.*: eb 6a 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),10
.*: eb 6b 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),11
.*: eb 6b 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),11
.*: eb 6c 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),12
.*: eb 6d 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),13
.*: eb 6d 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),13
.*: eb 6e 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),14
.*: eb 68 7a 4d fe e2 [ ]*lgoc %r6,-5555\(%r7\),8
.*: eb 61 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),1
.*: eb 62 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),2
.*: eb 62 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),2
.*: eb 63 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),3
.*: eb 64 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),4
.*: eb 64 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),4
.*: eb 65 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),5
.*: eb 66 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),6
.*: eb 67 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),7
.*: eb 67 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),7
.*: eb 68 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),8
.*: eb 68 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),8
.*: eb 69 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),9
.*: eb 6a 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),10
.*: eb 6b 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),11
.*: eb 6b 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),11
.*: eb 6c 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),12
.*: eb 6d 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),13
.*: eb 6d 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),13
.*: eb 6e 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),14
.*: eb 68 7a 4d fe f3 [ ]*stoc %r6,-5555\(%r7\),8
.*: eb 61 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),1
.*: eb 62 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),2
.*: eb 62 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),2
.*: eb 63 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),3
.*: eb 64 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),4
.*: eb 64 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),4
.*: eb 65 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),5
.*: eb 66 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),6
.*: eb 67 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),7
.*: eb 67 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),7
.*: eb 68 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),8
.*: eb 68 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),8
.*: eb 69 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),9
.*: eb 6a 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),10
.*: eb 6b 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),11
.*: eb 6b 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),11
.*: eb 6c 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),12
.*: eb 6d 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),13
.*: eb 6d 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),13
.*: eb 6e 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),14
.*: eb 68 7a 4d fe e3 [ ]*stgoc %r6,-5555\(%r7\),8
.*: eb 61 7a 4d fe f2 [ ]*loco %r6,-5555\(%r7\)
.*: eb 62 7a 4d fe f2 [ ]*loch %r6,-5555\(%r7\)
.*: eb 62 7a 4d fe f2 [ ]*loch %r6,-5555\(%r7\)
.*: eb 63 7a 4d fe f2 [ ]*locnle %r6,-5555\(%r7\)
.*: eb 64 7a 4d fe f2 [ ]*locl %r6,-5555\(%r7\)
.*: eb 64 7a 4d fe f2 [ ]*locl %r6,-5555\(%r7\)
.*: eb 65 7a 4d fe f2 [ ]*locnhe %r6,-5555\(%r7\)
.*: eb 66 7a 4d fe f2 [ ]*loclh %r6,-5555\(%r7\)
.*: eb 67 7a 4d fe f2 [ ]*locne %r6,-5555\(%r7\)
.*: eb 67 7a 4d fe f2 [ ]*locne %r6,-5555\(%r7\)
.*: eb 68 7a 4d fe f2 [ ]*loce %r6,-5555\(%r7\)
.*: eb 68 7a 4d fe f2 [ ]*loce %r6,-5555\(%r7\)
.*: eb 69 7a 4d fe f2 [ ]*locnlh %r6,-5555\(%r7\)
.*: eb 6a 7a 4d fe f2 [ ]*loche %r6,-5555\(%r7\)
.*: eb 6b 7a 4d fe f2 [ ]*locnl %r6,-5555\(%r7\)
.*: eb 6b 7a 4d fe f2 [ ]*locnl %r6,-5555\(%r7\)
.*: eb 6c 7a 4d fe f2 [ ]*locle %r6,-5555\(%r7\)
.*: eb 6d 7a 4d fe f2 [ ]*locnh %r6,-5555\(%r7\)
.*: eb 6d 7a 4d fe f2 [ ]*locnh %r6,-5555\(%r7\)
.*: eb 6e 7a 4d fe f2 [ ]*locno %r6,-5555\(%r7\)
.*: eb 68 7a 4d fe f2 [ ]*loce %r6,-5555\(%r7\)
.*: eb 61 7a 4d fe e2 [ ]*locgo %r6,-5555\(%r7\)
.*: eb 62 7a 4d fe e2 [ ]*locgh %r6,-5555\(%r7\)
.*: eb 62 7a 4d fe e2 [ ]*locgh %r6,-5555\(%r7\)
.*: eb 63 7a 4d fe e2 [ ]*locgnle %r6,-5555\(%r7\)
.*: eb 64 7a 4d fe e2 [ ]*locgl %r6,-5555\(%r7\)
.*: eb 64 7a 4d fe e2 [ ]*locgl %r6,-5555\(%r7\)
.*: eb 65 7a 4d fe e2 [ ]*locgnhe %r6,-5555\(%r7\)
.*: eb 66 7a 4d fe e2 [ ]*locglh %r6,-5555\(%r7\)
.*: eb 67 7a 4d fe e2 [ ]*locgne %r6,-5555\(%r7\)
.*: eb 67 7a 4d fe e2 [ ]*locgne %r6,-5555\(%r7\)
.*: eb 68 7a 4d fe e2 [ ]*locge %r6,-5555\(%r7\)
.*: eb 68 7a 4d fe e2 [ ]*locge %r6,-5555\(%r7\)
.*: eb 69 7a 4d fe e2 [ ]*locgnlh %r6,-5555\(%r7\)
.*: eb 6a 7a 4d fe e2 [ ]*locghe %r6,-5555\(%r7\)
.*: eb 6b 7a 4d fe e2 [ ]*locgnl %r6,-5555\(%r7\)
.*: eb 6b 7a 4d fe e2 [ ]*locgnl %r6,-5555\(%r7\)
.*: eb 6c 7a 4d fe e2 [ ]*locgle %r6,-5555\(%r7\)
.*: eb 6d 7a 4d fe e2 [ ]*locgnh %r6,-5555\(%r7\)
.*: eb 6d 7a 4d fe e2 [ ]*locgnh %r6,-5555\(%r7\)
.*: eb 6e 7a 4d fe e2 [ ]*locgno %r6,-5555\(%r7\)
.*: eb 68 7a 4d fe e2 [ ]*locge %r6,-5555\(%r7\)
.*: eb 61 7a 4d fe f3 [ ]*stoco %r6,-5555\(%r7\)
.*: eb 62 7a 4d fe f3 [ ]*stoch %r6,-5555\(%r7\)
.*: eb 62 7a 4d fe f3 [ ]*stoch %r6,-5555\(%r7\)
.*: eb 63 7a 4d fe f3 [ ]*stocnle %r6,-5555\(%r7\)
.*: eb 64 7a 4d fe f3 [ ]*stocl %r6,-5555\(%r7\)
.*: eb 64 7a 4d fe f3 [ ]*stocl %r6,-5555\(%r7\)
.*: eb 65 7a 4d fe f3 [ ]*stocnhe %r6,-5555\(%r7\)
.*: eb 66 7a 4d fe f3 [ ]*stoclh %r6,-5555\(%r7\)
.*: eb 67 7a 4d fe f3 [ ]*stocne %r6,-5555\(%r7\)
.*: eb 67 7a 4d fe f3 [ ]*stocne %r6,-5555\(%r7\)
.*: eb 68 7a 4d fe f3 [ ]*stoce %r6,-5555\(%r7\)
.*: eb 68 7a 4d fe f3 [ ]*stoce %r6,-5555\(%r7\)
.*: eb 69 7a 4d fe f3 [ ]*stocnlh %r6,-5555\(%r7\)
.*: eb 6a 7a 4d fe f3 [ ]*stoche %r6,-5555\(%r7\)
.*: eb 6b 7a 4d fe f3 [ ]*stocnl %r6,-5555\(%r7\)
.*: eb 6b 7a 4d fe f3 [ ]*stocnl %r6,-5555\(%r7\)
.*: eb 6c 7a 4d fe f3 [ ]*stocle %r6,-5555\(%r7\)
.*: eb 6d 7a 4d fe f3 [ ]*stocnh %r6,-5555\(%r7\)
.*: eb 6d 7a 4d fe f3 [ ]*stocnh %r6,-5555\(%r7\)
.*: eb 6e 7a 4d fe f3 [ ]*stocno %r6,-5555\(%r7\)
.*: eb 68 7a 4d fe f3 [ ]*stoce %r6,-5555\(%r7\)
.*: eb 61 7a 4d fe e3 [ ]*stocgo %r6,-5555\(%r7\)
.*: eb 62 7a 4d fe e3 [ ]*stocgh %r6,-5555\(%r7\)
.*: eb 62 7a 4d fe e3 [ ]*stocgh %r6,-5555\(%r7\)
.*: eb 63 7a 4d fe e3 [ ]*stocgnle %r6,-5555\(%r7\)
.*: eb 64 7a 4d fe e3 [ ]*stocgl %r6,-5555\(%r7\)
.*: eb 64 7a 4d fe e3 [ ]*stocgl %r6,-5555\(%r7\)
.*: eb 65 7a 4d fe e3 [ ]*stocgnhe %r6,-5555\(%r7\)
.*: eb 66 7a 4d fe e3 [ ]*stocglh %r6,-5555\(%r7\)
.*: eb 67 7a 4d fe e3 [ ]*stocgne %r6,-5555\(%r7\)
.*: eb 67 7a 4d fe e3 [ ]*stocgne %r6,-5555\(%r7\)
.*: eb 68 7a 4d fe e3 [ ]*stocge %r6,-5555\(%r7\)
.*: eb 68 7a 4d fe e3 [ ]*stocge %r6,-5555\(%r7\)
.*: eb 69 7a 4d fe e3 [ ]*stocgnlh %r6,-5555\(%r7\)
.*: eb 6a 7a 4d fe e3 [ ]*stocghe %r6,-5555\(%r7\)
.*: eb 6b 7a 4d fe e3 [ ]*stocgnl %r6,-5555\(%r7\)
.*: eb 6b 7a 4d fe e3 [ ]*stocgnl %r6,-5555\(%r7\)
.*: eb 6c 7a 4d fe e3 [ ]*stocgle %r6,-5555\(%r7\)
.*: eb 6d 7a 4d fe e3 [ ]*stocgnh %r6,-5555\(%r7\)
.*: eb 6d 7a 4d fe e3 [ ]*stocgnh %r6,-5555\(%r7\)
.*: eb 6e 7a 4d fe e3 [ ]*stocgno %r6,-5555\(%r7\)
.*: eb 68 7a 4d fe e3 [ ]*stocge %r6,-5555\(%r7\)
.*: b9 f8 80 67 [ ]*ark %r6,%r7,%r8
.*: b9 e8 80 67 [ ]*agrk %r6,%r7,%r8
.*: ec 67 83 00 00 d8 [ ]*ahik %r6,%r7,-32000

View file

@ -109,27 +109,27 @@ foo:
locno %r6,-5555(%r7)
loc %r6,-5555(%r7),8
lgoco %r6,-5555(%r7)
lgoch %r6,-5555(%r7)
lgocp %r6,-5555(%r7)
lgocnle %r6,-5555(%r7)
lgocl %r6,-5555(%r7)
lgocm %r6,-5555(%r7)
lgocnhe %r6,-5555(%r7)
lgoclh %r6,-5555(%r7)
lgocne %r6,-5555(%r7)
lgocnz %r6,-5555(%r7)
lgoce %r6,-5555(%r7)
lgocz %r6,-5555(%r7)
lgocnlh %r6,-5555(%r7)
lgoche %r6,-5555(%r7)
lgocnl %r6,-5555(%r7)
lgocnm %r6,-5555(%r7)
lgocle %r6,-5555(%r7)
lgocnh %r6,-5555(%r7)
lgocnp %r6,-5555(%r7)
lgocno %r6,-5555(%r7)
lgoc %r6,-5555(%r7),8
locgo %r6,-5555(%r7)
locgh %r6,-5555(%r7)
locgp %r6,-5555(%r7)
locgnle %r6,-5555(%r7)
locgl %r6,-5555(%r7)
locgm %r6,-5555(%r7)
locgnhe %r6,-5555(%r7)
locglh %r6,-5555(%r7)
locgne %r6,-5555(%r7)
locgnz %r6,-5555(%r7)
locge %r6,-5555(%r7)
locgz %r6,-5555(%r7)
locgnlh %r6,-5555(%r7)
locghe %r6,-5555(%r7)
locgnl %r6,-5555(%r7)
locgnm %r6,-5555(%r7)
locgle %r6,-5555(%r7)
locgnh %r6,-5555(%r7)
locgnp %r6,-5555(%r7)
locgno %r6,-5555(%r7)
locg %r6,-5555(%r7),8
stoco %r6,-5555(%r7)
stoch %r6,-5555(%r7)
@ -153,27 +153,27 @@ foo:
stocno %r6,-5555(%r7)
stoc %r6,-5555(%r7),8
stgoco %r6,-5555(%r7)
stgoch %r6,-5555(%r7)
stgocp %r6,-5555(%r7)
stgocnle %r6,-5555(%r7)
stgocl %r6,-5555(%r7)
stgocm %r6,-5555(%r7)
stgocnhe %r6,-5555(%r7)
stgoclh %r6,-5555(%r7)
stgocne %r6,-5555(%r7)
stgocnz %r6,-5555(%r7)
stgoce %r6,-5555(%r7)
stgocz %r6,-5555(%r7)
stgocnlh %r6,-5555(%r7)
stgoche %r6,-5555(%r7)
stgocnl %r6,-5555(%r7)
stgocnm %r6,-5555(%r7)
stgocle %r6,-5555(%r7)
stgocnh %r6,-5555(%r7)
stgocnp %r6,-5555(%r7)
stgocno %r6,-5555(%r7)
stgoc %r6,-5555(%r7),8
stocgo %r6,-5555(%r7)
stocgh %r6,-5555(%r7)
stocgp %r6,-5555(%r7)
stocgnle %r6,-5555(%r7)
stocgl %r6,-5555(%r7)
stocgm %r6,-5555(%r7)
stocgnhe %r6,-5555(%r7)
stocglh %r6,-5555(%r7)
stocgne %r6,-5555(%r7)
stocgnz %r6,-5555(%r7)
stocge %r6,-5555(%r7)
stocgz %r6,-5555(%r7)
stocgnlh %r6,-5555(%r7)
stocghe %r6,-5555(%r7)
stocgnl %r6,-5555(%r7)
stocgnm %r6,-5555(%r7)
stocgle %r6,-5555(%r7)
stocgnh %r6,-5555(%r7)
stocgnp %r6,-5555(%r7)
stocgno %r6,-5555(%r7)
stocg %r6,-5555(%r7),8
ark %r6,%r7,%r8
agrk %r6,%r7,%r8

View file

@ -1,3 +1,9 @@
2010-10-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-opc.c: Make the instruction masks for the load/store on
condition instructions to cover the condition code mask as well.
* s390-opc.txt: lgoc -> locg and stgoc -> stocg.
2010-10-11 Jan Kratochvil <jan.kratochvil@redhat.com>
Jiang Jilin <freephp@gmail.com>

View file

@ -426,7 +426,7 @@ const struct s390_operand s390_operands[] =
#define MASK_RSY_AARD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
#define MASK_RSY_CCRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
#define MASK_RSY_RDRM { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
#define MASK_RSY_RDR0 { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
#define MASK_RSY_RDR0 { 0xff, 0x0f, 0x00, 0x00, 0x00, 0xff }
#define MASK_RXE_FRRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
#define MASK_RXE_RRRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
#define MASK_RXF_FRRDF { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff }

View file

@ -1008,12 +1008,12 @@ b9e2 locgr RRF_U0RR "load on condition 64 bit" z196 zarch
b9e200000000 locgr*16 RRF_00RR "load on condition 64 bit" z196 zarch
eb00000000f2 loc RSY_RDRM "load on condition 32 bit" z196 zarch
eb00000000f2 loc*12 RSY_RDR0 "load on condition 32 bit" z196 zarch
eb00000000e2 lgoc RSY_RDRM "load on condition 64 bit" z196 zarch
eb00000000e2 lgoc*12 RSY_RDR0 "load on condition 64 bit" z196 zarch
eb00000000e2 locg RSY_RDRM "load on condition 64 bit" z196 zarch
eb00000000e2 locg*12 RSY_RDR0 "load on condition 64 bit" z196 zarch
eb00000000f3 stoc RSY_RDRM "store on condition 32 bit" z196 zarch
eb00000000f3 stoc*12 RSY_RDR0 "store on condition 32 bit" z196 zarch
eb00000000e3 stgoc RSY_RDRM "store on condition 64 bit" z196 zarch
eb00000000e3 stgoc*12 RSY_RDR0 "store on condition 64 bit" z196 zarch
eb00000000e3 stocg RSY_RDRM "store on condition 64 bit" z196 zarch
eb00000000e3 stocg*12 RSY_RDR0 "store on condition 64 bit" z196 zarch
b9f8 ark RRF_R0RR2 "add 3 operands 32 bit" z196 zarch
b9e8 agrk RRF_R0RR2 "add 3 operands 64 bit" z196 zarch
ec00000000d8 ahik RIE_RRI0 "add immediate 3 operands 32 bit" z196 zarch