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Fix the disassembly of MSP430 extended index addressing mode.

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* msp430-dis.c (msp430_doubleoperand): Use extension_word to
	decide when extended addressing is being used.
This commit is contained in:
Nick Clifton 2014-06-03 08:54:04 +01:00
parent 69227609dc
commit 9f44512958
2 changed files with 16 additions and 11 deletions
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7
opcodes/ChangeLog
View file

@ -1,3 +1,8 @@
2014-06-03 Nick Clifton <nickc@redhat.com>
* msp430-dis.c (msp430_doubleoperand): Use extension_word to
decide when extended addressing is being used.
2014-06-02 Eric Botcazou <ebotcazou@adacore.com>
* sparc-opc.c (cas): Disable for LEON.
@ -34,7 +39,7 @@
* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
mips64r5.
(parse_mips_dis_option): Update MSA and virtualization support to
allow mips64r3 and mips64r5.
allow mips64r3 and mips64r5.
2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>

20
opcodes/msp430-dis.c
View file

@ -427,7 +427,7 @@ msp430_doubleoperand (disassemble_info *info,
sprintf (op1, "0x%04x", PS (dst));
sprintf (comm1, "PC rel. 0x%04x",
PS ((short) addr + 2 + dst));
if (extended_dst)
if (extension_word)
{
dst |= extended_dst << 16;
if (dst & 0x80000)
@ -448,7 +448,7 @@ msp430_doubleoperand (disassemble_info *info,
cmd_len += 4;
*cycles = 6;
sprintf (op1, "&0x%04x", PS (dst));
if (extended_dst)
if (extension_word)
{
dst |= extended_dst << 16;
sprintf (op1, "&0x%05x", dst & 0xfffff);
@ -458,7 +458,7 @@ msp430_doubleoperand (disassemble_info *info,
{
/* Indexed. */
dst = msp430dis_opcode (addr + 2, info);
if (extended_dst)
if (extension_word)
{
dst |= extended_dst << 16;
if (dst & 0x80000)
@ -519,7 +519,7 @@ msp430_doubleoperand (disassemble_info *info,
sprintf (op1, "#%d", dst);
if (dst > 9 || dst < 0)
sprintf (comm1, "#0x%04x", PS (dst));
if (extended_src)
if (extension_word)
{
dst |= extended_src << 16;
if (dst & 0x80000)
@ -543,7 +543,7 @@ msp430_doubleoperand (disassemble_info *info,
sprintf (op1, "0x%04x", PS (dst));
sprintf (comm1, "PC rel. 0x%04x",
PS ((short) addr + 2 + dst));
if (extended_src)
if (extension_word)
{
dst |= extended_src << 16;
if (dst & 0x80000)
@ -561,7 +561,7 @@ msp430_doubleoperand (disassemble_info *info,
cmd_len += 2;
sprintf (op1, "&0x%04x", PS (dst));
sprintf (comm1, "0x%04x", PS (dst));
if (extended_src)
if (extension_word)
{
dst |= extended_src << 16;
sprintf (op1, "&0x%05x", dst & 0xfffff);
@ -580,7 +580,7 @@ msp430_doubleoperand (disassemble_info *info,
/* Indexed. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
if (extended_src)
if (extension_word)
{
dst |= extended_src << 16;
if (dst & 0x80000)
@ -625,7 +625,7 @@ msp430_doubleoperand (disassemble_info *info,
sprintf (op2, "0x%04x", PS (dst));
sprintf (comm2, "PC rel. 0x%04x",
PS ((short) addr + cmd_len + dst));
if (extended_dst)
if (extension_word)
{
dst |= extended_dst << 16;
if (dst & 0x80000)
@ -642,7 +642,7 @@ msp430_doubleoperand (disassemble_info *info,
dst = msp430dis_opcode (addr + cmd_len, info);
cmd_len += 2;
sprintf (op2, "&0x%04x", PS (dst));
if (extended_dst)
if (extension_word)
{
dst |= extended_dst << 16;
sprintf (op2, "&0x%05x", dst & 0xfffff);
@ -656,7 +656,7 @@ msp430_doubleoperand (disassemble_info *info,
dst |= -1 << 16;
if (dst > 9 || dst < 0)
sprintf (comm2, "0x%04x", PS (dst));
if (extended_dst)
if (extension_word)
{
dst |= extended_dst << 16;
if (dst & 0x80000)