* m68hc11-tdep.c (gdb_print_insn_m68hc11): Use info->arch
instead of current_gdbarch. * sh64-tdep.c (gdb_print_insn_sh64): Remove. (sh64_gdbarch_init): Install print_insn_sh64 directly. * sh-tdep.c (gdb_print_insn_sh): Remove. (sh_gdbarch_init): Install print_insn_sh directly. * mips-tdep.c (gdb_print_insn_mips): Do not check mips_abi from current_gdbarch. (gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): New functions. (mips_gdbarch_init): Install them instead of gdb_print_insn_mips depending on mips_abi.
This commit is contained in:
parent
24568a2cd9
commit
9dae60cc03
5 changed files with 48 additions and 33 deletions
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@ -1,3 +1,19 @@
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2008-09-05 Ulrich Weigand <uweigand@de.ibm.com>
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* m68hc11-tdep.c (gdb_print_insn_m68hc11): Use info->arch
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instead of current_gdbarch.
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* sh64-tdep.c (gdb_print_insn_sh64): Remove.
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(sh64_gdbarch_init): Install print_insn_sh64 directly.
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* sh-tdep.c (gdb_print_insn_sh): Remove.
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(sh_gdbarch_init): Install print_insn_sh directly.
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* mips-tdep.c (gdb_print_insn_mips): Do not check mips_abi
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from current_gdbarch.
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(gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): New functions.
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(mips_gdbarch_init): Install them instead of gdb_print_insn_mips
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depending on mips_abi.
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2008-09-05 Ulrich Weigand <uweigand@de.ibm.com>
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* gdbarch.sh (addr_bits_remove): Change type to 'm'.
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@ -1349,7 +1349,7 @@ m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
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static int
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gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
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{
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if (gdbarch_bfd_arch_info (current_gdbarch)->arch == bfd_arch_m68hc11)
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if (info->arch == bfd_arch_m68hc11)
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return print_insn_m68hc11 (memaddr, info);
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else
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return print_insn_m68hc12 (memaddr, info);
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@ -4907,8 +4907,6 @@ reinit_frame_cache_sfunc (char *args, int from_tty,
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static int
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gdb_print_insn_mips (bfd_vma memaddr, struct disassemble_info *info)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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/* FIXME: cagney/2003-06-26: Is this even necessary? The
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disassembler needs to be able to locally determine the ISA, and
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not rely on GDB. Otherwize the stand-alone 'objdump -d' will not
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@ -4920,17 +4918,7 @@ gdb_print_insn_mips (bfd_vma memaddr, struct disassemble_info *info)
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memaddr &= (info->mach == bfd_mach_mips16 ? ~1 : ~3);
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/* Set the disassembler options. */
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if (tdep->mips_abi == MIPS_ABI_N32 || tdep->mips_abi == MIPS_ABI_N64)
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{
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/* Set up the disassembler info, so that we get the right
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register names from libopcodes. */
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if (tdep->mips_abi == MIPS_ABI_N32)
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info->disassembler_options = "gpr-names=n32";
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else
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info->disassembler_options = "gpr-names=64";
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info->flavour = bfd_target_elf_flavour;
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}
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else
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if (!info->disassembler_options)
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/* This string is not recognized explicitly by the disassembler,
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but it tells the disassembler to not try to guess the ABI from
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the bfd elf headers, such that, if the user overrides the ABI
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@ -4945,6 +4933,28 @@ gdb_print_insn_mips (bfd_vma memaddr, struct disassemble_info *info)
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return print_insn_little_mips (memaddr, info);
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}
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static int
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gdb_print_insn_mips_n32 (bfd_vma memaddr, struct disassemble_info *info)
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{
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/* Set up the disassembler info, so that we get the right
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register names from libopcodes. */
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info->disassembler_options = "gpr-names=n32";
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info->flavour = bfd_target_elf_flavour;
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return gdb_print_insn_mips (memaddr, info);
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}
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static int
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gdb_print_insn_mips_n64 (bfd_vma memaddr, struct disassemble_info *info)
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{
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/* Set up the disassembler info, so that we get the right
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register names from libopcodes. */
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info->disassembler_options = "gpr-names=64";
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info->flavour = bfd_target_elf_flavour;
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return gdb_print_insn_mips (memaddr, info);
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}
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/* This function implements gdbarch_breakpoint_from_pc. It uses the program
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counter value to determine whether a 16- or 32-bit breakpoint should be used.
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It returns a pointer to a string of bytes that encode a breakpoint
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@ -5872,7 +5882,12 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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set_gdbarch_print_registers_info (gdbarch, mips_print_registers_info);
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set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips);
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if (mips_abi == MIPS_ABI_N32)
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set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips_n32);
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else if (mips_abi == MIPS_ABI_N64)
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set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips_n64);
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else
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set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips);
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/* FIXME: cagney/2003-08-29: The macros HAVE_STEPPABLE_WATCHPOINT,
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HAVE_NONSTEPPABLE_WATCHPOINT, and HAVE_CONTINUABLE_WATCHPOINT
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@ -519,14 +519,6 @@ sh_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
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#define IS_ADD_REG_TO_FP(x) (((x) & 0xff0f) == 0x3e0c)
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#define IS_ADD_IMM_FP(x) (((x) & 0xff00) == 0x7e00)
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/* Disassemble an instruction. */
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static int
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gdb_print_insn_sh (bfd_vma memaddr, disassemble_info * info)
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{
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info->endian = gdbarch_byte_order (current_gdbarch);
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return print_insn_sh (memaddr, info);
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}
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static CORE_ADDR
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sh_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
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struct sh_frame_cache *cache, ULONGEST fpscr)
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set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
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set_gdbarch_print_insn (gdbarch, gdb_print_insn_sh);
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set_gdbarch_print_insn (gdbarch, print_insn_sh);
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set_gdbarch_register_sim_regno (gdbarch, legacy_register_sim_regno);
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set_gdbarch_return_value (gdbarch, sh_return_value_nofpu);
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@ -676,14 +676,6 @@ sh64_use_struct_convention (struct type *type)
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return (TYPE_LENGTH (type) > 8);
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}
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/* Disassemble an instruction. */
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static int
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gdb_print_insn_sh64 (bfd_vma memaddr, disassemble_info *info)
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{
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info->endian = gdbarch_byte_order (current_gdbarch);
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return print_insn_sh (memaddr, info);
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}
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/* For vectors of 4 floating point registers. */
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static int
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sh64_fv_reg_base_num (struct gdbarch *gdbarch, int fv_regnum)
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set_gdbarch_breakpoint_from_pc (gdbarch, sh64_breakpoint_from_pc);
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set_gdbarch_print_insn (gdbarch, gdb_print_insn_sh64);
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set_gdbarch_print_insn (gdbarch, print_insn_sh);
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set_gdbarch_register_sim_regno (gdbarch, legacy_register_sim_regno);
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set_gdbarch_return_value (gdbarch, sh64_return_value);
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