fix description of h8/500, sh floating point
This commit is contained in:
Ken Raeburn
parent
b2521e5b15
commit
99c4053d0c
1 changed files with 134 additions and 3 deletions
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@ -201,6 +201,11 @@ Here is a brief summary of how to invoke @code{@value{AS}}. For details,
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@ifset A29K
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@c am29k has no machine-dependent assembler options
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@end ifset
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@c start-sanitize-arc
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@ifset ARC
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[ -mbig-endian | -mlittle-endian ]
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@end ifset
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@c end-sanitize-arc
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@ifset H8
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@c Hitachi family chips have no machine-dependent assembler options
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@end ifset
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@ -316,6 +321,25 @@ Standard input, or source files to assemble.
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@end table
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@ifset ARC
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The following options are available when @value{AS} is configured for
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an ARC processor.
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@table @code
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@cindex ARC endianness
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@cindex endianness, ARC
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@cindex big endian output, ARC
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@item -mbig-endian
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Generate ``big endian'' format output.
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@cindex little endian output, ARC
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@item -mlittle-endian
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Generate ``little endian'' format output.
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@end table
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@end ifset
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@ifset I960
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The following options are available when @value{AS} is configured for the
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Intel 80960 processor.
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@ -920,6 +944,11 @@ target is allowed to redefine the local label prefix.
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@ifset HPPA
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On the HPPA local labels begin with @samp{L$}.
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@end ifset
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@c start-sanitize-arc
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@ifset ARC
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On the ARC local labels begin with @samp{.L}.
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@end ifset
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@c end-sanitize-arc
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@node o
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@section Name the Object File: @code{-o}
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@ -1134,6 +1163,11 @@ This means you may not nest these comments.
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@cindex line comment character
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Anything from the @dfn{line comment} character to the next newline
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is considered a comment and is ignored. The line comment character is
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@c start-sanitize-arc
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@ifset ARC
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@samp{;} on the ARC;
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@end ifset
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@c end-sanitize-arc
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@ifset VAX
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@samp{#} on the Vax;
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@end ifset
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@ -1598,6 +1632,11 @@ Hitachi SH,
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and AMD 29K architectures, the letter must be
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one of the letters @samp{DFPRSX} (in upper or lower case).
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@c start-sanitize-arc
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On the ARC, the letter one of the letters @samp{DFRS}
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(in upper or lower case).
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@c end-sanitize-arc
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On the Intel 960 architecture, the letter must be
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one of the letters @samp{DFT} (in upper or lower case).
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@ -1607,6 +1646,11 @@ On the HPPA architecture, the letter must be @samp{E} (upper case only).
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@ifset A29K
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One of the letters @samp{DFPRSX} (in upper or lower case).
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@end ifset
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@c start-sanitize-arc
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@ifset ARC
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One of the letters @samp{DFRS} (in upper or lower case).
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@end ifset
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@c end-sanitize-arc
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@ifset H8
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One of the letters @samp{DFPRSX} (in upper or lower case).
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@end ifset
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@ -3869,6 +3913,11 @@ include details on any machine's instruction set. For details on that
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subject, see the hardware manufacturer's manual.
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@menu
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@c start-sanitize-arc
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@ifset ARC
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* ARC-Dependent:: ARC Dependent Features
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@end ifset
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@c end-sanitize-arc
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@ifset VAX
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* Vax-Dependent:: VAX Dependent Features
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@end ifset
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@ -3917,7 +3966,84 @@ subject, see the hardware manufacturer's manual.
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@c major node below. Node defaulting in makeinfo requires adjacency of
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@c node and sectioning commands; hence the repetition of @chapter BLAH
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@c in both conditional blocks.
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@c
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@c start-sanitize-arc
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@ifset ARC
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@ifset GENERIC
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@page
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@node ARC-Dependent
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@chapter ARC Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter ARC Dependent Features
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@end ifclear
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@cindex ARC support
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@menu
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* ARC-Opts:: Options
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* ARC-Float:: Floating Point
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* ARC-Directives:: Sparc Machine Directives
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@end menu
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@node ARC-Opts
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@section Options
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@cindex options for ARC
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@cindex ARC options
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@cindex architectures, ARC
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@cindex ARC architectures
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The ARC chip family includes several successive levels (or other
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variants) of chip, using the same core instruction set, but including
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a few additional instructions at each level.
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By default, @code{@value{AS}} assumes the core instruction set (ARC
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base). The @code{.cpu} pseudo-op is used to select a different variant.
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@table @code
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@cindex @code{-mbig-endian} option (ARC)
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@cindex @code{-mlittle-endian} option (ARC)
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@cindex ARC big-endian output
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@cindex ARC little-endian output
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@cindex big-endian output, ARC
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@cindex little-endian output, ARC
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@item -mbig-endian
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@itemx -mlittle-endian
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Any @sc{arc} configuration of @code{@value{AS}} can select big-endian or
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little-endian output at run time (unlike most other @sc{gnu} development
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tools, which must be configured for one or the other). Use
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@samp{-mbig-endian} to select big-endian output, and @samp{-mlittle-endian}
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for little-endian.
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@end table
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@node ARC-Float
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@section Floating Point
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@cindex floating point, ARC (@sc{ieee})
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@cindex ARC floating point (@sc{ieee})
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The ARC cpu family currently does not have hardware floating point
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support. Software floating point support is provided by @code{GCC}
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and uses @sc{ieee} floating-point numbers.
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@node ARC-Directives
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@section ARC Machine Directives
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@cindex ARC machine directives
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@cindex machine directives, ARC
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The ARC version of @code{@value{AS}} supports the following additional
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machine directives:
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@table @code
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@item .cpu
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@cindex @code{cpu} directive, SPARC
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This must be followed by the desired cpu. It must be one of
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@code{base}, @code{host}, @code{graphics}, or @code{audio}.
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@end table
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@end ifset
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@c end-sanitize-arc
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@ifset VAX
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@ifset GENERIC
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@node Vax-Dependent
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@ -4241,6 +4367,7 @@ Vax bit fields can not be assembled with @code{@value{AS}}. Someone
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can add the required code if they really need it.
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@end ifset
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@ifset A29K
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@ifset GENERIC
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@page
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@ -4908,7 +5035,9 @@ Register indirect with post-increment
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@cindex floating point, H8/500 (@sc{ieee})
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@cindex H8/500 floating point (@sc{ieee})
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The H8/500 family uses @sc{ieee} floating-point numbers.
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The H8/500 family has no hardware floating point, but the @code{.float}
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directive generates @sc{ieee} floating-point numbers for compatibility
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with other development tools.
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@node H8/500 Directives
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@section H8/500 Machine Directives
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@ -5437,7 +5566,9 @@ Immediate data
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@cindex floating point, SH (@sc{ieee})
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@cindex SH floating point (@sc{ieee})
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The SH family uses @sc{ieee} floating-point numbers.
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The SH family has no hardware floating point, but the @code{.float}
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directive generates @sc{ieee} floating-point numbers for compatibility
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with other development tools.
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@node SH Directives
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@section SH Machine Directives
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