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* elf32-spu.c (struct spu_link_hash_table): Add fromelem_size_log2.
	(spu_elf_setup): Initialize it.
	(spu_elf_size_stubs): Move .ovtab into .bss for software i-cache.
	Update to new-sytle cache manager data structures.
	(spu_elf_build_stubs): Generate new-style cache manager data
	structures and symbols.
	(spu_elf_auto_overlay): Update size computation.

ld/testsuite/
	* ld-spu/icache1.d: Update all addresses to accomodate icache
	buffer shifted down 0x800 bytes.
This commit is contained in:
Ulrich Weigand 2009-05-14 16:04:02 +00:00
parent 452de53c12
commit 97fc8d845e
4 changed files with 209 additions and 140 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

10
bfd/ChangeLog
View file

@ -1,3 +1,13 @@
2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
* elf32-spu.c (struct spu_link_hash_table): Add fromelem_size_log2.
(spu_elf_setup): Initialize it.
(spu_elf_size_stubs): Move .ovtab into .bss for software i-cache.
Update to new-sytle cache manager data structures.
(spu_elf_build_stubs): Generate new-style cache manager data
structures and symbols.
(spu_elf_auto_overlay): Update size computation.
2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
* elf32-spu.c (spu_elf_modify_segment_map): Move all PF_OVERLAY

134
bfd/elf32-spu.c
View file

@ -322,6 +322,7 @@ struct spu_link_hash_table
/* For soft icache. */
unsigned int line_size_log2;
unsigned int num_lines_log2;
unsigned int fromelem_size_log2;
/* How much memory we have. */
unsigned int local_store;
@ -461,10 +462,18 @@ spu_elf_link_hash_table_create (bfd *abfd)
void
spu_elf_setup (struct bfd_link_info *info, struct spu_elf_params *params)
{
bfd_vma max_branch_log2;
struct spu_link_hash_table *htab = spu_hash_table (info);
htab->params = params;
htab->line_size_log2 = bfd_log2 (htab->params->line_size);
htab->num_lines_log2 = bfd_log2 (htab->params->num_lines);
/* For the software i-cache, we provide a "from" list whose size
is a power-of-two number of quadwords, big enough to hold one
byte per outgoing branch. Compute this number here. */
max_branch_log2 = bfd_log2 (htab->params->max_branch);
htab->fromelem_size_log2 = max_branch_log2 > 4 ? max_branch_log2 - 4 : 0;
}
/* Find the symbol for the given R_SYMNDX in IBFD and set *HP and *SYMP
@ -1704,21 +1713,24 @@ spu_elf_size_stubs (struct bfd_link_info *info)
stub->size = htab->stub_count[ovl] * ovl_stub_size (htab->params);
}
flags = (SEC_ALLOC | SEC_LOAD
| SEC_HAS_CONTENTS | SEC_IN_MEMORY);
if (htab->params->ovly_flavour == ovly_soft_icache)
{
/* Space for icache manager tables.
a) Tag array, one quadword per cache line.
b) Rewrite "to" list, one quadword per cache line.
c) Rewrite "from" list, one byte per outgoing branch (rounded up to
a power-of-two number of full quadwords) per cache line. */
flags = SEC_ALLOC;
htab->ovtab = bfd_make_section_anyway_with_flags (ibfd, ".ovtab", flags);
if (htab->ovtab == NULL
|| !bfd_set_section_alignment (ibfd, htab->ovtab, 4))
return 0;
if (htab->params->ovly_flavour == ovly_soft_icache)
{
/* Space for icache manager tables.
a) Tag array, one quadword per cache line.
b) Linked list elements, max_branch per line quadwords. */
htab->ovtab->size = 16 * ((1 + htab->params->max_branch)
<< htab->num_lines_log2);
htab->ovtab->size = (16 + 16 + (16 << htab->fromelem_size_log2))
<< htab->num_lines_log2;
flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY;
htab->init = bfd_make_section_anyway_with_flags (ibfd, ".ovini", flags);
if (htab->init == NULL
|| !bfd_set_section_alignment (ibfd, htab->init, 4))
@ -1741,6 +1753,12 @@ spu_elf_size_stubs (struct bfd_link_info *info)
. } _ovly_buf_table[];
. */
flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY;
htab->ovtab = bfd_make_section_anyway_with_flags (ibfd, ".ovtab", flags);
if (htab->ovtab == NULL
|| !bfd_set_section_alignment (ibfd, htab->ovtab, 4))
return 0;
htab->ovtab->size = htab->num_overlays * 16 + 16 + htab->num_buf * 4;
}
@ -1782,7 +1800,7 @@ spu_elf_place_overlay_data (struct bfd_link_info *info)
ovout = ".data";
if (htab->params->ovly_flavour == ovly_soft_icache)
ovout = ".data.icache";
ovout = ".bss";
(*htab->params->place_spu_section) (htab->ovtab, NULL, ovout);
(*htab->params->place_spu_section) (htab->toe, NULL, ".toe");
@ -1965,7 +1983,7 @@ spu_elf_build_stubs (struct bfd_link_info *info)
p = htab->ovtab->contents;
if (htab->params->ovly_flavour == ovly_soft_icache)
{
bfd_vma off, icache_base, linklist;
bfd_vma off;
h = define_ovtab_symbol (htab, "__icache_tag_array");
if (h == NULL)
@ -1980,32 +1998,38 @@ spu_elf_build_stubs (struct bfd_link_info *info)
h->root.u.def.value = 16 << htab->num_lines_log2;
h->root.u.def.section = bfd_abs_section_ptr;
icache_base = htab->ovl_sec[0]->vma;
linklist = (htab->ovtab->output_section->vma
+ htab->ovtab->output_offset
+ off);
for (i = 0; i < htab->params->num_lines; i++)
{
bfd_vma line_end = icache_base + ((i + 1) << htab->line_size_log2);
bfd_vma stub_base = line_end - htab->params->max_branch * 32;
bfd_vma link_elem = linklist + i * htab->params->max_branch * 16;
bfd_vma locator = link_elem - stub_base / 2;
bfd_put_32 (htab->ovtab->owner, locator, p + 4);
bfd_put_16 (htab->ovtab->owner, link_elem, p + 8);
bfd_put_16 (htab->ovtab->owner, link_elem, p + 10);
bfd_put_16 (htab->ovtab->owner, link_elem, p + 12);
bfd_put_16 (htab->ovtab->owner, link_elem, p + 14);
p += 16;
}
h = define_ovtab_symbol (htab, "__icache_linked_list");
h = define_ovtab_symbol (htab, "__icache_rewrite_to");
if (h == NULL)
return FALSE;
h->root.u.def.value = off;
h->size = htab->params->max_branch << (htab->num_lines_log2 + 4);
h->size = 16 << htab->num_lines_log2;
off += h->size;
p += h->size;
h = define_ovtab_symbol (htab, "__icache_rewrite_to_size");
if (h == NULL)
return FALSE;
h->root.u.def.value = 16 << htab->num_lines_log2;
h->root.u.def.section = bfd_abs_section_ptr;
h = define_ovtab_symbol (htab, "__icache_rewrite_from");
if (h == NULL)
return FALSE;
h->root.u.def.value = off;
h->size = 16 << (htab->fromelem_size_log2 + htab->num_lines_log2);
off += h->size;
h = define_ovtab_symbol (htab, "__icache_rewrite_from_size");
if (h == NULL)
return FALSE;
h->root.u.def.value = 16 << (htab->fromelem_size_log2
+ htab->num_lines_log2);
h->root.u.def.section = bfd_abs_section_ptr;
h = define_ovtab_symbol (htab, "__icache_log2_fromelemsize");
if (h == NULL)
return FALSE;
h->root.u.def.value = htab->fromelem_size_log2;
h->root.u.def.section = bfd_abs_section_ptr;
h = define_ovtab_symbol (htab, "__icache_base");
if (h == NULL)
@ -2014,12 +2038,42 @@ spu_elf_build_stubs (struct bfd_link_info *info)
h->root.u.def.section = bfd_abs_section_ptr;
h->size = htab->num_buf << htab->line_size_log2;
h = define_ovtab_symbol (htab, "__icache_linesize");
if (h == NULL)
return FALSE;
h->root.u.def.value = 1 << htab->line_size_log2;
h->root.u.def.section = bfd_abs_section_ptr;
h = define_ovtab_symbol (htab, "__icache_log2_linesize");
if (h == NULL)
return FALSE;
h->root.u.def.value = htab->line_size_log2;
h->root.u.def.section = bfd_abs_section_ptr;
h = define_ovtab_symbol (htab, "__icache_neg_log2_linesize");
if (h == NULL)
return FALSE;
h->root.u.def.value = -htab->line_size_log2;
h->root.u.def.section = bfd_abs_section_ptr;
h = define_ovtab_symbol (htab, "__icache_cachesize");
if (h == NULL)
return FALSE;
h->root.u.def.value = 1 << (htab->num_lines_log2 + htab->line_size_log2);
h->root.u.def.section = bfd_abs_section_ptr;
h = define_ovtab_symbol (htab, "__icache_log2_cachesize");
if (h == NULL)
return FALSE;
h->root.u.def.value = htab->num_lines_log2 + htab->line_size_log2;
h->root.u.def.section = bfd_abs_section_ptr;
h = define_ovtab_symbol (htab, "__icache_neg_log2_cachesize");
if (h == NULL)
return FALSE;
h->root.u.def.value = -(htab->num_lines_log2 + htab->line_size_log2);
h->root.u.def.section = bfd_abs_section_ptr;
if (htab->init != NULL && htab->init->size != 0)
{
htab->init->contents = bfd_zalloc (htab->init->owner,
@ -4271,14 +4325,14 @@ spu_elf_auto_overlay (struct bfd_link_info *info)
fixed_size += htab->non_ovly_stub * 16;
/* Space for icache manager tables.
a) Tag array, one quadword per cache line.
- word 0: ia address of present line, init to zero.
- word 1: link locator. link_elem=stub_addr/2+locator
- halfwords 4-7: head/tail pointers for linked lists. */
- word 0: ia address of present line, init to zero. */
fixed_size += 16 << htab->num_lines_log2;
/* b) Linked list elements, max_branch per line. */
fixed_size += htab->params->max_branch << (htab->num_lines_log2 + 4);
/* c) Indirect branch descriptors, 8 quadwords. */
fixed_size += 8 * 16;
/* b) Rewrite "to" list, one quadword per cache line. */
fixed_size += 16 << htab->num_lines_log2;
/* c) Rewrite "from" list, one byte per outgoing branch (rounded up
to a power-of-two number of full quadwords) per cache line. */
fixed_size += 16 << (htab->fromelem_size_log2
+ htab->num_lines_log2);
/* d) Pointer to __ea backing store (toe), 1 quadword. */
fixed_size += 16;
}

5
ld/testsuite/ChangeLog
View file

@ -1,3 +1,8 @@
2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
* ld-spu/icache1.d: Update all addresses to accomodate icache
buffer shifted down 0x800 bytes.
2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
* ld-spu/icache.d: Update file offsets.

198
ld/testsuite/ld-spu/icache1.d
View file

@ -6,14 +6,14 @@
Disassembly of section .ovl.init:
00000800 <__icache_fileoff>:
00000000 <__icache_fileoff>:
.* 00 00 00 00.*
.* 00 00 02 00.*
\.\.\.
Disassembly of section \.ovly1:
00000800 <\.ovly1>:
00000000 <\.ovly1>:
.* ai \$1,\$1,64 # 40
.* lqd \$0,16\(\$1\)
.* bi \$0
@ -21,43 +21,43 @@ Disassembly of section \.ovly1:
Disassembly of section \.ovly2:
00000c00 <f1>:
00000400 <f1>:
.* 40 20 00 00 nop \$0
.* 24 00 40 80 stqd \$0,16\(\$1\)
.* 1c f0 00 81 ai \$1,\$1,-64
.* 24 00 00 81 stqd \$1,0\(\$1\)
.* 33 00 73 80 brsl \$0,fac .*
.* 33 00 77 00 brsl \$0,fcc .*
.* 33 00 73 80 brsl \$0,7ac .*
.* 33 00 77 00 brsl \$0,7cc .*
\.\.\.
.* 32 00 16 80 br fec .*
.* 32 00 16 80 br 7ec .*
\.\.\.
fa0: 00 00 00 02.*
fa4: 00 04 11 04.*
fa8: a0 00 0c 10.*
fac: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
fb0: 00 00 ed 00.*
7a0: 00 00 00 02.*
7a4: 00 04 09 04.*
7a8: a0 00 04 10.*
7ac: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
7b0: 00 00 ed 00.*
\.\.\.
fc0: 00 00 00 02.*
fc4: 00 04 10 00.*
fc8: a0 00 0c 14.*
fcc: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
fd0: 00 00 00 00.*
fd4: 00 00 0a 80.*
7c0: 00 00 00 02.*
7c4: 00 04 08 00.*
7c8: a0 00 04 14.*
7cc: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
7d0: 00 00 00 00.*
7d4: 00 00 0a 80.*
\.\.\.
fe4: 00 04 08 00.*
fe8: 20 00 0f 38.*
fec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
7e4: 00 04 00 00.*
7e8: 20 00 07 38.*
7ec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
\.\.\.
ff8: 00 7f 0f 80.*
ffc: 00 00 00 00.*
7f8: 00 7f 0f 80.*
7fc: 00 00 00 00.*
Disassembly of section \.ovly3:
00001000 <f3>:
00000800 <f3>:
\.\.\.
.* 35 00 00 00 bi \$0
00001104 <f2>:
00000904 <f2>:
.* 1c e0 00 81 ai \$1,\$1,-128
.* 24 00 00 81 stqd \$1,0\(\$1\)
\.\.\.
@ -67,11 +67,11 @@ Disassembly of section \.ovly3:
Disassembly of section \.ovly4:
00001400 <f5>:
00000c00 <f5>:
.* 24 00 40 80 stqd \$0,16\(\$1\)
.* 24 f8 00 81 stqd \$1,-512\(\$1\)
.* 1c 80 00 81 ai \$1,\$1,-512
.* 33 7f fe 80 brsl \$0,1400 <f5> # 1400
.* 33 7f fe 80 brsl \$0,c00 <f5> # c00
\.\.\.
.* 42 01 00 03 ila \$3,200.*
.* 18 00 c0 81 a \$1,\$1,\$3
@ -81,124 +81,124 @@ Disassembly of section \.ovly4:
Disassembly of section \.ovly5:
00000800 <\.ovly5>:
00000000 <\.ovly5>:
\.\.\.
.* 42 01 00 03 ila \$3,200 .*
.* 18 00 c0 81 a \$1,\$1,\$3
.* 34 00 40 80 lqd \$0,16\(\$1\)
.* 30 01 7d 80 bra bec .*
.* 30 00 7d 80 bra 3ec .*
\.\.\.
be0: 00 00 00 03.*
be4: 00 04 14 00.*
be8: a0 00 0b 2c.*
bec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
3e0: 00 00 00 03.*
3e4: 00 04 0c 00.*
3e8: a0 00 03 2c.*
3ec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
\.\.\.
bfc: 00 03 fd 80.*
3fc: 00 01 fd 80.*
Disassembly of section \.ovly6:
00000c00 <\.ovly6>:
.* 31 01 f5 80 brasl \$0,fac .*
.* 33 00 79 00 brsl \$0,fcc .*
00000400 <\.ovly6>:
.* 31 00 f5 80 brasl \$0,7ac .*
.* 33 00 79 00 brsl \$0,7cc .*
\.\.\.
.* 32 00 18 80 br fec .*
.* 32 00 18 80 br 7ec .*
\.\.\.
fa0: 00 00 00 07.*
fa4: 00 08 14 00.*
fa8: a0 00 0c 00.*
fac: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
fb0: 00 03 75 80.*
7a0: 00 00 00 07.*
7a4: 00 08 0c 00.*
7a8: a0 00 04 00.*
7ac: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
7b0: 00 01 75 80.*
\.\.\.
fc0: 00 00 00 07.*
fc4: 00 08 14 00.*
fc8: a0 00 0c 04.*
fcc: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
fd0: 00 00 00 00.*
fd4: 00 00 86 80.*
7c0: 00 00 00 07.*
7c4: 00 08 0c 00.*
7c8: a0 00 04 04.*
7cc: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
7d0: 00 00 00 00.*
7d4: 00 00 86 80.*
\.\.\.
fe0: 00 00 00 04.*
fe4: 00 08 08 00.*
fe8: 20 00 0f 28.*
fec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
7e0: 00 00 00 04.*
7e4: 00 08 00 00.*
7e8: 20 00 07 28.*
7ec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
\.\.\.
ff8: 00 7f 03 80.*
ffc: 00 00 00 00.*
7f8: 00 7f 03 80.*
7fc: 00 00 00 00.*
Disassembly of section \.ovly7:
00001000 <\.ovly7>:
00000800 <\.ovly7>:
.* 41 7f ff 83 ilhu \$3,65535 # ffff
.* 60 f8 30 03 iohl \$3,61536 # f060
.* 18 00 c0 84 a \$4,\$1,\$3
.* 00 20 00 00 lnop
.* 04 00 02 01 ori \$1,\$4,0
.* 24 00 02 04 stqd \$4,0\(\$4\)
.* 33 00 72 80 brsl \$0,13ac .*
.* 33 00 76 00 brsl \$0,13cc .*
.* 33 00 72 80 brsl \$0,bac .*
.* 33 00 76 00 brsl \$0,bcc .*
.* 34 00 00 81 lqd \$1,0\(\$1\)
\.\.\.
.* 32 00 15 00 br 13ec .*
.* 32 00 15 00 br bec .*
\.\.\.
13a0: 00 00 00 03.*
13a4: 00 04 14 00.*
13a8: a0 00 10 18.*
13ac: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
ba0: 00 00 00 03.*
ba4: 00 04 0c 00.*
ba8: a0 00 08 18.*
bac: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
\.\.\.
13b8: 00 00 0f 80.*
13bc: 00 00 00 00.*
13c0: 00 00 00 07.*
13c4: 00 08 14 00.*
13c8: a0 00 10 1c.*
13cc: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
bb8: 00 00 0f 80.*
bbc: 00 00 00 00.*
bc0: 00 00 00 07.*
bc4: 00 08 0c 00.*
bc8: a0 00 08 1c.*
bcc: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
\.\.\.
13dc: 00 00 0a 80.*
13e0: 00 00 00 05.*
13e4: 00 08 0c 00.*
13e8: 20 00 13 44.*
13ec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
13f0: 00 00 00 00.*
13f4: 00 7f 02 80.*
bdc: 00 00 0a 80.*
be0: 00 00 00 05.*
be4: 00 08 04 00.*
be8: 20 00 0b 44.*
bec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
bf0: 00 00 00 00.*
bf4: 00 7f 02 80.*
\.\.\.
Disassembly of section \.ovly8:
00001400 <f4>:
00000c00 <f4>:
.* 24 00 40 80 stqd \$0,16\(\$1\)
.* 24 f8 00 81 stqd \$1,-512\(\$1\)
.* 1c 80 00 81 ai \$1,\$1,-512
.* 31 02 f9 80 brasl \$0,17cc .*
.* 31 01 f9 80 brasl \$0,fcc .*
\.\.\.
.* 32 00 17 80 br 17ec .*
.* 32 00 17 80 br fec .*
\.\.\.
17c0: 00 00 00 02.*
17c4: 00 04 11 04.*
17c8: a0 00 14 0c.*
17cc: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
fc0: 00 00 00 02.*
fc4: 00 04 09 04.*
fc8: a0 00 0c 0c.*
fcc: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
\.\.\.
17dc: 00 00 d9 00.*
17e0: 00 00 00 06.*
17e4: 00 08 10 00.*
17e8: 20 00 17 30.*
17ec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
17f0: 00 7f 0d 80.*
fdc: 00 00 d9 00.*
fe0: 00 00 00 06.*
fe4: 00 08 08 00.*
fe8: 20 00 0f 30.*
fec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
ff0: 00 7f 0d 80.*
\.\.\.
Disassembly of section \.text:
00001800 <_start>:
00001000 <_start>:
.* 41 00 02 03 ilhu \$3,4
.* 60 8a 00 03 iohl \$3,5120 # 1400
.* 32 00 04 80 br 182c.*
0000180c <__icache_br_handler>:
180c: 00 00 00 00 stop
00001810 <__icache_call_handler>:
.* 60 86 00 03 iohl \$3,3072 # c00
.* 32 00 04 80 br 102c.*
0000100c <__icache_br_handler>:
100c: 00 00 00 00 stop
00001010 <__icache_call_handler>:
\.\.\.
1820: 00 00 00 01.*
1824: 00 04 0c 00.*
1828: a0 00 18 08.*
182c: 31 03 02 4b brasl \$75,1810 <__icache_call_handler>
1020: 00 00 00 01.*
1024: 00 04 04 00.*
1028: a0 00 10 08.*
102c: 31 02 02 4b brasl \$75,1010 <__icache_call_handler>
\.\.\.
1838: 00 7e 7b 80.*
1038: 00 7e 7b 80.*
\.\.\.
#pass