2001-12-17 Fernando Nasser <fnasser@redhat.com>

From Richard Earnshaw <rearnsha@arm.com>:
	* arm-tdep.c (arm_software_single_step): New function. Implements
	software single-stepping for ARM targets.
	(arm_get_next_pc, thumb_get_next_pc, bitcount, shifted_reg_val): Only
	needed for software single-stepping.
	* config/arm/tm-arm.h: Activate SOFTWARE_SINGLE_STEP_P.
This commit is contained in:
Fernando Nasser 2001-12-17 17:03:58 +00:00
parent c5c586eddb
commit 9512d7fdf5
3 changed files with 55 additions and 8 deletions

View file

@ -1,11 +1,20 @@
2001-12-17 Fernando Nasser <fnasser@redhat.com>
From Richard Earnshaw <rearnsha@arm.com>:
* config/arm/nbsd.mh, config/arm/nbsd.mt, config/arm/tm-nbsd.h,
config/arm/nm-nbsd.h, config/arm/xm-nbsd.h: New files.
* armbsd-nat.c: New file.
* Makefile.in: Build it.
* configure.host, configure.tgt: Support NetBSD/arm.
* arm-tdep.c (arm_software_single_step): New function. Implements
software single-stepping for ARM targets.
(arm_get_next_pc, thumb_get_next_pc, bitcount, shifted_reg_val): Only
needed for software single-stepping.
* config/arm/tm-arm.h: Activate SOFTWARE_SINGLE_STEP_P.
2001-12-17 Fernando Nasser <fnasser@redhat.com>
From Richard Earnshaw <rearnsha@arm.com>:
* config/arm/nbsd.mh, config/arm/nbsd.mt, config/arm/tm-nbsd.h,
config/arm/nm-nbsd.h, config/arm/xm-nbsd.h: New files.
* armbsd-nat.c: New file.
* Makefile.in: Build it.
* configure.host, configure.tgt: Support NetBSD/arm.
2001-12-17 Corinna Vinschen <vinschen@redhat.com>

View file

@ -1532,6 +1532,8 @@ condition_true (unsigned long cond, unsigned long status_reg)
return 1;
}
#if SOFTWARE_SINGLE_STEP_P
/* Support routines for single stepping. Calculate the next PC value. */
#define submask(x) ((1L << ((x) + 1)) - 1)
#define bit(obj,st) (((obj) >> (st)) & 1)
#define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
@ -1866,6 +1868,32 @@ arm_get_next_pc (CORE_ADDR pc)
return nextpc;
}
/* single_step() is called just before we want to resume the inferior,
if we want to single-step it but there is no hardware or kernel
single-step support. We find the target of the coming instruction
and breakpoint it.
single_step is also called just after the inferior stops. If we had
set up a simulated single-step, we undo our damage. */
void
arm_software_single_step (ignore, insert_bpt)
int ignore; /* Signal, not needed */
int insert_bpt;
{
static int next_pc; /* State between setting and unsetting. */
static char break_mem[BREAKPOINT_MAX]; /* Temporary storage for mem@bpt */
if (insert_bpt)
{
next_pc = arm_get_next_pc (read_register (PC_REGNUM));
target_insert_breakpoint (next_pc, &break_mem);
}
else
target_remove_breakpoint (next_pc, &break_mem);
}
#endif /* SOFTWARE_SINGLE_STEP_P */
#include "bfd-in2.h"
#include "libcoff.h"

View file

@ -96,9 +96,9 @@ extern CORE_ADDR arm_saved_pc_after_call (struct frame_info *);
Even this may only true if the condition predicate is true. The
following use a condition predicate of ALWAYS so it is always TRUE.
There are other ways of forcing a breakpoint. ARM Linux, RisciX,
and I suspect NetBSD will all use a software interrupt rather than
an undefined instruction to force a trap. This can be handled by
There are other ways of forcing a breakpoint. ARM Linux, RISC iX,
and NetBSD will all use a software interrupt rather than an
undefined instruction to force a trap. This can be handled by
redefining some or all of the following in a target dependent
fashion. */
@ -451,6 +451,16 @@ void arm_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
int nargs, struct value ** args,
struct type * type, int gcc_p);
/* Most ARMs don't have single stepping capability, so provide a
single-stepping mechanism by default */
#ifndef SOFTWARE_SINGLE_STEP_P
#define SOFTWARE_SINGLE_STEP_P 1
#endif
#if SOFTWARE_SINGLE_STEP_P
#define SOFTWARE_SINGLE_STEP(sig,bpt) arm_software_single_step((sig), (bpt))
void arm_software_single_step PARAMS((int, int));
#endif
CORE_ADDR arm_get_next_pc (CORE_ADDR pc);
/* Macros for setting and testing a bit in a minimal symbol that marks