* ld.texinfo (Top): Document specific options of 68HC11 and 68HC12.
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@ -1,3 +1,7 @@
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2004-08-02 Stephane Carrez <stcarrez@nerim.fr>
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* ld.texinfo (Top): Document specific options of 68HC11 and 68HC12.
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2004-08-01 Stephane Carrez <stcarrez@nerim.fr>
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2004-08-01 Stephane Carrez <stcarrez@nerim.fr>
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* scripttempl/elfm68hc12.sc: Align text, rodata and data section
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* scripttempl/elfm68hc12.sc: Align text, rodata and data section
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@ -152,6 +152,9 @@ section entitled ``GNU Free Documentation License''.
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@ifset HPPA
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@ifset HPPA
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* HPPA ELF32:: ld and HPPA 32-bit ELF
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* HPPA ELF32:: ld and HPPA 32-bit ELF
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@end ifset
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@end ifset
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@ifset M68HC11
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* M68HC11/68HC12:: ld and the Motorola 68HC11 and 68HC12 families
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@end ifset
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@ifset TICOFF
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@ifset TICOFF
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* TI COFF:: ld and the TI COFF
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* TI COFF:: ld and the TI COFF
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@end ifset
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@end ifset
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@ -1302,6 +1305,9 @@ This option is only supported on a few targets.
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@ifset XTENSA
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@ifset XTENSA
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@xref{Xtensa,, @command{ld} and Xtensa Processors}.
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@xref{Xtensa,, @command{ld} and Xtensa Processors}.
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@end ifset
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@end ifset
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@ifset M68HC11
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@xref{M68HC11/68HC12,,@command{ld} and the 68HC11 and 68HC12}.
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@end ifset
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On some platforms, the @samp{--relax} option performs global
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On some platforms, the @samp{--relax} option performs global
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optimizations that become possible when the linker resolves addressing
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optimizations that become possible when the linker resolves addressing
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@ -2173,6 +2179,34 @@ subsystem version also.
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@c man end
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@c man end
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@ifset M68HC11
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@subsection Options specific to Motorola 68HC11 and 68HC12 targets
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@c man begin OPTIONS
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The 68HC11 and 68HC12 linkers support specific options to control the
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memory bank switching mapping and trampoline code generation.
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@table @gcctabopt
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@kindex --no-trampoline
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@item --no-trampoline
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This option disables the generation of trampoline. By default a trampoline
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is generated for each far function which is called using a @code{jsr}
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instruction (this happens when a pointer to a far function is taken).
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@kindex --bank-window
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@item --bank-window @var{name}
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This option indicates to the linker the name of the memory region in
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the @samp{MEMORY} specification that describes the memory bank window.
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The definition of such region is then used by the linker to compute
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paging and addresses within the memory window.
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@end table
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@c man end
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@end ifset
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@ifset UsesEnvVars
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@ifset UsesEnvVars
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@node Environment
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@node Environment
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@section Environment Variables
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@section Environment Variables
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@ -4648,6 +4682,9 @@ functionality are not listed.
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@ifset MSP430
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@ifset MSP430
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* MSP430:: @command{ld} and MSP430
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* MSP430:: @command{ld} and MSP430
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@end ifset
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@end ifset
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@ifset M68HC11
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* M68HC11/68HC12:: @code{ld} and the Motorola 68HC11 and 68HC12 families
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@end ifset
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@ifset TICOFF
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@ifset TICOFF
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* TI COFF:: @command{ld} and TI COFF
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* TI COFF:: @command{ld} and TI COFF
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@end ifset
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@end ifset
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@ -4788,6 +4825,57 @@ not itself call any subroutines).
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@raisesections
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@raisesections
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@end ifclear
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@end ifclear
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@ifset M68HC11
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@ifclear GENERIC
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@raisesections
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@end ifclear
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@node M68HC11/68HC12
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@section @command{ld} and the Motorola 68HC11 and 68HC12 families
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@cindex M68HC11 and 68HC12 support
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@subsection Linker Relaxation
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For the Motorola 68HC11, @command{ld} can perform these global
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optimizations when you specify the @samp{--relax} command-line option.
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@table @emph
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@cindex relaxing on M68HC11
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@item relaxing address modes
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@command{ld} finds all @code{jsr} and @code{jmp} instructions whose
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targets are within eight bits, and turns them into eight-bit
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program-counter relative @code{bsr} and @code{bra} instructions,
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respectively.
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@command{ld} also looks at all 16-bit extended addressing modes and
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transforms them in a direct addressing mode when the address is in
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page 0 (between 0 and 0x0ff).
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@item relaxing gcc instruction group
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When @command{gcc} is called with @option{-mrelax}, it can emit group
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of instructions that the linker can optimize to use a 68HC11 direct
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addressing mode. These instructions consists of @code{bclr} or
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@code{bset} instructions.
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@end table
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@subsection Trampoline Generation
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@cindex trampoline generation on M68HC11
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@cindex trampoline generation on M68HC12
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For 68HC11 and 68HC12, @command{ld} can generate trampoline code to
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call a far function using a normal @code{jsr} instruction. The linker
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will also change the relocation to some far function to use the
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trampoline address instead of the function address. This is typically the
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case when a pointer to a function is taken. The pointer will in fact
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point to the function trampoline.
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@ifclear GENERIC
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@lowersections
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@end ifclear
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@end ifset
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@node ARM
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@node ARM
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@section @command{ld}'s Support for Interworking Between ARM and Thumb Code
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@section @command{ld}'s Support for Interworking Between ARM and Thumb Code
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