* gas/config/tc-arm.c (do_t_bkpt_hlt1): New function.
(do_t_hlt): New function. (do_t_bkpt): Use do_t_bkpt_hlt1. (insns): Add HLT. * gas/testsuite/gas/arm/armv8-a-bad.l: Update for HLT. * gas/testsuite/gas/arm/armv8-a-bad.s: Likewise. * gas/testsuite/gas/arm/armv8-a.d: Likewise. * gas/testsuite/gas/arm/armv8-a.s: Likewise. * opcodes/arm-dis.c (arm_opcodes): Add HLT. (thumb_opcodes): Likewise.
This commit is contained in:
Matthew Gretton-Dann
parent
b79f7053dd
commit
8884b7208b
9 changed files with 69 additions and 3 deletions
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@ -1,3 +1,10 @@
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* config/tc-arm.c (do_t_bkpt_hlt1): New function.
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(do_t_hlt): New function.
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(do_t_bkpt): Use do_t_bkpt_hlt1.
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(insns): Add HLT.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* config/tc-arm.c (insns): Add DCPS instruction.
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@ -10198,18 +10198,34 @@ do_t_branch (void)
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inst.reloc.pc_rel = 1;
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}
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/* Actually do the work for Thumb state bkpt and hlt. The only difference
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between the two is the maximum immediate allowed - which is passed in
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RANGE. */
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static void
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do_t_bkpt (void)
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do_t_bkpt_hlt1 (int range)
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{
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constraint (inst.cond != COND_ALWAYS,
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_("instruction is always unconditional"));
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if (inst.operands[0].present)
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{
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constraint (inst.operands[0].imm > 255,
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constraint (inst.operands[0].imm > range,
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_("immediate value out of range"));
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inst.instruction |= inst.operands[0].imm;
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set_it_insn_type (NEUTRAL_IT_INSN);
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}
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set_it_insn_type (NEUTRAL_IT_INSN);
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}
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static void
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do_t_hlt (void)
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{
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do_t_bkpt_hlt1 (63);
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}
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static void
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do_t_bkpt (void)
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{
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do_t_bkpt_hlt1 (255);
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}
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static void
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@ -17974,7 +17990,9 @@ static const struct asm_opcode insns[] =
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#define THUMB_VARIANT & arm_ext_v8
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tCE("sevl", 320f005, _sevl, 0, (), noargs, t_hint),
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TUE("hlt", 1000070, ba80, 1, (oIffffb), bkpt, t_hlt),
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/* ARMv8 T32 only. */
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#undef ARM_VARIANT
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#define ARM_VARIANT NULL
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TUF("dcps1", 0, f78f8001, 0, (), noargs, noargs),
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@ -1,3 +1,10 @@
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* gas/arm/armv8-a-bad.l: Update for HLT.
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* gas/arm/armv8-a-bad.s: Likewise.
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* gas/arm/armv8-a.d: Likewise.
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* gas/arm/armv8-a.s: Likewise.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* gas/arm/armv8-a.d: Update.
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@ -7,3 +7,8 @@
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.*:14: Warning: This coprocessor register access is deprecated in ARMv8
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.*:17: Warning: setend use is deprecated for ARMv8
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.*:20: Warning: setend use is deprecated for ARMv8
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.*:24: Error: immediate value out of range -- `hlt 0x10000'
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.*:25: Error: instruction cannot be conditional -- `hltne 0x1'
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.*:29: Error: immediate value out of range -- `hlt 64'
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.*:31: Warning: it blocks containing 16-bit Thumb intsructions of the following class are deprecated in ARMv8: Miscellaneous 16-bit instructions
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.*:31: Error: instruction is always unconditional -- `hltne 0'
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@ -18,3 +18,14 @@
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.thumb
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setend le
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// HLT A32
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.arm
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hlt 0x10000
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hltne 0x1
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// HLT T32
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.thumb
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hlt 64
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it ne
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hltne 0
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@ -5,9 +5,14 @@
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Disassembly of section .text:
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0[0-9a-f]+ <[^>]+> e320f005 sevl
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0[0-9a-f]+ <[^>]+> e1000070 hlt 0x0000
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0[0-9a-f]+ <[^>]+> e100007f hlt 0x000f
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0[0-9a-f]+ <[^>]+> e10fff70 hlt 0xfff0
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0[0-9a-f]+ <[^>]+> bf50 sevl
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0[0-9a-f]+ <[^>]+> bf50 sevl
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0[0-9a-f]+ <[^>]+> f3af 8005 sevl.w
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0[0-9a-f]+ <[^>]+> f78f 8001 dcps1
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0[0-9a-f]+ <[^>]+> f78f 8002 dcps2
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0[0-9a-f]+ <[^>]+> f78f 8003 dcps3
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0[0-9a-f]+ <[^>]+> ba80 hlt 0x0000
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0[0-9a-f]+ <[^>]+> babf hlt 0x003f
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@ -5,6 +5,9 @@
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.arm
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foo:
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sevl
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hlt 0x0
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hlt 0xf
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hlt 0xfff0
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.thumb
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.thumb_func
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@ -15,3 +18,5 @@ bar:
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dcps1
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dcps2
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dcps3
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hlt 0
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hlt 63
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@ -1,3 +1,8 @@
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (arm_opcodes): Add HLT.
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(thumb_opcodes): Likewise.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (thumb32_opcodes): Add DCPS instruction.
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@ -851,6 +851,8 @@ static const struct opcode32 arm_opcodes[] =
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/* V8 instructions. */
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{ARM_EXT_V8, 0x0320f005, 0x0fffffff, "sevl"},
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{ARM_EXT_V8, 0xe1000070, 0xfff000f0, "hlt\t0x%16-19X%12-15X%8-11X%0-3X"},
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/* Virtualization Extension instructions. */
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{ARM_EXT_VIRT, 0x0160006e, 0x0fffffff, "eret%c"},
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@ -1249,6 +1251,7 @@ static const struct opcode16 thumb_opcodes[] =
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/* ARM V8 instructions. */
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{ARM_EXT_V8, 0xbf50, 0xffff, "sevl%c"},
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{ARM_EXT_V8, 0xba80, 0xffc0, "hlt\t%0-5x"},
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/* ARM V6K no-argument instructions. */
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{ARM_EXT_V6K, 0xbf00, 0xffff, "nop%c"},
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