* gas/all/fwdexp.d: Also look for f8ffffff.

* gas/arm/msr-reg-thumb.d: Skip for non-ELF based targets.
        * gas/arm/vldr.d: Likewise.
        * gas/arm/thumb2_ldmstm.d: Allow for extra NOPs at the end of the disassembly.
        * gas/cfi/cfi.exp (cfi-arm-1): Only run for ELF based ARM targets.
This commit is contained in:
Nick Clifton 2010-10-22 08:13:59 +00:00
parent 03cb634e19
commit 87c119b0c3
6 changed files with 16 additions and 1 deletions

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@ -1,3 +1,11 @@
2010-10-22 Nick Clifton <nickc@redhat.com>
* gas/all/fwdexp.d: Also look for f8ffffff.
* gas/arm/msr-reg-thumb.d: Skip for non-ELF based targets.
* gas/arm/vldr.d: Likewise.
* gas/arm/thumb2_ldmstm.d: Allow for extra NOPs at the end of the disassembly.
* gas/cfi/cfi.exp (cfi-arm-1): Only run for ELF based ARM targets.
2010-10-21 Joseph Myers <joseph@codesourcery.com>
* gas/tic6x/attr-arch-directive-1.d,

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@ -8,4 +8,4 @@ OFFSET +TYPE +VALUE
0+ .*(\.data|i)(|\+0xf+e|\+0xf+c|\+0xf+8)
Contents of section .*
0+ (0+|feff|fffe|fcffffff|fffffffc|f8ffffff ffffffff|ffffffff fffffff8) .*
0+ (0+|feff|fffe|fcffffff|fffffffc|f8ffffff|f8ffffff ffffffff|ffffffff fffffff8) .*

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@ -2,6 +2,7 @@
# as: -march=armv7-a -mthumb
# source: msr-reg.s
# objdump: -dr --prefix-addresses --show-raw-insn
# skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
.*: +file format .*arm.*

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@ -57,3 +57,4 @@ Disassembly of section .text:
0[0-9a-f]+ <[^>]+> 9800 ldr r0, \[sp, #0\]
0[0-9a-f]+ <[^>]+> f848 9b04 str.w r9, \[r8\], #4
0[0-9a-f]+ <[^>]+> f8c8 9000 str.w r9, \[r8\]
#pass

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@ -2,6 +2,7 @@
# as: -mfpu=vfp3 -mcpu=cortex-a8 -mthumb
# source: vldr.s
# objdump: -dr --prefix-addresses --show-raw-insn
# skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
.*: +file format .*arm.*

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@ -73,6 +73,10 @@ if { [istarget "i*86-*-*"] || [istarget "x86_64-*-*"] } then {
}
} elseif { [istarget "arm*-*"] || [istarget "xscale*-*"] } then {
# Only ELF based ARM targets support CFI.
if { [is_pecoff_format] } then {
return
}
run_dump_test "cfi-arm-1"
} elseif { [istarget "mips*-*"] } then {