2002-02-04 Chris Demetriou <cgd@broadcom.com>
* mips.igen (check_fmt, check_fmt_p): New functions to check whether specific floating point formats are usable. (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt) (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt) (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W): Use the new functions. (do_c_cond_fmt): Remove format checks... (C.cond.fmta, C.cond.fmtb): And move them into all callers.
This commit is contained in:
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0d4dcc4ad9
commit
8612006bd7
2 changed files with 116 additions and 133 deletions
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@ -1,3 +1,14 @@
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2002-02-04 Chris Demetriou <cgd@broadcom.com>
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* mips.igen (check_fmt, check_fmt_p): New functions to check
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whether specific floating point formats are usable.
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(ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
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(FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
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(ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
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Use the new functions.
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(do_c_cond_fmt): Remove format checks...
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(C.cond.fmta, C.cond.fmtb): And move them into all callers.
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2002-02-03 Chris Demetriou <cgd@broadcom.com>
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* mips.igen: Fix formatting of check_fpu calls.
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@ -3035,6 +3035,46 @@
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}
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}
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// Helpers:
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//
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// Check that the given FPU format is usable, and signal a
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// ReservedInstruction exception if not.
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//
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// check_fmt checks that the format is single or double.
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:function:::void:check_fmt:int fmt, instruction_word insn
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*mipsI:
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*mipsII:
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*mipsIII:
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*mipsIV:
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*mipsV:
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*vr4100:
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*vr5000:
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*r3900:
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException (ReservedInstruction, insn);
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}
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// check_fmt_p checks that the format is single, double, or paired single.
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:function:::void:check_fmt_p:int fmt, instruction_word insn
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*mipsI:
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*mipsII:
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*mipsIII:
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*mipsIV:
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*mipsV:
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*vr4100:
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*vr5000:
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*r3900:
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{
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/* None of these ISAs support Paired Single, so just fall back to
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the single/double check. */
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/* XXX FIXME: not true for mipsV, but we don't support .ps insns yet. */
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check_fmt (SD_, fmt, insn);
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}
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// Helper:
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//
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// Check that the FPU is currently usable, and signal a CoProcessorUnusable
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@ -3071,12 +3111,8 @@
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt,AbsoluteValue(ValueFPR(FS,fmt),fmt));
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}
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check_fmt_p (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt,AbsoluteValue(ValueFPR(FS,fmt),fmt));
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}
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@ -3094,12 +3130,8 @@
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction, instruction_0);
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else
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StoreFPR(FD,fmt,Add(ValueFPR(FS,fmt),ValueFPR(FT,fmt),fmt));
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}
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check_fmt_p (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt,Add(ValueFPR(FS,fmt),ValueFPR(FT,fmt),fmt));
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}
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@ -3170,38 +3202,33 @@
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:function:::void:do_c_cond_fmt:int fmt, int ft, int fs, int cc, int cond, instruction_word insn
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException (ReservedInstruction, insn);
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int less;
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int equal;
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int unordered;
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int condition;
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unsigned64 ofs = ValueFPR (fs, fmt);
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unsigned64 oft = ValueFPR (ft, fmt);
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if (NaN (ofs, fmt) || NaN (oft, fmt))
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{
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if (FCSR & FP_ENABLE (IO))
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{
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FCSR |= FP_CAUSE (IO);
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SignalExceptionFPE ();
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}
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less = 0;
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equal = 0;
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unordered = 1;
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}
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else
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{
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int less;
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int equal;
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int unordered;
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int condition;
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unsigned64 ofs = ValueFPR (fs, fmt);
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unsigned64 oft = ValueFPR (ft, fmt);
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if (NaN (ofs, fmt) || NaN (oft, fmt))
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{
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if (FCSR & FP_ENABLE (IO))
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{
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FCSR |= FP_CAUSE (IO);
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SignalExceptionFPE ();
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}
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less = 0;
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equal = 0;
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unordered = 1;
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}
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else
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{
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less = Less (ofs, oft, fmt);
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equal = Equal (ofs, oft, fmt);
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unordered = 0;
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}
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condition = (((cond & (1 << 2)) && less)
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|| ((cond & (1 << 1)) && equal)
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|| ((cond & (1 << 0)) && unordered));
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SETFCC (cc, condition);
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less = Less (ofs, oft, fmt);
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equal = Equal (ofs, oft, fmt);
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unordered = 0;
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}
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condition = (((cond & (1 << 2)) && less)
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|| ((cond & (1 << 1)) && equal)
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|| ((cond & (1 << 0)) && unordered));
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SETFCC (cc, condition);
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}
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010001,10,3.FMT,5.FT,5.FS,3.0,00,11,4.COND:COP1:32,f::C.cond.fmta
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@ -3210,8 +3237,10 @@
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*mipsII:
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*mipsIII:
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{
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int fmt = FMT;
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check_fpu (SD_);
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do_c_cond_fmt (SD_, FMT, FT, FS, 0, COND, instruction_0);
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check_fmt_p (SD_, fmt, instruction_0);
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do_c_cond_fmt (SD_, fmt, FT, FS, 0, COND, instruction_0);
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}
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010001,10,3.FMT,5.FT,5.FS,3.CC,00,11,4.COND:COP1:32,f::C.cond.fmtb
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@ -3223,8 +3252,10 @@
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*vr5000:
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*r3900:
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{
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int fmt = FMT;
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check_fpu (SD_);
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do_c_cond_fmt (SD_, FMT, FT, FS, CC, COND, instruction_0);
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check_fmt_p (SD_, fmt, instruction_0);
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do_c_cond_fmt (SD_, fmt, FT, FS, CC, COND, instruction_0);
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt_long,Convert(FP_RM_TOPINF,ValueFPR(FS,fmt),fmt,fmt_long));
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}
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check_fmt (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt_long,Convert(FP_RM_TOPINF,ValueFPR(FS,fmt),fmt,fmt_long));
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}
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@ -3259,12 +3286,8 @@
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt_word,Convert(FP_RM_TOPINF,ValueFPR(FS,fmt),fmt,fmt_word));
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}
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check_fmt (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt_word,Convert(FP_RM_TOPINF,ValueFPR(FS,fmt),fmt,fmt_word));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt,Divide(ValueFPR(FS,fmt),ValueFPR(FT,fmt),fmt));
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}
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check_fmt (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt,Divide(ValueFPR(FS,fmt),ValueFPR(FT,fmt),fmt));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt_long,Convert(FP_RM_TOMINF,ValueFPR(FS,fmt),fmt,fmt_long));
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}
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check_fmt (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt_long,Convert(FP_RM_TOMINF,ValueFPR(FS,fmt),fmt,fmt_long));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt_word,Convert(FP_RM_TOMINF,ValueFPR(FS,fmt),fmt,fmt_word));
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}
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check_fmt (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt_word,Convert(FP_RM_TOMINF,ValueFPR(FS,fmt),fmt,fmt_word));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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check_fmt_p (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt,ValueFPR(FS,fmt));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt,Multiply(ValueFPR(FS,fmt),ValueFPR(FT,fmt),fmt));
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}
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check_fmt_p (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt,Multiply(ValueFPR(FS,fmt),ValueFPR(FT,fmt),fmt));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt,Negate(ValueFPR(FS,fmt),fmt));
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}
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check_fmt_p (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt,Negate(ValueFPR(FS,fmt),fmt));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt,Recip(ValueFPR(FS,fmt),fmt));
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}
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check_fmt (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt,Recip(ValueFPR(FS,fmt),fmt));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt_long,Convert(FP_RM_NEAREST,ValueFPR(FS,fmt),fmt,fmt_long));
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}
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check_fmt (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt_long,Convert(FP_RM_NEAREST,ValueFPR(FS,fmt),fmt,fmt_long));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt_word,Convert(FP_RM_NEAREST,ValueFPR(FS,fmt),fmt,fmt_word));
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}
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check_fmt (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt_word,Convert(FP_RM_NEAREST,ValueFPR(FS,fmt),fmt,fmt_word));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt,Recip(SquareRoot(ValueFPR(FS,fmt),fmt),fmt));
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}
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check_fmt (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt,Recip(SquareRoot(ValueFPR(FS,fmt),fmt),fmt));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt,(SquareRoot(ValueFPR(FS,fmt),fmt)));
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}
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check_fmt (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt,(SquareRoot(ValueFPR(FS,fmt),fmt)));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt,Sub(ValueFPR(FS,fmt),ValueFPR(FT,fmt),fmt));
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}
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check_fmt_p (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt,Sub(ValueFPR(FS,fmt),ValueFPR(FT,fmt),fmt));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt_long,Convert(FP_RM_TOZERO,ValueFPR(FS,fmt),fmt,fmt_long));
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}
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check_fmt (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt_long,Convert(FP_RM_TOZERO,ValueFPR(FS,fmt),fmt,fmt_long));
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}
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{
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int fmt = FMT;
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check_fpu (SD_);
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{
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if ((fmt != fmt_single) && (fmt != fmt_double))
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SignalException(ReservedInstruction,instruction_0);
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else
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StoreFPR(FD,fmt_word,Convert(FP_RM_TOZERO,ValueFPR(FS,fmt),fmt,fmt_word));
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}
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check_fmt (SD_, fmt, instruction_0);
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StoreFPR(FD,fmt_word,Convert(FP_RM_TOZERO,ValueFPR(FS,fmt),fmt,fmt_word));
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}
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