* gas/i386/x86-64-opcode.d: More test cases for x86-64 opcodes.
* gas/i386/x86-64-opcode.s: Likewise
This commit is contained in:
Andreas Jaeger
parent
75245b2419
commit
858bc62dee
3 changed files with 338 additions and 314 deletions
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@ -1,3 +1,8 @@
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2002-03-19 Bo Thorsen <bo@suse.de>
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* gas/i386/x86-64-opcode.d: More test cases for x86-64 opcodes.
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* gas/i386/x86-64-opcode.s: Likewise
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2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
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* gas/mips/mips64-mips3d.s: New file.
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@ -39,7 +44,7 @@
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* gas/mips/jal-empic-elf-2.d, gas/mips/jal-empic-elf-2.s: New test.
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* gas/mips/jal-empic-elf-3.d, gas/mips/jal-empic-elf-3.s: New test.
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* gas/mips/mips.exp: Run the new tests.
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2002-02-25 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
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* mips-gp64-fp32-pic.d: Fix test of 64bit register loads.
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@ -242,7 +247,7 @@
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2002-02-06 Alexandre Oliva <aoliva@redhat.com>
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* gas/sh/pic.d, gas/sh/pic.s: New test.
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* gas/sh/basic.exp: Run it.
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* gas/sh/basic.exp: Run it.
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2002-02-05 Alan Modra <amodra@bigpond.net.au>
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@ -36,225 +36,236 @@ Disassembly of section .text:
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[ ]*43:[ ]+c6 00 00[ ]+movb[ ]+\$0[x0]*,\(%rax\)[ ]*(#.*)*
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[ ]*46:[ ]+66 41 c7 00 00 70[ ]+movw[ ]+\$0x7000,\(%r8\)[ ]*(#.*)*
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[ ]*4c:[ ]+66 c7 00 00 70[ ]+movw[ ]+\$0x7000,\(%rax\)[ ]*(#.*)*
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[ ]*51:[ ]+c7 00 00 00 00 70[ ]+movl[ ]+\$0x70000000,\(%rax\)[ ]*(#.*)*
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[ ]*57:[ ]+41 c6 00 00[ ]+movb[ ]+\$0[x0]*,\(%r8\)[ ]*(#.*)*
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[ ]*5b:[ ]+c6 00 00[ ]+movb[ ]+\$0[x0]*,\(%rax\)[ ]*(#.*)*
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[ ]*5e:[ ]+66 41 c7 00 00 70[ ]+movw[ ]+\$0x7000,\(%r8\)[ ]*(#.*)*
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[ ]*64:[ ]+66 c7 00 00 70[ ]+movw[ ]+\$0x7000,\(%rax\)[ ]*(#.*)*
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[ ]*69:[ ]+41 c7 00 00 00 00 70[ ]+movl[ ]+\$0x70000000,\(%r8\)[ ]*(#.*)*
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[ ]*51:[ ]+41 c7 00 00 00 00 70[ ]+movl[ ]+\$0x70000000,\(%r8\)[ ]*(#.*)*
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[ ]*58:[ ]+c7 00 00 00 00 70[ ]+movl[ ]+\$0x70000000,\(%rax\)[ ]*(#.*)*
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[ ]*5e:[ ]+41 c6 00 00[ ]+movb[ ]+\$0[x0]*,\(%r8\)[ ]*(#.*)*
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[ ]*62:[ ]+c6 00 00[ ]+movb[ ]+\$0[x0]*,\(%rax\)[ ]*(#.*)*
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[ ]*65:[ ]+66 41 c7 00 00 70[ ]+movw[ ]+\$0x7000,\(%r8\)[ ]*(#.*)*
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[ ]*6b:[ ]+66 c7 00 00 70[ ]+movw[ ]+\$0x7000,\(%rax\)[ ]*(#.*)*
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[ ]*70:[ ]+c7 00 00 00 00 70[ ]+movl[ ]+\$0x70000000,\(%rax\)[ ]*(#.*)*
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[ ]*76:[ ]+41 0f c3 00[ ]+movnti[ ]+%eax,\(%r8\)[ ]*(#.*)*
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[ ]*7a:[ ]+0f c3 00[ ]+movnti[ ]+%eax,\(%rax\)[ ]*(#.*)*
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[ ]*7d:[ ]+49 0f c3 00[ ]+movnti[ ]+%rax,\(%r8\)[ ]*(#.*)*
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[ ]*81:[ ]+48 0f c3 00[ ]+movnti[ ]+%rax,\(%rax\)[ ]*(#.*)*
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[ ]*85:[ ]+4d 0f c3 00[ ]+movnti[ ]+%r8,\(%r8\)[ ]*(#.*)*
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[ ]*89:[ ]+4c 0f c3 00[ ]+movnti[ ]+%r8,\(%rax\)[ ]*(#.*)*
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[ ]*8d:[ ]+41 f6 38[ ]+idivb[ ]+\(%r8\)[ ]*(#.*)*
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[ ]*90:[ ]+f6 38[ ]+idivb[ ]+\(%rax\)[ ]*(#.*)*
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[ ]*92:[ ]+66 41 f7 38[ ]+idivw[ ]+\(%r8\)[ ]*(#.*)*
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[ ]*96:[ ]+66 f7 38[ ]+idivw[ ]+\(%rax\)[ ]*(#.*)*
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||||
[ ]*99:[ ]+41 f7 38[ ]+idivl[ ]+\(%r8\)[ ]*(#.*)*
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||||
[ ]*9c:[ ]+f7 38[ ]+idivl[ ]+\(%rax\)[ ]*(#.*)*
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||||
[ ]*9e:[ ]+49 f7 38[ ]+idivq[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*a1:[ ]+48 f7 38[ ]+idivq[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*a4:[ ]+41 f6 28[ ]+imulb[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*a7:[ ]+f6 28[ ]+imulb[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*a9:[ ]+66 41 f7 28[ ]+imulw[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*ad:[ ]+66 f7 28[ ]+imulw[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*b0:[ ]+41 f7 28[ ]+imull[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*b3:[ ]+f7 28[ ]+imull[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*b5:[ ]+49 f7 28[ ]+imulq[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*b8:[ ]+48 f7 28[ ]+imulq[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*bb:[ ]+66 41 0f 58 00[ ]+addpd[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*c0:[ ]+66 0f 58 00[ ]+addpd[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*c4:[ ]+66 45 0f 58 38[ ]+addpd[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*c9:[ ]+66 44 0f 58 38[ ]+addpd[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*ce:[ ]+66 45 0f 58 00[ ]+addpd[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*d3:[ ]+66 44 0f 58 00[ ]+addpd[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*d8:[ ]+66 41 0f 58 38[ ]+addpd[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*dd:[ ]+66 0f 58 38[ ]+addpd[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
||||
[ ]*e1:[ ]+66 0f 58 c0[ ]+addpd[ ]+%xmm0,%xmm0[ ]*(#.*)*
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||||
[ ]*e5:[ ]+66 45 0f 58 ff[ ]+addpd[ ]+%xmm15,%xmm15[ ]*(#.*)*
|
||||
[ ]*ea:[ ]+66 45 0f 58 c7[ ]+addpd[ ]+%xmm15,%xmm8[ ]*(#.*)*
|
||||
[ ]*ef:[ ]+f2 49 0f 2d 00[ ]+cvtsd2siq[ ]+\(%r8\),%rax[ ]*(#.*)*
|
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[ ]*f4:[ ]+f2 48 0f 2d 00[ ]+cvtsd2siq[ ]+\(%rax\),%rax[ ]*(#.*)*
|
||||
[ ]*f9:[ ]+f2 4d 0f 2d 00[ ]+cvtsd2siq[ ]+\(%r8\),%r8[ ]*(#.*)*
|
||||
[ ]*fe:[ ]+f2 4c 0f 2d 00[ ]+cvtsd2siq[ ]+\(%rax\),%r8[ ]*(#.*)*
|
||||
[ ]*103:[ ]+f2 48 0f 2d c0[ ]+cvtsd2siq[ ]+%xmm0,%rax[ ]*(#.*)*
|
||||
[ ]*108:[ ]+f2 4d 0f 2d c7[ ]+cvtsd2siq[ ]+%xmm15,%r8[ ]*(#.*)*
|
||||
[ ]*10d:[ ]+f2 49 0f 2d c7[ ]+cvtsd2siq[ ]+%xmm15,%rax[ ]*(#.*)*
|
||||
[ ]*112:[ ]+f2 4d 0f 2d c0[ ]+cvtsd2siq[ ]+%xmm8,%r8[ ]*(#.*)*
|
||||
[ ]*117:[ ]+f2 49 0f 2d c0[ ]+cvtsd2siq[ ]+%xmm8,%rax[ ]*(#.*)*
|
||||
[ ]*11c:[ ]+f2 4c 0f 2d c7[ ]+cvtsd2siq[ ]+%xmm7,%r8[ ]*(#.*)*
|
||||
[ ]*121:[ ]+f2 48 0f 2d c7[ ]+cvtsd2siq[ ]+%xmm7,%rax[ ]*(#.*)*
|
||||
[ ]*126:[ ]+f2 4c 0f 2d c0[ ]+cvtsd2siq[ ]+%xmm0,%r8[ ]*(#.*)*
|
||||
[ ]*12b:[ ]+f2 49 0f 2c 00[ ]+cvttsd2siq[ ]+\(%r8\),%rax[ ]*(#.*)*
|
||||
[ ]*130:[ ]+f2 48 0f 2c 00[ ]+cvttsd2siq[ ]+\(%rax\),%rax[ ]*(#.*)*
|
||||
[ ]*135:[ ]+f2 4d 0f 2c 00[ ]+cvttsd2siq[ ]+\(%r8\),%r8[ ]*(#.*)*
|
||||
[ ]*13a:[ ]+f2 4c 0f 2c 00[ ]+cvttsd2siq[ ]+\(%rax\),%r8[ ]*(#.*)*
|
||||
[ ]*13f:[ ]+f2 48 0f 2c c0[ ]+cvttsd2siq[ ]+%xmm0,%rax[ ]*(#.*)*
|
||||
[ ]*144:[ ]+f2 4d 0f 2c c7[ ]+cvttsd2siq[ ]+%xmm15,%r8[ ]*(#.*)*
|
||||
[ ]*149:[ ]+f2 49 0f 2c c7[ ]+cvttsd2siq[ ]+%xmm15,%rax[ ]*(#.*)*
|
||||
[ ]*14e:[ ]+f2 4d 0f 2c c0[ ]+cvttsd2siq[ ]+%xmm8,%r8[ ]*(#.*)*
|
||||
[ ]*153:[ ]+f2 49 0f 2c c0[ ]+cvttsd2siq[ ]+%xmm8,%rax[ ]*(#.*)*
|
||||
[ ]*158:[ ]+f2 4c 0f 2c c7[ ]+cvttsd2siq[ ]+%xmm7,%r8[ ]*(#.*)*
|
||||
[ ]*15d:[ ]+f2 48 0f 2c c7[ ]+cvttsd2siq[ ]+%xmm7,%rax[ ]*(#.*)*
|
||||
[ ]*162:[ ]+f2 4c 0f 2c c0[ ]+cvttsd2siq[ ]+%xmm0,%r8[ ]*(#.*)*
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||||
[ ]*167:[ ]+f3 49 0f 2d 00[ ]+cvtss2siq[ ]+\(%r8\),%rax[ ]*(#.*)*
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||||
[ ]*16c:[ ]+f3 48 0f 2d 00[ ]+cvtss2siq[ ]+\(%rax\),%rax[ ]*(#.*)*
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[ ]*171:[ ]+f3 4d 0f 2d 00[ ]+cvtss2siq[ ]+\(%r8\),%r8[ ]*(#.*)*
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[ ]*176:[ ]+f3 4c 0f 2d 00[ ]+cvtss2siq[ ]+\(%rax\),%r8[ ]*(#.*)*
|
||||
[ ]*17b:[ ]+f3 48 0f 2d c0[ ]+cvtss2siq[ ]+%xmm0,%rax[ ]*(#.*)*
|
||||
[ ]*180:[ ]+f3 4d 0f 2d c7[ ]+cvtss2siq[ ]+%xmm15,%r8[ ]*(#.*)*
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||||
[ ]*185:[ ]+f3 49 0f 2d c7[ ]+cvtss2siq[ ]+%xmm15,%rax[ ]*(#.*)*
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||||
[ ]*18a:[ ]+f3 4d 0f 2d c0[ ]+cvtss2siq[ ]+%xmm8,%r8[ ]*(#.*)*
|
||||
[ ]*18f:[ ]+f3 49 0f 2d c0[ ]+cvtss2siq[ ]+%xmm8,%rax[ ]*(#.*)*
|
||||
[ ]*194:[ ]+f3 4c 0f 2d c7[ ]+cvtss2siq[ ]+%xmm7,%r8[ ]*(#.*)*
|
||||
[ ]*199:[ ]+f3 48 0f 2d c7[ ]+cvtss2siq[ ]+%xmm7,%rax[ ]*(#.*)*
|
||||
[ ]*19e:[ ]+f3 4c 0f 2d c0[ ]+cvtss2siq[ ]+%xmm0,%r8[ ]*(#.*)*
|
||||
[ ]*1a3:[ ]+f3 49 0f 2c 00[ ]+cvttss2siq[ ]+\(%r8\),%rax[ ]*(#.*)*
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||||
[ ]*1a8:[ ]+f3 48 0f 2c 00[ ]+cvttss2siq[ ]+\(%rax\),%rax[ ]*(#.*)*
|
||||
[ ]*1ad:[ ]+f3 4d 0f 2c 00[ ]+cvttss2siq[ ]+\(%r8\),%r8[ ]*(#.*)*
|
||||
[ ]*1b2:[ ]+f3 4c 0f 2c 00[ ]+cvttss2siq[ ]+\(%rax\),%r8[ ]*(#.*)*
|
||||
[ ]*1b7:[ ]+f3 48 0f 2c c0[ ]+cvttss2siq[ ]+%xmm0,%rax[ ]*(#.*)*
|
||||
[ ]*1bc:[ ]+f3 4d 0f 2c c7[ ]+cvttss2siq[ ]+%xmm15,%r8[ ]*(#.*)*
|
||||
[ ]*1c1:[ ]+f3 49 0f 2c c7[ ]+cvttss2siq[ ]+%xmm15,%rax[ ]*(#.*)*
|
||||
[ ]*1c6:[ ]+f3 4d 0f 2c c0[ ]+cvttss2siq[ ]+%xmm8,%r8[ ]*(#.*)*
|
||||
[ ]*1cb:[ ]+f3 49 0f 2c c0[ ]+cvttss2siq[ ]+%xmm8,%rax[ ]*(#.*)*
|
||||
[ ]*1d0:[ ]+f3 4c 0f 2c c7[ ]+cvttss2siq[ ]+%xmm7,%r8[ ]*(#.*)*
|
||||
[ ]*1d5:[ ]+f3 48 0f 2c c7[ ]+cvttss2siq[ ]+%xmm7,%rax[ ]*(#.*)*
|
||||
[ ]*1da:[ ]+f3 4c 0f 2c c0[ ]+cvttss2siq[ ]+%xmm0,%r8[ ]*(#.*)*
|
||||
[ ]*1df:[ ]+f3 41 0f 2a 00[ ]+cvtsi2ss[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*1e4:[ ]+f3 0f 2a 00[ ]+cvtsi2ss[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*1e8:[ ]+f3 45 0f 2a 38[ ]+cvtsi2ss[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*1ed:[ ]+f3 44 0f 2a 38[ ]+cvtsi2ss[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*1f2:[ ]+f3 45 0f 2a 00[ ]+cvtsi2ss[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*1f7:[ ]+f3 44 0f 2a 00[ ]+cvtsi2ss[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*1fc:[ ]+f3 41 0f 2a 38[ ]+cvtsi2ss[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*201:[ ]+f3 0f 2a 38[ ]+cvtsi2ss[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
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[ ]*205:[ ]+f3 0f 2a c0[ ]+cvtsi2ss[ ]+%eax,%xmm0[ ]*(#.*)*
|
||||
[ ]*209:[ ]+f3 44 0f 2a f8[ ]+cvtsi2ss[ ]+%eax,%xmm15[ ]*(#.*)*
|
||||
[ ]*20e:[ ]+f3 44 0f 2a c0[ ]+cvtsi2ss[ ]+%eax,%xmm8[ ]*(#.*)*
|
||||
[ ]*213:[ ]+f3 0f 2a f8[ ]+cvtsi2ss[ ]+%eax,%xmm7[ ]*(#.*)*
|
||||
[ ]*217:[ ]+f3 41 0f 2a 00[ ]+cvtsi2ss[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*21c:[ ]+f3 0f 2a 00[ ]+cvtsi2ss[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*220:[ ]+f3 45 0f 2a 38[ ]+cvtsi2ss[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*225:[ ]+f3 44 0f 2a 38[ ]+cvtsi2ss[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*22a:[ ]+f3 45 0f 2a 00[ ]+cvtsi2ss[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*22f:[ ]+f3 44 0f 2a 00[ ]+cvtsi2ss[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*234:[ ]+f3 41 0f 2a 38[ ]+cvtsi2ss[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*239:[ ]+f3 0f 2a 38[ ]+cvtsi2ss[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
||||
[ ]*23d:[ ]+f2 41 0f 2a 00[ ]+cvtsi2sd[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*242:[ ]+f2 0f 2a 00[ ]+cvtsi2sd[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*246:[ ]+f2 45 0f 2a 38[ ]+cvtsi2sd[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*24b:[ ]+f2 44 0f 2a 38[ ]+cvtsi2sd[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*250:[ ]+f2 45 0f 2a 00[ ]+cvtsi2sd[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*255:[ ]+f2 44 0f 2a 00[ ]+cvtsi2sd[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*25a:[ ]+f2 41 0f 2a 38[ ]+cvtsi2sd[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*25f:[ ]+f2 0f 2a 38[ ]+cvtsi2sd[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
||||
[ ]*263:[ ]+f2 0f 2a c0[ ]+cvtsi2sd[ ]+%eax,%xmm0[ ]*(#.*)*
|
||||
[ ]*267:[ ]+f2 44 0f 2a f8[ ]+cvtsi2sd[ ]+%eax,%xmm15[ ]*(#.*)*
|
||||
[ ]*26c:[ ]+f2 44 0f 2a c0[ ]+cvtsi2sd[ ]+%eax,%xmm8[ ]*(#.*)*
|
||||
[ ]*271:[ ]+f2 0f 2a f8[ ]+cvtsi2sd[ ]+%eax,%xmm7[ ]*(#.*)*
|
||||
[ ]*275:[ ]+f2 41 0f 2a 00[ ]+cvtsi2sd[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*27a:[ ]+f2 0f 2a 00[ ]+cvtsi2sd[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*27e:[ ]+f2 45 0f 2a 38[ ]+cvtsi2sd[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*283:[ ]+f2 44 0f 2a 38[ ]+cvtsi2sd[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*288:[ ]+f2 45 0f 2a 00[ ]+cvtsi2sd[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*28d:[ ]+f2 44 0f 2a 00[ ]+cvtsi2sd[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*292:[ ]+f2 41 0f 2a 38[ ]+cvtsi2sd[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*297:[ ]+f2 0f 2a 38[ ]+cvtsi2sd[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
||||
[ ]*29b:[ ]+66 41 0f 6e 00[ ]+movd[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*2a0:[ ]+66 0f 6e 00[ ]+movd[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*2a4:[ ]+66 45 0f 6e 38[ ]+movd[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*2a9:[ ]+66 44 0f 6e 38[ ]+movd[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*2ae:[ ]+66 45 0f 6e 00[ ]+movd[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*2b3:[ ]+66 44 0f 6e 00[ ]+movd[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*2b8:[ ]+66 41 0f 6e 38[ ]+movd[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*2bd:[ ]+66 0f 6e 38[ ]+movd[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
||||
[ ]*2c1:[ ]+66 0f 6e c0[ ]+movd[ ]+%eax,%xmm0[ ]*(#.*)*
|
||||
[ ]*2c5:[ ]+66 44 0f 6e f8[ ]+movd[ ]+%eax,%xmm15[ ]*(#.*)*
|
||||
[ ]*2ca:[ ]+66 44 0f 6e c0[ ]+movd[ ]+%eax,%xmm8[ ]*(#.*)*
|
||||
[ ]*2cf:[ ]+66 0f 6e f8[ ]+movd[ ]+%eax,%xmm7[ ]*(#.*)*
|
||||
[ ]*2d3:[ ]+66 41 0f 7e 00[ ]+movd[ ]+%xmm0,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*2d8:[ ]+66 0f 7e 00[ ]+movd[ ]+%xmm0,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*2dc:[ ]+66 45 0f 7e 38[ ]+movd[ ]+%xmm15,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*2e1:[ ]+66 44 0f 7e 38[ ]+movd[ ]+%xmm15,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*2e6:[ ]+66 45 0f 7e 00[ ]+movd[ ]+%xmm8,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*2eb:[ ]+66 44 0f 7e 00[ ]+movd[ ]+%xmm8,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*2f0:[ ]+66 41 0f 7e 38[ ]+movd[ ]+%xmm7,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*2f5:[ ]+66 0f 7e 38[ ]+movd[ ]+%xmm7,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*2f9:[ ]+66 0f 7e c0[ ]+movd[ ]+%xmm0,%eax[ ]*(#.*)*
|
||||
[ ]*2fd:[ ]+66 44 0f 7e f8[ ]+movd[ ]+%xmm15,%eax[ ]*(#.*)*
|
||||
[ ]*302:[ ]+66 44 0f 7e c0[ ]+movd[ ]+%xmm8,%eax[ ]*(#.*)*
|
||||
[ ]*307:[ ]+66 0f 7e f8[ ]+movd[ ]+%xmm7,%eax[ ]*(#.*)*
|
||||
[ ]*30b:[ ]+f3 41 0f 7e 00[ ]+movq[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*310:[ ]+f3 0f 7e 00[ ]+movq[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*314:[ ]+f3 45 0f 7e 38[ ]+movq[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*319:[ ]+f3 44 0f 7e 38[ ]+movq[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*31e:[ ]+f3 45 0f 7e 00[ ]+movq[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*323:[ ]+f3 44 0f 7e 00[ ]+movq[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*328:[ ]+f3 41 0f 7e 38[ ]+movq[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*32d:[ ]+f3 0f 7e 38[ ]+movq[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
||||
[ ]*331:[ ]+f3 0f 7e c0[ ]+movq[ ]+%xmm0,%xmm0[ ]*(#.*)*
|
||||
[ ]*335:[ ]+f3 45 0f 7e ff[ ]+movq[ ]+%xmm15,%xmm15[ ]*(#.*)*
|
||||
[ ]*33a:[ ]+f3 45 0f 7e c7[ ]+movq[ ]+%xmm15,%xmm8[ ]*(#.*)*
|
||||
[ ]*33f:[ ]+f3 41 0f 7e ff[ ]+movq[ ]+%xmm15,%xmm7[ ]*(#.*)*
|
||||
[ ]*344:[ ]+f3 41 0f 7e c7[ ]+movq[ ]+%xmm15,%xmm0[ ]*(#.*)*
|
||||
[ ]*349:[ ]+f3 45 0f 7e f8[ ]+movq[ ]+%xmm8,%xmm15[ ]*(#.*)*
|
||||
[ ]*34e:[ ]+f3 45 0f 7e c0[ ]+movq[ ]+%xmm8,%xmm8[ ]*(#.*)*
|
||||
[ ]*353:[ ]+f3 41 0f 7e f8[ ]+movq[ ]+%xmm8,%xmm7[ ]*(#.*)*
|
||||
[ ]*358:[ ]+f3 41 0f 7e c0[ ]+movq[ ]+%xmm8,%xmm0[ ]*(#.*)*
|
||||
[ ]*35d:[ ]+f3 44 0f 7e ff[ ]+movq[ ]+%xmm7,%xmm15[ ]*(#.*)*
|
||||
[ ]*362:[ ]+f3 44 0f 7e c7[ ]+movq[ ]+%xmm7,%xmm8[ ]*(#.*)*
|
||||
[ ]*367:[ ]+f3 0f 7e ff[ ]+movq[ ]+%xmm7,%xmm7[ ]*(#.*)*
|
||||
[ ]*36b:[ ]+f3 0f 7e c7[ ]+movq[ ]+%xmm7,%xmm0[ ]*(#.*)*
|
||||
[ ]*36f:[ ]+f3 44 0f 7e f8[ ]+movq[ ]+%xmm0,%xmm15[ ]*(#.*)*
|
||||
[ ]*374:[ ]+f3 44 0f 7e c0[ ]+movq[ ]+%xmm0,%xmm8[ ]*(#.*)*
|
||||
[ ]*379:[ ]+f3 0f 7e f8[ ]+movq[ ]+%xmm0,%xmm7[ ]*(#.*)*
|
||||
[ ]*37d:[ ]+66 41 0f d6 00[ ]+movq[ ]+%xmm0,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*382:[ ]+66 0f d6 00[ ]+movq[ ]+%xmm0,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*386:[ ]+66 45 0f d6 38[ ]+movq[ ]+%xmm15,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*38b:[ ]+66 44 0f d6 38[ ]+movq[ ]+%xmm15,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*390:[ ]+66 45 0f d6 00[ ]+movq[ ]+%xmm8,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*395:[ ]+66 44 0f d6 00[ ]+movq[ ]+%xmm8,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*39a:[ ]+66 41 0f d6 38[ ]+movq[ ]+%xmm7,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*39f:[ ]+41 0f 6e 00[ ]+movd[ ]+\(%r8\),%mm0[ ]*(#.*)*
|
||||
[ ]*3a3:[ ]+0f 6e 00[ ]+movd[ ]+\(%rax\),%mm0[ ]*(#.*)*
|
||||
[ ]*3a6:[ ]+41 0f 6e 38[ ]+movd[ ]+\(%r8\),%mm7[ ]*(#.*)*
|
||||
[ ]*3aa:[ ]+0f 6e 38[ ]+movd[ ]+\(%rax\),%mm7[ ]*(#.*)*
|
||||
[ ]*3ad:[ ]+0f 6e c0[ ]+movd[ ]+%eax,%mm0[ ]*(#.*)*
|
||||
[ ]*3b0:[ ]+0f 6e f8[ ]+movd[ ]+%eax,%mm7[ ]*(#.*)*
|
||||
[ ]*3b3:[ ]+41 0f 7e 00[ ]+movd[ ]+%mm0,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*3b7:[ ]+0f 7e 00[ ]+movd[ ]+%mm0,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*3ba:[ ]+41 0f 7e 38[ ]+movd[ ]+%mm7,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*3be:[ ]+0f 7e 38[ ]+movd[ ]+%mm7,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*3c1:[ ]+0f 7e c0[ ]+movd[ ]+%mm0,%eax[ ]*(#.*)*
|
||||
[ ]*3c4:[ ]+0f 7e f8[ ]+movd[ ]+%mm7,%eax[ ]*(#.*)*
|
||||
[ ]*3c7:[ ]+41 0f 6f 00[ ]+movq[ ]+\(%r8\),%mm0[ ]*(#.*)*
|
||||
[ ]*3cb:[ ]+0f 6f 00[ ]+movq[ ]+\(%rax\),%mm0[ ]*(#.*)*
|
||||
[ ]*3ce:[ ]+41 0f 6f 38[ ]+movq[ ]+\(%r8\),%mm7[ ]*(#.*)*
|
||||
[ ]*3d2:[ ]+0f 6f 38[ ]+movq[ ]+\(%rax\),%mm7[ ]*(#.*)*
|
||||
[ ]*3d5:[ ]+41 0f 7f 00[ ]+movq[ ]+%mm0,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*3d9:[ ]+0f 7f 00[ ]+movq[ ]+%mm0,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*3dc:[ ]+41 0f 7f 38[ ]+movq[ ]+%mm7,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*3e0:[ ]+0f 7f 38[ ]+movq[ ]+%mm7,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*3e3:[ ]+41 8f 00[ ]+popq[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*3e6:[ ]+8f 00[ ]+popq[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*3e8:[ ]+9d[ ]+popfq[ ]*(#.*)*
|
||||
[ ]*3e9:[ ]+41 ff 30[ ]+pushq[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*3ec:[ ]+ff 30[ ]+pushq[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*3ee:[ ]+9c[ ]+pushfq[ ]*(#.*)*
|
||||
[ ]*3ef:[ ]+0f 77[ ]+emms[ ]*(#.*)*
|
||||
[ ]*3f1:[ ]+0f 0e[ ]+femms[ ]*(#.*)*
|
||||
[ ]*3f3:[ ]+0f 08[ ]+invd[ ]*(#.*)*
|
||||
[ ]*3f5:[ ]+41 0f 01 38[ ]+invlpg[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*3f9:[ ]+0f 01 38[ ]+invlpg[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*3fc:[ ]+41 0f 01 38[ ]+invlpg[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*400:[ ]+0f 01 38[ ]+invlpg[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*403:[ ]+41 0f 01 38[ ]+invlpg[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*407:[ ]+0f 01 38[ ]+invlpg[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*40a:[ ]+0f 00 c0[ ]+sldt[ ]+%eax[ ]*(#.*)*
|
||||
[ ]*40d:[ ]+e6 00[ ]+out[ ]+%al,\$0[x0]*[ ]*(#.*)*
|
||||
[ ]*40f:[ ]+66 e7 00[ ]+out[ ]+%ax,\$0[x0]*[ ]*(#.*)*
|
||||
[ ]*412:[ ]+e7 00[ ]+out[ ]+%eax,\$0[x0]*[ ]*(#.*)*
|
||||
[ ]*76:[ ]+41 c6 00 00[ ]+movb[ ]+\$0[x0]*,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*7a:[ ]+c6 00 00[ ]+movb[ ]+\$0[x0]*,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*7d:[ ]+66 41 c7 00 00 70[ ]+movw[ ]+\$0x7000,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*83:[ ]+66 c7 00 00 70[ ]+movw[ ]+\$0x7000,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*88:[ ]+41 c7 00 00 00 00 70[ ]+movl[ ]+\$0x70000000,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*8f:[ ]+c7 00 00 00 00 70[ ]+movl[ ]+\$0x70000000,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*95:[ ]+49 c7 00 00 00 00 70[ ]+movq[ ]+\$0x70000000,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*9c:[ ]+48 c7 00 00 00 00 70[ ]+movq[ ]+\$0x70000000,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*a3:[ ]+41 0f c3 00[ ]+movnti[ ]+%eax,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*a7:[ ]+0f c3 00[ ]+movnti[ ]+%eax,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*aa:[ ]+49 0f c3 00[ ]+movnti[ ]+%rax,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*ae:[ ]+48 0f c3 00[ ]+movnti[ ]+%rax,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*b2:[ ]+4d 0f c3 00[ ]+movnti[ ]+%r8,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*b6:[ ]+4c 0f c3 00[ ]+movnti[ ]+%r8,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*ba:[ ]+41 f6 38[ ]+idivb[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*bd:[ ]+f6 38[ ]+idivb[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*bf:[ ]+66 41 f7 38[ ]+idivw[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*c3:[ ]+66 f7 38[ ]+idivw[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*c6:[ ]+41 f7 38[ ]+idivl[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*c9:[ ]+f7 38[ ]+idivl[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*cb:[ ]+49 f7 38[ ]+idivq[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*ce:[ ]+48 f7 38[ ]+idivq[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*d1:[ ]+41 f6 28[ ]+imulb[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*d4:[ ]+f6 28[ ]+imulb[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*d6:[ ]+66 41 f7 28[ ]+imulw[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*da:[ ]+66 f7 28[ ]+imulw[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*dd:[ ]+41 f7 28[ ]+imull[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*e0:[ ]+f7 28[ ]+imull[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*e2:[ ]+49 f7 28[ ]+imulq[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*e5:[ ]+48 f7 28[ ]+imulq[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*e8:[ ]+66 41 0f 58 00[ ]+addpd[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*ed:[ ]+66 0f 58 00[ ]+addpd[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*f1:[ ]+66 45 0f 58 38[ ]+addpd[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*f6:[ ]+66 44 0f 58 38[ ]+addpd[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*fb:[ ]+66 45 0f 58 00[ ]+addpd[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*100:[ ]+66 44 0f 58 00[ ]+addpd[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*105:[ ]+66 41 0f 58 38[ ]+addpd[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*10a:[ ]+66 0f 58 38[ ]+addpd[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
||||
[ ]*10e:[ ]+66 0f 58 c0[ ]+addpd[ ]+%xmm0,%xmm0[ ]*(#.*)*
|
||||
[ ]*112:[ ]+66 45 0f 58 ff[ ]+addpd[ ]+%xmm15,%xmm15[ ]*(#.*)*
|
||||
[ ]*117:[ ]+66 45 0f 58 c7[ ]+addpd[ ]+%xmm15,%xmm8[ ]*(#.*)*
|
||||
[ ]*11c:[ ]+f2 49 0f 2d 00[ ]+cvtsd2siq[ ]+\(%r8\),%rax[ ]*(#.*)*
|
||||
[ ]*121:[ ]+f2 48 0f 2d 00[ ]+cvtsd2siq[ ]+\(%rax\),%rax[ ]*(#.*)*
|
||||
[ ]*126:[ ]+f2 4d 0f 2d 00[ ]+cvtsd2siq[ ]+\(%r8\),%r8[ ]*(#.*)*
|
||||
[ ]*12b:[ ]+f2 4c 0f 2d 00[ ]+cvtsd2siq[ ]+\(%rax\),%r8[ ]*(#.*)*
|
||||
[ ]*130:[ ]+f2 48 0f 2d c0[ ]+cvtsd2siq[ ]+%xmm0,%rax[ ]*(#.*)*
|
||||
[ ]*135:[ ]+f2 4d 0f 2d c7[ ]+cvtsd2siq[ ]+%xmm15,%r8[ ]*(#.*)*
|
||||
[ ]*13a:[ ]+f2 49 0f 2d c7[ ]+cvtsd2siq[ ]+%xmm15,%rax[ ]*(#.*)*
|
||||
[ ]*13f:[ ]+f2 4d 0f 2d c0[ ]+cvtsd2siq[ ]+%xmm8,%r8[ ]*(#.*)*
|
||||
[ ]*144:[ ]+f2 49 0f 2d c0[ ]+cvtsd2siq[ ]+%xmm8,%rax[ ]*(#.*)*
|
||||
[ ]*149:[ ]+f2 4c 0f 2d c7[ ]+cvtsd2siq[ ]+%xmm7,%r8[ ]*(#.*)*
|
||||
[ ]*14e:[ ]+f2 48 0f 2d c7[ ]+cvtsd2siq[ ]+%xmm7,%rax[ ]*(#.*)*
|
||||
[ ]*153:[ ]+f2 4c 0f 2d c0[ ]+cvtsd2siq[ ]+%xmm0,%r8[ ]*(#.*)*
|
||||
[ ]*158:[ ]+f2 49 0f 2c 00[ ]+cvttsd2siq[ ]+\(%r8\),%rax[ ]*(#.*)*
|
||||
[ ]*15d:[ ]+f2 48 0f 2c 00[ ]+cvttsd2siq[ ]+\(%rax\),%rax[ ]*(#.*)*
|
||||
[ ]*162:[ ]+f2 4d 0f 2c 00[ ]+cvttsd2siq[ ]+\(%r8\),%r8[ ]*(#.*)*
|
||||
[ ]*167:[ ]+f2 4c 0f 2c 00[ ]+cvttsd2siq[ ]+\(%rax\),%r8[ ]*(#.*)*
|
||||
[ ]*16c:[ ]+f2 48 0f 2c c0[ ]+cvttsd2siq[ ]+%xmm0,%rax[ ]*(#.*)*
|
||||
[ ]*171:[ ]+f2 4d 0f 2c c7[ ]+cvttsd2siq[ ]+%xmm15,%r8[ ]*(#.*)*
|
||||
[ ]*176:[ ]+f2 49 0f 2c c7[ ]+cvttsd2siq[ ]+%xmm15,%rax[ ]*(#.*)*
|
||||
[ ]*17b:[ ]+f2 4d 0f 2c c0[ ]+cvttsd2siq[ ]+%xmm8,%r8[ ]*(#.*)*
|
||||
[ ]*180:[ ]+f2 49 0f 2c c0[ ]+cvttsd2siq[ ]+%xmm8,%rax[ ]*(#.*)*
|
||||
[ ]*185:[ ]+f2 4c 0f 2c c7[ ]+cvttsd2siq[ ]+%xmm7,%r8[ ]*(#.*)*
|
||||
[ ]*18a:[ ]+f2 48 0f 2c c7[ ]+cvttsd2siq[ ]+%xmm7,%rax[ ]*(#.*)*
|
||||
[ ]*18f:[ ]+f2 4c 0f 2c c0[ ]+cvttsd2siq[ ]+%xmm0,%r8[ ]*(#.*)*
|
||||
[ ]*194:[ ]+f3 49 0f 2d 00[ ]+cvtss2siq[ ]+\(%r8\),%rax[ ]*(#.*)*
|
||||
[ ]*199:[ ]+f3 48 0f 2d 00[ ]+cvtss2siq[ ]+\(%rax\),%rax[ ]*(#.*)*
|
||||
[ ]*19e:[ ]+f3 4d 0f 2d 00[ ]+cvtss2siq[ ]+\(%r8\),%r8[ ]*(#.*)*
|
||||
[ ]*1a3:[ ]+f3 4c 0f 2d 00[ ]+cvtss2siq[ ]+\(%rax\),%r8[ ]*(#.*)*
|
||||
[ ]*1a8:[ ]+f3 48 0f 2d c0[ ]+cvtss2siq[ ]+%xmm0,%rax[ ]*(#.*)*
|
||||
[ ]*1ad:[ ]+f3 4d 0f 2d c7[ ]+cvtss2siq[ ]+%xmm15,%r8[ ]*(#.*)*
|
||||
[ ]*1b2:[ ]+f3 49 0f 2d c7[ ]+cvtss2siq[ ]+%xmm15,%rax[ ]*(#.*)*
|
||||
[ ]*1b7:[ ]+f3 4d 0f 2d c0[ ]+cvtss2siq[ ]+%xmm8,%r8[ ]*(#.*)*
|
||||
[ ]*1bc:[ ]+f3 49 0f 2d c0[ ]+cvtss2siq[ ]+%xmm8,%rax[ ]*(#.*)*
|
||||
[ ]*1c1:[ ]+f3 4c 0f 2d c7[ ]+cvtss2siq[ ]+%xmm7,%r8[ ]*(#.*)*
|
||||
[ ]*1c6:[ ]+f3 48 0f 2d c7[ ]+cvtss2siq[ ]+%xmm7,%rax[ ]*(#.*)*
|
||||
[ ]*1cb:[ ]+f3 4c 0f 2d c0[ ]+cvtss2siq[ ]+%xmm0,%r8[ ]*(#.*)*
|
||||
[ ]*1d0:[ ]+f3 49 0f 2c 00[ ]+cvttss2siq[ ]+\(%r8\),%rax[ ]*(#.*)*
|
||||
[ ]*1d5:[ ]+f3 48 0f 2c 00[ ]+cvttss2siq[ ]+\(%rax\),%rax[ ]*(#.*)*
|
||||
[ ]*1da:[ ]+f3 4d 0f 2c 00[ ]+cvttss2siq[ ]+\(%r8\),%r8[ ]*(#.*)*
|
||||
[ ]*1df:[ ]+f3 4c 0f 2c 00[ ]+cvttss2siq[ ]+\(%rax\),%r8[ ]*(#.*)*
|
||||
[ ]*1e4:[ ]+f3 48 0f 2c c0[ ]+cvttss2siq[ ]+%xmm0,%rax[ ]*(#.*)*
|
||||
[ ]*1e9:[ ]+f3 4d 0f 2c c7[ ]+cvttss2siq[ ]+%xmm15,%r8[ ]*(#.*)*
|
||||
[ ]*1ee:[ ]+f3 49 0f 2c c7[ ]+cvttss2siq[ ]+%xmm15,%rax[ ]*(#.*)*
|
||||
[ ]*1f3:[ ]+f3 4d 0f 2c c0[ ]+cvttss2siq[ ]+%xmm8,%r8[ ]*(#.*)*
|
||||
[ ]*1f8:[ ]+f3 49 0f 2c c0[ ]+cvttss2siq[ ]+%xmm8,%rax[ ]*(#.*)*
|
||||
[ ]*1fd:[ ]+f3 4c 0f 2c c7[ ]+cvttss2siq[ ]+%xmm7,%r8[ ]*(#.*)*
|
||||
[ ]*202:[ ]+f3 48 0f 2c c7[ ]+cvttss2siq[ ]+%xmm7,%rax[ ]*(#.*)*
|
||||
[ ]*207:[ ]+f3 4c 0f 2c c0[ ]+cvttss2siq[ ]+%xmm0,%r8[ ]*(#.*)*
|
||||
[ ]*20c:[ ]+f3 41 0f 2a 00[ ]+cvtsi2ss[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*211:[ ]+f3 0f 2a 00[ ]+cvtsi2ss[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*215:[ ]+f3 45 0f 2a 38[ ]+cvtsi2ss[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*21a:[ ]+f3 44 0f 2a 38[ ]+cvtsi2ss[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*21f:[ ]+f3 45 0f 2a 00[ ]+cvtsi2ss[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*224:[ ]+f3 44 0f 2a 00[ ]+cvtsi2ss[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*229:[ ]+f3 41 0f 2a 38[ ]+cvtsi2ss[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*22e:[ ]+f3 0f 2a 38[ ]+cvtsi2ss[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
||||
[ ]*232:[ ]+f3 0f 2a c0[ ]+cvtsi2ss[ ]+%eax,%xmm0[ ]*(#.*)*
|
||||
[ ]*236:[ ]+f3 44 0f 2a f8[ ]+cvtsi2ss[ ]+%eax,%xmm15[ ]*(#.*)*
|
||||
[ ]*23b:[ ]+f3 44 0f 2a c0[ ]+cvtsi2ss[ ]+%eax,%xmm8[ ]*(#.*)*
|
||||
[ ]*240:[ ]+f3 0f 2a f8[ ]+cvtsi2ss[ ]+%eax,%xmm7[ ]*(#.*)*
|
||||
[ ]*244:[ ]+f3 41 0f 2a 00[ ]+cvtsi2ss[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*249:[ ]+f3 0f 2a 00[ ]+cvtsi2ss[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*24d:[ ]+f3 45 0f 2a 38[ ]+cvtsi2ss[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*252:[ ]+f3 44 0f 2a 38[ ]+cvtsi2ss[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*257:[ ]+f3 45 0f 2a 00[ ]+cvtsi2ss[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*25c:[ ]+f3 44 0f 2a 00[ ]+cvtsi2ss[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*261:[ ]+f3 41 0f 2a 38[ ]+cvtsi2ss[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*266:[ ]+f3 0f 2a 38[ ]+cvtsi2ss[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
||||
[ ]*26a:[ ]+f2 41 0f 2a 00[ ]+cvtsi2sd[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*26f:[ ]+f2 0f 2a 00[ ]+cvtsi2sd[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*273:[ ]+f2 45 0f 2a 38[ ]+cvtsi2sd[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*278:[ ]+f2 44 0f 2a 38[ ]+cvtsi2sd[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*27d:[ ]+f2 45 0f 2a 00[ ]+cvtsi2sd[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*282:[ ]+f2 44 0f 2a 00[ ]+cvtsi2sd[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*287:[ ]+f2 41 0f 2a 38[ ]+cvtsi2sd[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*28c:[ ]+f2 0f 2a 38[ ]+cvtsi2sd[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
||||
[ ]*290:[ ]+f2 0f 2a c0[ ]+cvtsi2sd[ ]+%eax,%xmm0[ ]*(#.*)*
|
||||
[ ]*294:[ ]+f2 44 0f 2a f8[ ]+cvtsi2sd[ ]+%eax,%xmm15[ ]*(#.*)*
|
||||
[ ]*299:[ ]+f2 44 0f 2a c0[ ]+cvtsi2sd[ ]+%eax,%xmm8[ ]*(#.*)*
|
||||
[ ]*29e:[ ]+f2 0f 2a f8[ ]+cvtsi2sd[ ]+%eax,%xmm7[ ]*(#.*)*
|
||||
[ ]*2a2:[ ]+f2 41 0f 2a 00[ ]+cvtsi2sd[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*2a7:[ ]+f2 0f 2a 00[ ]+cvtsi2sd[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*2ab:[ ]+f2 45 0f 2a 38[ ]+cvtsi2sd[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*2b0:[ ]+f2 44 0f 2a 38[ ]+cvtsi2sd[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*2b5:[ ]+f2 45 0f 2a 00[ ]+cvtsi2sd[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*2ba:[ ]+f2 44 0f 2a 00[ ]+cvtsi2sd[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*2bf:[ ]+f2 41 0f 2a 38[ ]+cvtsi2sd[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*2c4:[ ]+f2 0f 2a 38[ ]+cvtsi2sd[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
||||
[ ]*2c8:[ ]+66 41 0f 6e 00[ ]+movd[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*2cd:[ ]+66 0f 6e 00[ ]+movd[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*2d1:[ ]+66 45 0f 6e 38[ ]+movd[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*2d6:[ ]+66 44 0f 6e 38[ ]+movd[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*2db:[ ]+66 45 0f 6e 00[ ]+movd[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*2e0:[ ]+66 44 0f 6e 00[ ]+movd[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*2e5:[ ]+66 41 0f 6e 38[ ]+movd[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*2ea:[ ]+66 0f 6e 38[ ]+movd[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
||||
[ ]*2ee:[ ]+66 0f 6e c0[ ]+movd[ ]+%eax,%xmm0[ ]*(#.*)*
|
||||
[ ]*2f2:[ ]+66 44 0f 6e f8[ ]+movd[ ]+%eax,%xmm15[ ]*(#.*)*
|
||||
[ ]*2f7:[ ]+66 44 0f 6e c0[ ]+movd[ ]+%eax,%xmm8[ ]*(#.*)*
|
||||
[ ]*2fc:[ ]+66 0f 6e f8[ ]+movd[ ]+%eax,%xmm7[ ]*(#.*)*
|
||||
[ ]*300:[ ]+66 41 0f 7e 00[ ]+movd[ ]+%xmm0,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*305:[ ]+66 0f 7e 00[ ]+movd[ ]+%xmm0,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*309:[ ]+66 45 0f 7e 38[ ]+movd[ ]+%xmm15,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*30e:[ ]+66 44 0f 7e 38[ ]+movd[ ]+%xmm15,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*313:[ ]+66 45 0f 7e 00[ ]+movd[ ]+%xmm8,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*318:[ ]+66 44 0f 7e 00[ ]+movd[ ]+%xmm8,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*31d:[ ]+66 41 0f 7e 38[ ]+movd[ ]+%xmm7,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*322:[ ]+66 0f 7e 38[ ]+movd[ ]+%xmm7,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*326:[ ]+66 0f 7e c0[ ]+movd[ ]+%xmm0,%eax[ ]*(#.*)*
|
||||
[ ]*32a:[ ]+66 44 0f 7e f8[ ]+movd[ ]+%xmm15,%eax[ ]*(#.*)*
|
||||
[ ]*32f:[ ]+66 44 0f 7e c0[ ]+movd[ ]+%xmm8,%eax[ ]*(#.*)*
|
||||
[ ]*334:[ ]+66 0f 7e f8[ ]+movd[ ]+%xmm7,%eax[ ]*(#.*)*
|
||||
[ ]*338:[ ]+f3 41 0f 7e 00[ ]+movq[ ]+\(%r8\),%xmm0[ ]*(#.*)*
|
||||
[ ]*33d:[ ]+f3 0f 7e 00[ ]+movq[ ]+\(%rax\),%xmm0[ ]*(#.*)*
|
||||
[ ]*341:[ ]+f3 45 0f 7e 38[ ]+movq[ ]+\(%r8\),%xmm15[ ]*(#.*)*
|
||||
[ ]*346:[ ]+f3 44 0f 7e 38[ ]+movq[ ]+\(%rax\),%xmm15[ ]*(#.*)*
|
||||
[ ]*34b:[ ]+f3 45 0f 7e 00[ ]+movq[ ]+\(%r8\),%xmm8[ ]*(#.*)*
|
||||
[ ]*350:[ ]+f3 44 0f 7e 00[ ]+movq[ ]+\(%rax\),%xmm8[ ]*(#.*)*
|
||||
[ ]*355:[ ]+f3 41 0f 7e 38[ ]+movq[ ]+\(%r8\),%xmm7[ ]*(#.*)*
|
||||
[ ]*35a:[ ]+f3 0f 7e 38[ ]+movq[ ]+\(%rax\),%xmm7[ ]*(#.*)*
|
||||
[ ]*35e:[ ]+f3 0f 7e c0[ ]+movq[ ]+%xmm0,%xmm0[ ]*(#.*)*
|
||||
[ ]*362:[ ]+f3 45 0f 7e ff[ ]+movq[ ]+%xmm15,%xmm15[ ]*(#.*)*
|
||||
[ ]*367:[ ]+f3 45 0f 7e c7[ ]+movq[ ]+%xmm15,%xmm8[ ]*(#.*)*
|
||||
[ ]*36c:[ ]+f3 41 0f 7e ff[ ]+movq[ ]+%xmm15,%xmm7[ ]*(#.*)*
|
||||
[ ]*371:[ ]+f3 41 0f 7e c7[ ]+movq[ ]+%xmm15,%xmm0[ ]*(#.*)*
|
||||
[ ]*376:[ ]+f3 45 0f 7e f8[ ]+movq[ ]+%xmm8,%xmm15[ ]*(#.*)*
|
||||
[ ]*37b:[ ]+f3 45 0f 7e c0[ ]+movq[ ]+%xmm8,%xmm8[ ]*(#.*)*
|
||||
[ ]*380:[ ]+f3 41 0f 7e f8[ ]+movq[ ]+%xmm8,%xmm7[ ]*(#.*)*
|
||||
[ ]*385:[ ]+f3 41 0f 7e c0[ ]+movq[ ]+%xmm8,%xmm0[ ]*(#.*)*
|
||||
[ ]*38a:[ ]+f3 44 0f 7e ff[ ]+movq[ ]+%xmm7,%xmm15[ ]*(#.*)*
|
||||
[ ]*38f:[ ]+f3 44 0f 7e c7[ ]+movq[ ]+%xmm7,%xmm8[ ]*(#.*)*
|
||||
[ ]*394:[ ]+f3 0f 7e ff[ ]+movq[ ]+%xmm7,%xmm7[ ]*(#.*)*
|
||||
[ ]*398:[ ]+f3 0f 7e c7[ ]+movq[ ]+%xmm7,%xmm0[ ]*(#.*)*
|
||||
[ ]*39c:[ ]+f3 44 0f 7e f8[ ]+movq[ ]+%xmm0,%xmm15[ ]*(#.*)*
|
||||
[ ]*3a1:[ ]+f3 44 0f 7e c0[ ]+movq[ ]+%xmm0,%xmm8[ ]*(#.*)*
|
||||
[ ]*3a6:[ ]+f3 0f 7e f8[ ]+movq[ ]+%xmm0,%xmm7[ ]*(#.*)*
|
||||
[ ]*3aa:[ ]+66 41 0f d6 00[ ]+movq[ ]+%xmm0,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*3af:[ ]+66 0f d6 00[ ]+movq[ ]+%xmm0,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*3b3:[ ]+66 45 0f d6 38[ ]+movq[ ]+%xmm15,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*3b8:[ ]+66 44 0f d6 38[ ]+movq[ ]+%xmm15,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*3bd:[ ]+66 45 0f d6 00[ ]+movq[ ]+%xmm8,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*3c2:[ ]+66 44 0f d6 00[ ]+movq[ ]+%xmm8,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*3c7:[ ]+66 41 0f d6 38[ ]+movq[ ]+%xmm7,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*3cc:[ ]+41 0f 6e 00[ ]+movd[ ]+\(%r8\),%mm0[ ]*(#.*)*
|
||||
[ ]*3d0:[ ]+0f 6e 00[ ]+movd[ ]+\(%rax\),%mm0[ ]*(#.*)*
|
||||
[ ]*3d3:[ ]+41 0f 6e 38[ ]+movd[ ]+\(%r8\),%mm7[ ]*(#.*)*
|
||||
[ ]*3d7:[ ]+0f 6e 38[ ]+movd[ ]+\(%rax\),%mm7[ ]*(#.*)*
|
||||
[ ]*3da:[ ]+0f 6e c0[ ]+movd[ ]+%eax,%mm0[ ]*(#.*)*
|
||||
[ ]*3dd:[ ]+0f 6e f8[ ]+movd[ ]+%eax,%mm7[ ]*(#.*)*
|
||||
[ ]*3e0:[ ]+41 0f 7e 00[ ]+movd[ ]+%mm0,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*3e4:[ ]+0f 7e 00[ ]+movd[ ]+%mm0,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*3e7:[ ]+41 0f 7e 38[ ]+movd[ ]+%mm7,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*3eb:[ ]+0f 7e 38[ ]+movd[ ]+%mm7,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*3ee:[ ]+0f 7e c0[ ]+movd[ ]+%mm0,%eax[ ]*(#.*)*
|
||||
[ ]*3f1:[ ]+0f 7e f8[ ]+movd[ ]+%mm7,%eax[ ]*(#.*)*
|
||||
[ ]*3f4:[ ]+41 0f 6f 00[ ]+movq[ ]+\(%r8\),%mm0[ ]*(#.*)*
|
||||
[ ]*3f8:[ ]+0f 6f 00[ ]+movq[ ]+\(%rax\),%mm0[ ]*(#.*)*
|
||||
[ ]*3fb:[ ]+41 0f 6f 38[ ]+movq[ ]+\(%r8\),%mm7[ ]*(#.*)*
|
||||
[ ]*3ff:[ ]+0f 6f 38[ ]+movq[ ]+\(%rax\),%mm7[ ]*(#.*)*
|
||||
[ ]*402:[ ]+41 0f 7f 00[ ]+movq[ ]+%mm0,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*406:[ ]+0f 7f 00[ ]+movq[ ]+%mm0,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*409:[ ]+41 0f 7f 38[ ]+movq[ ]+%mm7,\(%r8\)[ ]*(#.*)*
|
||||
[ ]*40d:[ ]+0f 7f 38[ ]+movq[ ]+%mm7,\(%rax\)[ ]*(#.*)*
|
||||
[ ]*410:[ ]+41 8f 00[ ]+popq[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*413:[ ]+8f 00[ ]+popq[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*415:[ ]+9d[ ]+popfq[ ]*(#.*)*
|
||||
[ ]*416:[ ]+41 ff 30[ ]+pushq[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*419:[ ]+ff 30[ ]+pushq[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*41b:[ ]+9c[ ]+pushfq[ ]*(#.*)*
|
||||
[ ]*41c:[ ]+0f 77[ ]+emms[ ]*(#.*)*
|
||||
[ ]*41e:[ ]+0f 0e[ ]+femms[ ]*(#.*)*
|
||||
[ ]*420:[ ]+0f 08[ ]+invd[ ]*(#.*)*
|
||||
[ ]*422:[ ]+41 0f 01 38[ ]+invlpg[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*426:[ ]+0f 01 38[ ]+invlpg[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*429:[ ]+41 0f 01 38[ ]+invlpg[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*42d:[ ]+0f 01 38[ ]+invlpg[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*430:[ ]+41 0f 01 38[ ]+invlpg[ ]+\(%r8\)[ ]*(#.*)*
|
||||
[ ]*434:[ ]+0f 01 38[ ]+invlpg[ ]+\(%rax\)[ ]*(#.*)*
|
||||
[ ]*437:[ ]+0f 00 c0[ ]+sldt[ ]+%eax[ ]*(#.*)*
|
||||
[ ]*43a:[ ]+e6 00[ ]+out[ ]+%al,\$0[x0]*[ ]*(#.*)*
|
||||
[ ]*43c:[ ]+66 e7 00[ ]+out[ ]+%ax,\$0[x0]*[ ]*(#.*)*
|
||||
[ ]*43f:[ ]+e7 00[ ]+out[ ]+%eax,\$0[x0]*[ ]*(#.*)*
|
||||
.*nop.*
|
||||
.*nop.*
|
||||
.*nop.*
|
||||
|
|
|
|||
|
|
@ -7,19 +7,19 @@
|
|||
CALLq *(%rax) # -- -- -- -- FF 10
|
||||
CALLq *(%r8) # -- -- -- 41 FF 10 ; REX to access upper reg.
|
||||
CALLq *(%rax) # -- -- -- -- FF 10
|
||||
|
||||
# RET
|
||||
|
||||
# RET
|
||||
lret # -- -- -- -- CB
|
||||
retq # -- -- -- -- C3
|
||||
|
||||
# IRET
|
||||
|
||||
# IRET
|
||||
IRET # -- -- -- -- CF ; 32-bit operand size
|
||||
IRETW # 66 -- -- -- CF ; O16 for 16-bit operand size
|
||||
IRETQ # -- -- -- 48 CF ; REX for 64-bit operand size
|
||||
|
||||
# CMP
|
||||
|
||||
# MOV
|
||||
|
||||
# CMP
|
||||
|
||||
# MOV
|
||||
MOVw %cs,(%r8) # 66 -- -- 41 8C 08 ; REX to access upper reg. O16 for 16-bit operand size
|
||||
MOVw %cs,(%rax) # 66 -- -- -- 8C 08 ; O16 for 16-bit operand size
|
||||
MOVw %ss,(%r8) # 66 -- -- 41 8C 10 ; REX to access upper reg. O16 for 16-bit operand size
|
||||
|
|
@ -38,6 +38,12 @@
|
|||
MOVl (%rax),%fs # -- -- -- -- 8E 20
|
||||
MOVb $0,(%r8) # -- -- -- 41 C6 00 00 ; REX to access upper reg.
|
||||
MOVb $0,(%rax) # -- -- -- -- C6 00 00
|
||||
MOVw $0x7000,(%r8) # 66 -- -- 41 C7 00 00 70 ; REX to access upper reg. O16 for 16-bit operand size
|
||||
MOVw $0x7000,(%rax) # 66 -- -- -- C7 00 00 70 ; O16 for 16-bit operand size
|
||||
MOVl $0x70000000,(%r8) # -- -- -- 41 C7 00 00 00 00 70 ; REX to access upper reg.
|
||||
MOVl $0x70000000,(%rax) # -- -- -- -- C7 00 00 00 00 70
|
||||
MOVb $0,(%r8) # -- -- -- 41 C6 00 00 ; REX to access upper reg.
|
||||
MOVb $0,(%rax) # -- -- -- -- C6 00 00
|
||||
MOVw $0x7000,(%r8) # 66 -- -- -- 41 C7 00 00 70 ; O16 for 16-bit operand size
|
||||
MOVw $0x7000,(%rax) # 66 -- -- -- C7 00 00 70 ; O16 for 16-bit operand size
|
||||
MOVl $0x70000000,(%rax) # -- -- -- -- C7 00 00 00 00 70
|
||||
|
|
@ -47,8 +53,10 @@
|
|||
MOVw $0x7000,(%rax) # 66 -- -- -- C7 00 00 70 ; O16 for 16-bit operand size
|
||||
MOVl $0x70000000,(%r8) # -- -- -- 41 C7 00 00 00 00 70 ; REX to access upper reg.
|
||||
MOVl $0x70000000,(%rax) # -- -- -- -- C7 00 00 00 00 70
|
||||
|
||||
# MOVNTI
|
||||
MOVq $0x70000000,(%r8) # -- -- -- 49 C7 00 00 00 00 70 ; REX for 64-bit operand size. REX to access upper reg.
|
||||
MOVq $0x70000000,(%rax) # -- -- -- 48 C7 00 00 00 00 70 ; REX for 64-bit operand size
|
||||
|
||||
# MOVNTI
|
||||
MOVNTI %eax,(%r8) # -- -- -- 41 0f c3 00 ; REX to access upper reg.
|
||||
MOVNTI %eax,(%rax) # -- -- -- -- 0f c3 00
|
||||
MOVNTI %rax,(%r8) # -- -- -- 49 0F C3 00 ; REX to access upper reg. REX for 64-bit operand size
|
||||
|
|
@ -112,85 +120,85 @@
|
|||
ADDPD %xmm15,%xmm8 # -- -- 66 45 0F 58 C7 ; REX to access upper XMM reg. OVR 128bit MMinstr.
|
||||
|
||||
# CMPPD
|
||||
|
||||
# CVTSD2SI
|
||||
CVTSD2SIq (%r8),%rax # -- -- F2 49 0f 2d 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSD2SIq (%rax),%rax # -- -- F2 48 0f 2d 00 ; OVR 128-bit media instruction override REX for 64-bit operand size
|
||||
CVTSD2SIq (%r8),%r8 # -- -- F2 4D 0f 2d 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSD2SIq (%rax),%r8 # -- -- F2 4C 0f 2d 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSD2SIq %xmm0,%rax # -- -- F2 48 0f 2d c0 ; OVR 128-bit media instruction override REX for 64-bit operand size
|
||||
CVTSD2SIq %xmm15,%r8 # -- -- F2 4D 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSD2SIq %xmm15,%rax # -- -- F2 49 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg
|
||||
CVTSD2SIq %xmm8,%r8 # -- -- F2 4D 0f 2d c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSD2SIq %xmm8,%rax # -- -- F2 49 0f 2d c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg
|
||||
CVTSD2SIq %xmm7,%r8 # -- -- F2 4C 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSD2SIq %xmm7,%rax # -- -- F2 48 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size
|
||||
CVTSD2SIq %xmm0,%r8 # -- -- F2 4C 0f 2d c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
|
||||
# CVTTSD2SI
|
||||
CVTTSD2SIq (%r8),%rax # -- -- F2 49 0f 2c 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSD2SIq (%rax),%rax # -- -- F2 48 0f 2c 00 ; OVR 128-bit media instruction override REX for 64-bit operand size
|
||||
CVTTSD2SIq (%r8),%r8 # -- -- F2 4D 0f 2c 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSD2SIq (%rax),%r8 # -- -- F2 4C 0f 2c 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSD2SIq %xmm0,%rax # -- -- F2 48 0f 2c c0 ; OVR 128-bit media instruction override REX for 64-bit operand size
|
||||
CVTTSD2SIq %xmm15,%r8 # -- -- F2 4D 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTTSD2SIq %xmm15,%rax # -- -- F2 49 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg
|
||||
CVTTSD2SIq %xmm8,%r8 # -- -- F2 4D 0f 2c c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTTSD2SIq %xmm8,%rax # -- -- F2 49 0f 2c c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg
|
||||
CVTTSD2SIq %xmm7,%r8 # -- -- F2 4C 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSD2SIq %xmm7,%rax # -- -- F2 48 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size
|
||||
CVTTSD2SIq %xmm0,%r8 # -- -- F2 4C 0f 2c c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
|
||||
# CVTSS2SI
|
||||
CVTSS2SIq (%r8),%rax # -- -- F3 49 0f 2d 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSS2SIq (%rax),%rax # -- -- F3 48 0f 2d 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTSS2SIq (%r8),%r8 # -- -- F3 4D 0f 2d 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSS2SIq (%rax),%r8 # -- -- F3 4C 0f 2d 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSS2SIq %xmm0,%rax # -- -- F3 48 0f 2d c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTSS2SIq %xmm15,%r8 # -- -- F3 4D 0f 2d c7 ; OVR 128-bit media instruction override Result is sign extended REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSS2SIq %xmm15,%rax # -- -- F3 49 0f 2d c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg
|
||||
CVTSS2SIq %xmm8,%r8 # -- -- F3 4D 0f 2d c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSS2SIq %xmm8,%rax # -- -- F3 49 0f 2d c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTSS2SIq %xmm7,%r8 # -- -- F3 4C 0f 2d c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSS2SIq %xmm7,%rax # -- -- F3 48 0f 2d c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTSS2SIq %xmm0,%r8 # -- -- F3 4C 0f 2d c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
|
||||
# CVTTSS2SI
|
||||
CVTTSS2SIq (%r8),%rax # -- -- F3 49 0f 2c 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSS2SIq (%rax),%rax # -- -- F3 48 0f 2c 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTTSS2SIq (%r8),%r8 # -- -- F3 4D 0f 2c 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSS2SIq (%rax),%r8 # -- -- F3 4C 0f 2c 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSS2SIq %xmm0,%rax # -- -- F3 48 0f 2c c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTTSS2SIq %xmm15,%r8 # -- -- F3 4D 0f 2c c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTTSS2SIq %xmm15,%rax # -- -- F3 49 0f 2c c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg
|
||||
CVTTSS2SIq %xmm8,%r8 # -- -- F3 4D 0f 2c c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTTSS2SIq %xmm8,%rax # -- -- F3 49 0f 2c c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTTSS2SIq %xmm7,%r8 # -- -- F3 4C 0f 2c c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSS2SIq %xmm7,%rax # -- -- F3 48 0f 2c c7 ; OVR 128-bit media instruction override Result is sign extended
|
||||
CVTTSS2SIq %xmm0,%r8 # -- -- F3 4C 0f 2c c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
|
||||
# CVTSI2SS
|
||||
CVTSI2SS (%r8),%xmm0 # -- -- F3 41 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm0 # -- -- F3 -- 0f 2a 00 ; OVR 128-bit media instruction override
|
||||
CVTSI2SS (%r8),%xmm15 # -- -- F3 45 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm15 # -- -- F3 44 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg
|
||||
CVTSI2SS (%r8),%xmm8 # -- -- F3 45 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm8 # -- -- F3 44 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg
|
||||
CVTSI2SS (%r8),%xmm7 # -- -- F3 41 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm7 # -- -- F3 -- 0f 2a 38 ; OVR 128-bit media instruction override
|
||||
CVTSI2SS %eax,%xmm0 # -- -- F3 -- 0f 2a c0 ; OVR 128-bit media instruction override
|
||||
CVTSI2SS %eax,%xmm15 # -- -- F3 44 0f 2a f8 ; OVR 128-bit media instruction override REX to access upper XMM reg
|
||||
CVTSI2SS %eax,%xmm8 # -- -- F3 44 0f 2a c0 ; OVR 128-bit media instruction override REX to access upper XMM reg
|
||||
CVTSI2SS %eax,%xmm7 # -- -- F3 -- 0f 2a f8 ; OVR 128-bit media instruction override
|
||||
CVTSI2SS (%r8),%xmm0 # -- -- F3 41 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm0 # -- -- F3 -- 0f 2a 00 ; OVR 128-bit media instruction override
|
||||
CVTSI2SS (%r8),%xmm15 # -- -- F3 45 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm15 # -- -- F3 44 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg
|
||||
CVTSI2SS (%r8),%xmm8 # -- -- F3 45 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm8 # -- -- F3 44 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg
|
||||
CVTSI2SS (%r8),%xmm7 # -- -- F3 41 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm7 # -- -- F3 -- 0f 2a 38 ; OVR 128-bit media instruction override
|
||||
|
||||
|
||||
# CVTSD2SI
|
||||
CVTSD2SIq (%r8),%rax # -- -- F2 49 0f 2d 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSD2SIq (%rax),%rax # -- -- F2 48 0f 2d 00 ; OVR 128-bit media instruction override REX for 64-bit operand size
|
||||
CVTSD2SIq (%r8),%r8 # -- -- F2 4D 0f 2d 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSD2SIq (%rax),%r8 # -- -- F2 4C 0f 2d 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSD2SIq %xmm0,%rax # -- -- F2 48 0f 2d c0 ; OVR 128-bit media instruction override REX for 64-bit operand size
|
||||
CVTSD2SIq %xmm15,%r8 # -- -- F2 4D 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSD2SIq %xmm15,%rax # -- -- F2 49 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg
|
||||
CVTSD2SIq %xmm8,%r8 # -- -- F2 4D 0f 2d c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSD2SIq %xmm8,%rax # -- -- F2 49 0f 2d c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg
|
||||
CVTSD2SIq %xmm7,%r8 # -- -- F2 4C 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSD2SIq %xmm7,%rax # -- -- F2 48 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size
|
||||
CVTSD2SIq %xmm0,%r8 # -- -- F2 4C 0f 2d c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
|
||||
# CVTTSD2SI
|
||||
CVTTSD2SIq (%r8),%rax # -- -- F2 49 0f 2c 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSD2SIq (%rax),%rax # -- -- F2 48 0f 2c 00 ; OVR 128-bit media instruction override REX for 64-bit operand size
|
||||
CVTTSD2SIq (%r8),%r8 # -- -- F2 4D 0f 2c 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSD2SIq (%rax),%r8 # -- -- F2 4C 0f 2c 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSD2SIq %xmm0,%rax # -- -- F2 48 0f 2c c0 ; OVR 128-bit media instruction override REX for 64-bit operand size
|
||||
CVTTSD2SIq %xmm15,%r8 # -- -- F2 4D 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTTSD2SIq %xmm15,%rax # -- -- F2 49 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg
|
||||
CVTTSD2SIq %xmm8,%r8 # -- -- F2 4D 0f 2c c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTTSD2SIq %xmm8,%rax # -- -- F2 49 0f 2c c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg
|
||||
CVTTSD2SIq %xmm7,%r8 # -- -- F2 4C 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSD2SIq %xmm7,%rax # -- -- F2 48 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size
|
||||
CVTTSD2SIq %xmm0,%r8 # -- -- F2 4C 0f 2c c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg.
|
||||
|
||||
# CVTSS2SI
|
||||
CVTSS2SIq (%r8),%rax # -- -- F3 49 0f 2d 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSS2SIq (%rax),%rax # -- -- F3 48 0f 2d 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTSS2SIq (%r8),%r8 # -- -- F3 4D 0f 2d 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSS2SIq (%rax),%r8 # -- -- F3 4C 0f 2d 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSS2SIq %xmm0,%rax # -- -- F3 48 0f 2d c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTSS2SIq %xmm15,%r8 # -- -- F3 4D 0f 2d c7 ; OVR 128-bit media instruction override Result is sign extended REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSS2SIq %xmm15,%rax # -- -- F3 49 0f 2d c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg
|
||||
CVTSS2SIq %xmm8,%r8 # -- -- F3 4D 0f 2d c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSS2SIq %xmm8,%rax # -- -- F3 49 0f 2d c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTSS2SIq %xmm7,%r8 # -- -- F3 4C 0f 2d c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTSS2SIq %xmm7,%rax # -- -- F3 48 0f 2d c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTSS2SIq %xmm0,%r8 # -- -- F3 4C 0f 2d c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
|
||||
# CVTTSS2SI
|
||||
CVTTSS2SIq (%r8),%rax # -- -- F3 49 0f 2c 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSS2SIq (%rax),%rax # -- -- F3 48 0f 2c 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTTSS2SIq (%r8),%r8 # -- -- F3 4D 0f 2c 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSS2SIq (%rax),%r8 # -- -- F3 4C 0f 2c 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSS2SIq %xmm0,%rax # -- -- F3 48 0f 2c c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTTSS2SIq %xmm15,%r8 # -- -- F3 4D 0f 2c c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTTSS2SIq %xmm15,%rax # -- -- F3 49 0f 2c c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg
|
||||
CVTTSS2SIq %xmm8,%r8 # -- -- F3 4D 0f 2c c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
|
||||
CVTTSS2SIq %xmm8,%rax # -- -- F3 49 0f 2c c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size
|
||||
CVTTSS2SIq %xmm7,%r8 # -- -- F3 4C 0f 2c c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
CVTTSS2SIq %xmm7,%rax # -- -- F3 48 0f 2c c7 ; OVR 128-bit media instruction override Result is sign extended
|
||||
CVTTSS2SIq %xmm0,%r8 # -- -- F3 4C 0f 2c c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg.
|
||||
|
||||
# CVTSI2SS
|
||||
CVTSI2SS (%r8),%xmm0 # -- -- F3 41 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm0 # -- -- F3 -- 0f 2a 00 ; OVR 128-bit media instruction override
|
||||
CVTSI2SS (%r8),%xmm15 # -- -- F3 45 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm15 # -- -- F3 44 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg
|
||||
CVTSI2SS (%r8),%xmm8 # -- -- F3 45 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm8 # -- -- F3 44 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg
|
||||
CVTSI2SS (%r8),%xmm7 # -- -- F3 41 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm7 # -- -- F3 -- 0f 2a 38 ; OVR 128-bit media instruction override
|
||||
CVTSI2SS %eax,%xmm0 # -- -- F3 -- 0f 2a c0 ; OVR 128-bit media instruction override
|
||||
CVTSI2SS %eax,%xmm15 # -- -- F3 44 0f 2a f8 ; OVR 128-bit media instruction override REX to access upper XMM reg
|
||||
CVTSI2SS %eax,%xmm8 # -- -- F3 44 0f 2a c0 ; OVR 128-bit media instruction override REX to access upper XMM reg
|
||||
CVTSI2SS %eax,%xmm7 # -- -- F3 -- 0f 2a f8 ; OVR 128-bit media instruction override
|
||||
CVTSI2SS (%r8),%xmm0 # -- -- F3 41 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm0 # -- -- F3 -- 0f 2a 00 ; OVR 128-bit media instruction override
|
||||
CVTSI2SS (%r8),%xmm15 # -- -- F3 45 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm15 # -- -- F3 44 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg
|
||||
CVTSI2SS (%r8),%xmm8 # -- -- F3 45 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm8 # -- -- F3 44 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg
|
||||
CVTSI2SS (%r8),%xmm7 # -- -- F3 41 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper reg.
|
||||
CVTSI2SS (%rax),%xmm7 # -- -- F3 -- 0f 2a 38 ; OVR 128-bit media instruction override
|
||||
|
||||
# CVTSI2SD
|
||||
CVTSI2SD (%r8),%xmm0 # -- -- F2 41 0F 2A 00 ; REX to access upper reg. OVR 128bit MMinstr.
|
||||
CVTSI2SD (%rax),%xmm0 # -- -- F2 -- 0F 2A 00 ; OVR 128bit MMinstr.
|
||||
|
|
@ -363,8 +371,8 @@
|
|||
# SIDT
|
||||
|
||||
# SLDT
|
||||
# SLDT (%eax) # -- 67 -- -- 0F 00 00 ; A32 override: (Addr64) = ZEXT(Addr32 )
|
||||
SLDT %eax # -- -- -- -- 0F 00 C0
|
||||
# SLDT (%eax) # -- 67 -- -- 0F 00 00 ; A32 override: (Addr64) = ZEXT(Addr32 )
|
||||
SLDT %eax # -- -- -- -- 0F 00 C0
|
||||
|
||||
# SWAPGS
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue