20050901 Paul Gilliam <pgilliam@us.ibm.com>

* ppc-tdep.h (struct gdbarch_tdep): Better explanation of using
        -1 for nonexistant registers.
        * rs6000-tdep.c (rs6000_register_reggroup_p): Don't assume that
        tdep->ppc_vr0_regnum and tdep->ppc_ev0_regnum are not -1.
This commit is contained in:
Paul Gilliam 2005-09-01 18:09:41 +00:00
parent e9df6573ba
commit 826d537610
3 changed files with 28 additions and 12 deletions

View file

@ -1,3 +1,10 @@
20050901 Paul Gilliam <pgilliam@us.ibm.com>
* ppc-tdep.h (struct gdbarch_tdep): Better explanation of using
-1 for nonexistant registers.
* rs6000-tdep.c (rs6000_register_reggroup_p): Don't assume that
tdep->ppc_vr0_regnum and tdep->ppc_ev0_regnum are not -1.
2005-09-01 Richard Earnshaw <richard.earnshaw@arm.com>
* arm-linux-tdep.c (arm_linux_push_arguments): Delete.

View file

@ -152,26 +152,33 @@ struct gdbarch_tdep
int ppc_ctr_regnum; /* Count register */
int ppc_xer_regnum; /* Integer exception register */
/* On PPC and RS6000 variants that have no floating-point
registers, the next two members will be -1. */
/* Not all PPC and RS6000 variants will have the registers
represented below. A -1 is used to indicate that the register
is not present in this variant. */
/* Floating-point registers. */
int ppc_fp0_regnum; /* floating-point register 0 */
int ppc_fpscr_regnum; /* Floating point status and condition
register */
int ppc_fpscr_regnum; /* fp status and condition register */
int ppc_sr0_regnum; /* segment register 0, or -1 on
variants that have no segment
registers. */
/* Segment registers. */
int ppc_sr0_regnum; /* segment register 0 */
int ppc_mq_regnum; /* Multiply/Divide extension register */
/* Multiplier-Quotient Register (older POWER architectures only). */
int ppc_mq_regnum;
/* Altivec registers. */
int ppc_vr0_regnum; /* First AltiVec register */
int ppc_vrsave_regnum; /* Last AltiVec register */
/* SPE registers. */
int ppc_ev0_upper_regnum; /* First GPR upper half register */
int ppc_ev0_regnum; /* First ev register */
int ppc_ev31_regnum; /* Last ev register */
int ppc_acc_regnum; /* SPE 'acc' register */
int ppc_spefscr_regnum; /* SPE 'spefscr' register */
int lr_frame_offset; /* Offset to ABI specific location where
link register is saved. */
/* Offset to ABI specific location where link register is saved. */
int lr_frame_offset;
/* An array of integers, such that sim_regno[I] is the simulator
register number for GDB register number I, or -1 if the

View file

@ -1882,9 +1882,11 @@ rs6000_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
if (group == float_reggroup)
return float_p;
vector_p = ((regnum >= tdep->ppc_vr0_regnum
vector_p = ((tdep->ppc_vr0_regnum >= 0
&& regnum >= tdep->ppc_vr0_regnum
&& regnum < tdep->ppc_vr0_regnum + 32)
|| (regnum >= tdep->ppc_ev0_regnum
|| (tdep->ppc_ev0_regnum >= 0
&& regnum >= tdep->ppc_ev0_regnum
&& regnum < tdep->ppc_ev0_regnum + 32)
|| regnum == tdep->ppc_vrsave_regnum
|| regnum == tdep->ppc_acc_regnum