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Add support for Thumb-2 long branch veneers

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2016-06-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>
	    Tony Wang  <tony.wang@arm.com>

bfd/
	* elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub
	sequence.
	(stub_long_branch_thumb2_only): Define stub.
	(arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only.
	(arm_stub_long_branch_thumb2_only): Likewise.
	(arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2
	capable targets.

ld/
	* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile):
	Assemble for ARMv6-M.
	(Thumb2-Thumb2 farcall M profile): New testcase.
	* testsuite/ld-arm/farcall-thumb2-thumb2-m.d: New file.
	* testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to
	reflect the use of Thumb-2 veneers for Thumb-2 capable targets.
	* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Likewise.
This commit is contained in:
Thomas Preud'homme 2016-06-17 18:26:08 +01:00
parent 21a770913c
commit 80c135e554
7 changed files with 58 additions and 15 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
bfd/ChangeLog
View file

@ -1,3 +1,14 @@
2016-06-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
Tony Wang <tony.wang@arm.com>
* elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub
sequence.
(stub_long_branch_thumb2_only): Define stub.
(arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only.
(arm_stub_long_branch_thumb2_only): Likewise.
(arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2
capable targets.
2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
* archures.c (bfd_mach_sparc_v8plusc): Define.

15
bfd/elf32-arm.c
View file

@ -2402,6 +2402,13 @@ static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
};
/* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
{
THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
};
/* V4T Thumb -> Thumb long branch stub. Using the stack is not
allowed. */
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
@ -2625,7 +2632,8 @@ static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
DEF_STUB(a8_veneer_b_cond) \
DEF_STUB(a8_veneer_b) \
DEF_STUB(a8_veneer_bl) \
DEF_STUB(a8_veneer_blx)
DEF_STUB(a8_veneer_blx) \
DEF_STUB(long_branch_thumb2_only) \
#define DEF_STUB(x) arm_stub_##x,
enum elf32_arm_stub_type
@ -3781,6 +3789,7 @@ arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
switch (stub_type)
{
case arm_stub_long_branch_thumb_only:
case arm_stub_long_branch_thumb2_only:
case arm_stub_long_branch_v4t_thumb_arm:
case arm_stub_short_branch_v4t_thumb_arm:
case arm_stub_long_branch_v4t_thumb_arm_pic:
@ -3945,7 +3954,8 @@ arm_type_of_stub (struct bfd_link_info *info,
/* PIC stub. */
? arm_stub_long_branch_thumb_only_pic
/* non-PIC stub. */
: arm_stub_long_branch_thumb_only;
: (thumb2 ? arm_stub_long_branch_thumb2_only
: arm_stub_long_branch_thumb_only);
}
}
else
@ -4418,6 +4428,7 @@ arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
case arm_stub_long_branch_any_any:
case arm_stub_long_branch_v4t_arm_thumb:
case arm_stub_long_branch_thumb_only:
case arm_stub_long_branch_thumb2_only:
case arm_stub_long_branch_v4t_thumb_thumb:
case arm_stub_long_branch_v4t_thumb_arm:
case arm_stub_short_branch_v4t_thumb_arm:

11
ld/ChangeLog
View file

@ -1,3 +1,14 @@
2016-06-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
Tony Wang <tony.wang@arm.com>
* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile):
Assemble for ARMv6-M.
(Thumb2-Thumb2 farcall M profile): New testcase.
* testsuite/ld-arm/farcall-thumb2-thumb2-m.d: New file.
* testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to
reflect the use of Thumb-2 veneers for Thumb-2 capable targets.
* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Likewise.
2016-06-16 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-i386/i386.exp: Run pr19636-2e-nacl.

5
ld/testsuite/ld-arm/arm-elf.exp
View file

@ -474,9 +474,12 @@ set armeabitests_nonacl {
{"Thumb-Thumb farcall with BLX" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv5t" {farcall-thumb-thumb.s}
{{objdump -d farcall-thumb-thumb-blx.d}}
"farcall-thumb-thumb-blx"}
{"Thumb-Thumb farcall M profile" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv7-m" {farcall-thumb-thumb.s}
{"Thumb-Thumb farcall M profile" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv6-m" {farcall-thumb-thumb.s}
{{objdump -d farcall-thumb-thumb-m.d}}
"farcall-thumb-thumb-m"}
{"Thumb2-Thumb2 farcall M profile" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv7-m" {farcall-thumb-thumb.s}
{{objdump -d farcall-thumb2-thumb2-m.d}}
"farcall-thumb2-thumb2-m"}
{"Thumb-Thumb farcall v8-M Baseline" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv8-m.base" {farcall-thumb-thumb.s}
{{objdump -d farcall-thumb-thumb-m.d}}
"farcall-thumb-thumb-v8-m-base"}

17
ld/testsuite/ld-arm/farcall-thumb2-thumb2-m.d Normal file
View file

@ -0,0 +1,17 @@
.*: file format .*
Disassembly of section .text:
00001000 <_start>:
1000: f000 f802 bl 1008 <__bar_veneer>
1004: 0000 movs r0, r0
\.\.\.
00001008 <__bar_veneer>:
1008: f85f f000 ldr.w pc, \[pc\] ; 100c <__bar_veneer\+0x4>
100c: 02001015 .word 0x02001015
Disassembly of section .foo:
02001014 <bar>:
2001014: 4770 bx lr

7
ld/testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d
View file

@ -15,10 +15,5 @@ Disassembly of section .text:
...
001080.. <[^>]*>:
1080..: b401 push {r0}
1080..: 4802 ldr r0, \[pc, #8\] ; \(108014 <__dest_veneer\+0xc>\)
1080..: 4684 mov ip, r0
1080..: bc01 pop {r0}
1080..: 4760 bx ip
1080..: bf00 nop
1080..: f85f f000 ldr.w pc, \[pc\] ; 10800c <__dest_veneer\+0x4>
1080..: 00008003 .word 0x00008003

7
ld/testsuite/ld-arm/jump-reloc-veneers-cond-long.d
View file

@ -15,10 +15,5 @@ Disassembly of section .text:
...
000080.. <[^>]*>:
80..: b401 push {r0}
80..: 4802 ldr r0, \[pc, #8\] ; \(80.. <__dest_veneer\+0xc>\)
80..: 4684 mov ip, r0
80..: bc01 pop {r0}
80..: 4760 bx ip
80..: bf00 nop
80..: f85f f000 ldr.w pc, \[pc\] ; 800c <__dest_veneer\+0x4>
80..: 00108005 .word 0x00108005