* i386-nat.c: Reformat to be closer to coding standards.
(i386_handle_nonaligned_watchpoint): Rename local variable `rv' to `retval'. Make variables `align' and `size' local to while-loop. (i386_stopped_data_address): Rename local variable `ret' to `addr'. (_initialize_i386_nat): New prototype.
This commit is contained in:
parent
9671aeef93
commit
7fa2737c9e
2 changed files with 128 additions and 97 deletions
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@ -1,5 +1,11 @@
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2004-02-28 Mark Kettenis <kettenis@gnu.org>
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* i386-nat.c: Reformat to be closer to coding standards.
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(i386_handle_nonaligned_watchpoint): Rename local variable `rv' to
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`retval'. Make variables `align' and `size' local to while-loop.
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(i386_stopped_data_address): Rename local variable `ret' to `addr'.
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(_initialize_i386_nat): New prototype.
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* tui/tui.c: Include <readline/readline.h> instead of
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"readline/readline.h". Include it after <term.h> and
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"gdb_curses.h".
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219
gdb/i386-nat.c
219
gdb/i386-nat.c
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@ -1,5 +1,6 @@
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/* Intel x86 (a.k.a. ia32) native-dependent code.
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Copyright (C) 2001 Free Software Foundation, Inc.
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/* Native-dependent code for the i386.
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Copyright 2001, 2004 Free Software Foundation, Inc.
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This file is part of GDB.
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@ -23,24 +24,24 @@
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#include "command.h"
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#include "gdbcmd.h"
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/* Support for hardware watchpoints and breakpoints using the x86
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/* Support for hardware watchpoints and breakpoints using the i386
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debug registers.
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This provides several functions for inserting and removing
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hardware-assisted breakpoints and watchpoints, testing if
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one or more of the watchpoints triggered and at what address,
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checking whether a given region can be watched, etc.
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hardware-assisted breakpoints and watchpoints, testing if one or
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more of the watchpoints triggered and at what address, checking
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whether a given region can be watched, etc.
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A target which wants to use these functions should define
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several macros, such as `target_insert_watchpoint' and
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`target_stopped_data_address', listed in target.h, to call
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the appropriate functions below. It should also define
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A target which wants to use these functions should define several
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macros, such as `target_insert_watchpoint' and
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`target_stopped_data_address', listed in target.h, to call the
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appropriate functions below. It should also define
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I386_USE_GENERIC_WATCHPOINTS in its tm.h file.
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In addition, each target should provide several low-level
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macros that will be called to insert watchpoints and hardware
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breakpoints into the inferior, remove them, and check their
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status. These macros are:
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In addition, each target should provide several low-level macros
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that will be called to insert watchpoints and hardware breakpoints
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into the inferior, remove them, and check their status. These
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macros are:
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I386_DR_LOW_SET_CONTROL -- set the debug control (DR7)
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register to a given value
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@ -54,21 +55,20 @@
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I386_DR_LOW_GET_STATUS -- return the value of the debug
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status (DR6) register.
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The functions below implement debug registers sharing by
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reference counts, and allow to watch regions up to 16 bytes
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long. */
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The functions below implement debug registers sharing by reference
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counts, and allow to watch regions up to 16 bytes long. */
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#ifdef I386_USE_GENERIC_WATCHPOINTS
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/* Support for 8-byte wide hw watchpoints. */
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#ifndef TARGET_HAS_DR_LEN_8
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#define TARGET_HAS_DR_LEN_8 0
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#define TARGET_HAS_DR_LEN_8 0
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#endif
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/* Debug registers' indices. */
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#define DR_NADDR 4 /* the number of debug address registers */
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#define DR_STATUS 6 /* index of debug status register (DR6) */
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#define DR_CONTROL 7 /* index of debug control register (DR7) */
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#define DR_NADDR 4 /* The number of debug address registers. */
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#define DR_STATUS 6 /* Index of debug status register (DR6). */
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#define DR_CONTROL 7 /* Index of debug control register (DR7). */
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/* DR7 Debug Control register fields. */
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#define DR_CONTROL_SIZE 4
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/* Watchpoint/breakpoint read/write fields in DR7. */
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#define DR_RW_EXECUTE (0x0) /* break on instruction execution */
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#define DR_RW_WRITE (0x1) /* break on data writes */
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#define DR_RW_READ (0x3) /* break on data reads or writes */
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#define DR_RW_EXECUTE (0x0) /* Break on instruction execution. */
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#define DR_RW_WRITE (0x1) /* Break on data writes. */
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#define DR_RW_READ (0x3) /* Break on data reads or writes. */
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/* This is here for completeness. No platform supports this
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functionality yet (as of Mar-2001). Note that the DE flag in the
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functionality yet (as of March 2001). Note that the DE flag in the
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CR4 register needs to be set to support this. */
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#ifndef DR_RW_IORW
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#define DR_RW_IORW (0x2) /* break on I/O reads or writes */
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#define DR_RW_IORW (0x2) /* Break on I/O reads or writes. */
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#endif
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/* Watchpoint/breakpoint length fields in DR7. The 2-bit left shift
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is so we could OR this with the read/write field defined above. */
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#define DR_LEN_1 (0x0 << 2) /* 1-byte region watch or breakpt */
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#define DR_LEN_2 (0x1 << 2) /* 2-byte region watch */
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#define DR_LEN_4 (0x3 << 2) /* 4-byte region watch */
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#define DR_LEN_8 (0x2 << 2) /* 8-byte region watch (x86-64) */
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#define DR_LEN_1 (0x0 << 2) /* 1-byte region watch or breakpoint. */
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#define DR_LEN_2 (0x1 << 2) /* 2-byte region watch. */
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#define DR_LEN_4 (0x3 << 2) /* 4-byte region watch. */
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#define DR_LEN_8 (0x2 << 2) /* 8-byte region watch (AMD64). */
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/* Local and Global Enable flags in DR7.
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When the Local Enable flag is set, the breakpoint/watchpoint is
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enabled only for the current task; the processor automatically
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clears this flag on every task switch. When the Global Enable
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flag is set, the breakpoint/watchpoint is enabled for all tasks;
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the processor never clears this flag.
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clears this flag on every task switch. When the Global Enable flag
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is set, the breakpoint/watchpoint is enabled for all tasks; the
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processor never clears this flag.
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Currently, all watchpoint are locally enabled. If you need to
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enable them globally, read the comment which pertains to this in
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i386_insert_aligned_watchpoint below. */
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#define DR_LOCAL_ENABLE_SHIFT 0 /* extra shift to the local enable bit */
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#define DR_GLOBAL_ENABLE_SHIFT 1 /* extra shift to the global enable bit */
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#define DR_ENABLE_SIZE 2 /* 2 enable bits per debug register */
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#define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit. */
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#define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit. */
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#define DR_ENABLE_SIZE 2 /* Two enable bits per debug register. */
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/* Local and global exact breakpoint enable flags (a.k.a. slowdown
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flags). These are only required on i386, to allow detection of the
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exact instruction which caused a watchpoint to break; i486 and
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later processors do that automatically. We set these flags for
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back compatibility. */
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backwards compatibility. */
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#define DR_LOCAL_SLOWDOWN (0x100)
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#define DR_GLOBAL_SLOWDOWN (0x200)
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#define DR_GLOBAL_SLOWDOWN (0x200)
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/* Fields reserved by Intel. This includes the GD (General Detect
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Enable) flag, which causes a debug exception to be generated when a
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/* Auxiliary helper macros. */
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/* A value that masks all fields in DR7 that are reserved by Intel. */
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#define I386_DR_CONTROL_MASK (~DR_CONTROL_RESERVED)
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#define I386_DR_CONTROL_MASK (~DR_CONTROL_RESERVED)
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/* The I'th debug register is vacant if its Local and Global Enable
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bits are reset in the Debug Control register. */
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/* Mirror the inferior's DRi registers. We keep the status and
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control registers separated because they don't hold addresses. */
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static CORE_ADDR dr_mirror[DR_NADDR];
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static unsigned dr_status_mirror, dr_control_mirror;
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static unsigned dr_status_mirror, dr_control_mirror;
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/* Reference counts for each debug register. */
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static int dr_ref_count[DR_NADDR];
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static int dr_ref_count[DR_NADDR];
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/* Whether or not to print the mirrored debug registers. */
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static int maint_show_dr;
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static int maint_show_dr;
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/* Types of operations supported by i386_handle_nonaligned_watchpoint. */
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typedef enum { WP_INSERT, WP_REMOVE, WP_COUNT } i386_wp_op_t;
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/* Internal functions. */
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/* Return the value of a 4-bit field for DR7 suitable for watching a
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region of LEN bytes for accesses of type TYPE. LEN is assumed
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to have the value of 1, 2, or 4. */
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region of LEN bytes for accesses of type TYPE. LEN is assumed to
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have the value of 1, 2, or 4. */
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static unsigned i386_length_and_rw_bits (int len, enum target_hw_bp_type type);
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/* Insert a watchpoint at address ADDR, which is assumed to be aligned
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@ -206,16 +206,17 @@ static int i386_remove_aligned_watchpoint (CORE_ADDR addr,
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number of debug registers required to watch a region at address
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ADDR whose length is LEN for accesses of type TYPE. Return 0 on
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successful insertion or removal, a positive number when queried
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about the number of registers, or -1 on failure. If WHAT is not
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a valid value, bombs through internal_error. */
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about the number of registers, or -1 on failure. If WHAT is not a
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valid value, bombs through internal_error. */
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static int i386_handle_nonaligned_watchpoint (i386_wp_op_t what,
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CORE_ADDR addr, int len,
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enum target_hw_bp_type type);
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/* Implementation. */
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/* Clear the reference counts and forget everything we knew about
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the debug registers. */
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/* Clear the reference counts and forget everything we knew about the
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debug registers. */
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void
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i386_cleanup_dregs (void)
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{
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@ -231,18 +232,22 @@ i386_cleanup_dregs (void)
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}
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#ifndef LINUX_CHILD_POST_STARTUP_INFERIOR
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/* Reset all debug registers at each new startup
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to avoid missing watchpoints after restart. */
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/* Reset all debug registers at each new startup to avoid missing
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watchpoints after restart. */
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void
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child_post_startup_inferior (ptid_t ptid)
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{
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i386_cleanup_dregs ();
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}
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#endif /* LINUX_CHILD_POST_STARTUP_INFERIOR */
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/* Print the values of the mirrored debug registers.
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This is called when maint_show_dr is non-zero. To set that
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up, type "maint show-debug-regs" at GDB's prompt. */
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/* Print the values of the mirrored debug registers. This is called
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when maint_show_dr is non-zero. To set that up, type "maint
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show-debug-regs" at GDB's prompt. */
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static void
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i386_show_dr (const char *func, CORE_ADDR addr,
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int len, enum target_hw_bp_type type)
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@ -268,7 +273,8 @@ i386_show_dr (const char *func, CORE_ADDR addr,
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dr_control_mirror, dr_status_mirror);
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ALL_DEBUG_REGISTERS(i)
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{
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printf_unfiltered ("\tDR%d: addr=0x%s, ref.count=%d DR%d: addr=0x%s, ref.count=%d\n",
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printf_unfiltered ("\
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\tDR%d: addr=0x%s, ref.count=%d DR%d: addr=0x%s, ref.count=%d\n",
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i, paddr(dr_mirror[i]), dr_ref_count[i],
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i+1, paddr(dr_mirror[i+1]), dr_ref_count[i+1]);
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i++;
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@ -276,8 +282,9 @@ i386_show_dr (const char *func, CORE_ADDR addr,
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}
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/* Return the value of a 4-bit field for DR7 suitable for watching a
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region of LEN bytes for accesses of type TYPE. LEN is assumed
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to have the value of 1, 2, or 4. */
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region of LEN bytes for accesses of type TYPE. LEN is assumed to
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have the value of 1, 2, or 4. */
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static unsigned
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i386_length_and_rw_bits (int len, enum target_hw_bp_type type)
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{
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@ -291,18 +298,21 @@ i386_length_and_rw_bits (int len, enum target_hw_bp_type type)
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case hw_write:
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rw = DR_RW_WRITE;
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break;
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case hw_read: /* x86 doesn't support data-read watchpoints */
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case hw_read:
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/* The i386 doesn't support data-read watchpoints. */
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case hw_access:
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rw = DR_RW_READ;
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break;
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#if 0
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case hw_io_access: /* not yet supported */
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/* Not yet supported. */
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case hw_io_access:
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rw = DR_RW_IORW;
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break;
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#endif
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default:
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internal_error (__FILE__, __LINE__, "\
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Invalid hw breakpoint type %d in i386_length_and_rw_bits.\n", (int)type);
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Invalid hardware breakpoint type %d in i386_length_and_rw_bits.\n",
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(int) type);
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}
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switch (len)
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|
@ -318,7 +328,7 @@ Invalid hw breakpoint type %d in i386_length_and_rw_bits.\n", (int)type);
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return (DR_LEN_8 | rw);
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default:
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internal_error (__FILE__, __LINE__, "\
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Invalid hw breakpoint length %d in i386_length_and_rw_bits.\n", len);
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Invalid hardware breakpoint length %d in i386_length_and_rw_bits.\n", len);
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}
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}
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|
@ -327,6 +337,7 @@ Invalid hw breakpoint length %d in i386_length_and_rw_bits.\n", len);
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value of the bits from DR7 which describes the length and access
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type of the region to be watched by this watchpoint. Return 0 on
|
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success, -1 on failure. */
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static int
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i386_insert_aligned_watchpoint (CORE_ADDR addr, unsigned len_rw_bits)
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{
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|
@ -364,7 +375,7 @@ i386_insert_aligned_watchpoint (CORE_ADDR addr, unsigned len_rw_bits)
|
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dr_ref_count[i] = 1;
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I386_DR_SET_RW_LEN (i, len_rw_bits);
|
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/* Note: we only enable the watchpoint locally, i.e. in the current
|
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task. Currently, no x86 target allows or supports global
|
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task. Currently, no i386 target allows or supports global
|
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watchpoints; however, if any target would want that in the
|
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future, GDB should probably provide a command to control whether
|
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to enable watchpoints globally or locally, and the code below
|
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|
@ -386,6 +397,7 @@ i386_insert_aligned_watchpoint (CORE_ADDR addr, unsigned len_rw_bits)
|
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value of the bits from DR7 which describes the length and access
|
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type of the region watched by this watchpoint. Return 0 on
|
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success, -1 on failure. */
|
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|
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static int
|
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i386_remove_aligned_watchpoint (CORE_ADDR addr, unsigned len_rw_bits)
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{
|
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|
@ -417,42 +429,46 @@ i386_remove_aligned_watchpoint (CORE_ADDR addr, unsigned len_rw_bits)
|
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number of debug registers required to watch a region at address
|
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ADDR whose length is LEN for accesses of type TYPE. Return 0 on
|
||||
successful insertion or removal, a positive number when queried
|
||||
about the number of registers, or -1 on failure. If WHAT is not
|
||||
a valid value, bombs through internal_error. */
|
||||
about the number of registers, or -1 on failure. If WHAT is not a
|
||||
valid value, bombs through internal_error. */
|
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|
||||
static int
|
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i386_handle_nonaligned_watchpoint (i386_wp_op_t what, CORE_ADDR addr, int len,
|
||||
enum target_hw_bp_type type)
|
||||
{
|
||||
int align;
|
||||
int size;
|
||||
int rv = 0, status = 0;
|
||||
int retval = 0, status = 0;
|
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int max_wp_len = TARGET_HAS_DR_LEN_8 ? 8 : 4;
|
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|
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static int size_try_array[8][8] =
|
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{
|
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{1, 1, 1, 1, 1, 1, 1, 1}, /* trying size one */
|
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{2, 1, 2, 1, 2, 1, 2, 1}, /* trying size two */
|
||||
{2, 1, 2, 1, 2, 1, 2, 1}, /* trying size three */
|
||||
{4, 1, 2, 1, 4, 1, 2, 1}, /* trying size four */
|
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{4, 1, 2, 1, 4, 1, 2, 1}, /* trying size five */
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{4, 1, 2, 1, 4, 1, 2, 1}, /* trying size six */
|
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{4, 1, 2, 1, 4, 1, 2, 1}, /* trying size seven */
|
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{8, 1, 2, 1, 4, 1, 2, 1}, /* trying size eight */
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{1, 1, 1, 1, 1, 1, 1, 1}, /* Trying size one. */
|
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{2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size two. */
|
||||
{2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size three. */
|
||||
{4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size four. */
|
||||
{4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size five. */
|
||||
{4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size six. */
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||||
{4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size seven. */
|
||||
{8, 1, 2, 1, 4, 1, 2, 1}, /* Trying size eight. */
|
||||
};
|
||||
|
||||
while (len > 0)
|
||||
{
|
||||
align = addr % max_wp_len;
|
||||
/* Four(eigth on x86_64) is the maximum length an x86 debug register
|
||||
int align = addr % max_wp_len;
|
||||
/* Four (eigth on AMD64) is the maximum length a debug register
|
||||
can watch. */
|
||||
size = size_try_array[len > max_wp_len ? (max_wp_len - 1) : len - 1][align];
|
||||
int try = (len > max_wp_len ? (max_wp_len - 1) : len - 1);
|
||||
int size = size_try_array[try][align];
|
||||
|
||||
if (what == WP_COUNT)
|
||||
/* size_try_array[] is defined so that each iteration through
|
||||
the loop is guaranteed to produce an address and a size
|
||||
that can be watched with a single debug register. Thus,
|
||||
for counting the registers required to watch a region, we
|
||||
simply need to increment the count on each iteration. */
|
||||
rv++;
|
||||
{
|
||||
/* size_try_array[] is defined such that each iteration
|
||||
through the loop is guaranteed to produce an address and a
|
||||
size that can be watched with a single debug register.
|
||||
Thus, for counting the registers required to watch a
|
||||
region, we simply need to increment the count on each
|
||||
iteration. */
|
||||
retval++;
|
||||
}
|
||||
else
|
||||
{
|
||||
unsigned len_rw = i386_length_and_rw_bits (size, type);
|
||||
|
@ -475,17 +491,20 @@ Invalid value %d of operation in i386_handle_nonaligned_watchpoint.\n",
|
|||
to our failure to insert this watchpoint and tries to
|
||||
remove it. */
|
||||
if (status)
|
||||
rv = status;
|
||||
retval = status;
|
||||
}
|
||||
|
||||
addr += size;
|
||||
len -= size;
|
||||
}
|
||||
return rv;
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
/* Insert a watchpoint to watch a memory region which starts at
|
||||
address ADDR and whose length is LEN bytes. Watch memory accesses
|
||||
of the type TYPE. Return 0 on success, -1 on failure. */
|
||||
|
||||
int
|
||||
i386_insert_watchpoint (CORE_ADDR addr, int len, int type)
|
||||
{
|
||||
|
@ -533,25 +552,26 @@ i386_remove_watchpoint (CORE_ADDR addr, int len, int type)
|
|||
|
||||
/* Return non-zero if we can watch a memory region that starts at
|
||||
address ADDR and whose length is LEN bytes. */
|
||||
|
||||
int
|
||||
i386_region_ok_for_watchpoint (CORE_ADDR addr, int len)
|
||||
{
|
||||
int nregs;
|
||||
|
||||
/* Compute how many aligned watchpoints we would need to cover this
|
||||
region. */
|
||||
int nregs = i386_handle_nonaligned_watchpoint (WP_COUNT, addr, len,
|
||||
hw_write);
|
||||
|
||||
nregs = i386_handle_nonaligned_watchpoint (WP_COUNT, addr, len, hw_write);
|
||||
return nregs <= DR_NADDR ? 1 : 0;
|
||||
}
|
||||
|
||||
/* If the inferior has some watchpoint that triggered, return the
|
||||
address associated with that watchpoint. Otherwise, return
|
||||
zero. */
|
||||
address associated with that watchpoint. Otherwise, return zero. */
|
||||
|
||||
CORE_ADDR
|
||||
i386_stopped_data_address (void)
|
||||
{
|
||||
CORE_ADDR addr = 0;
|
||||
int i;
|
||||
CORE_ADDR ret = 0;
|
||||
|
||||
dr_status_mirror = I386_DR_LOW_GET_STATUS ();
|
||||
|
||||
|
@ -562,22 +582,23 @@ i386_stopped_data_address (void)
|
|||
watchpoint, not a hardware breakpoint. The reason is
|
||||
that GDB doesn't call the target_stopped_data_address
|
||||
method except for data watchpoints. In other words, I'm
|
||||
being paranoiac. */
|
||||
being paranoid. */
|
||||
&& I386_DR_GET_RW_LEN (i) != 0)
|
||||
{
|
||||
ret = dr_mirror[i];
|
||||
addr = dr_mirror[i];
|
||||
if (maint_show_dr)
|
||||
i386_show_dr ("watchpoint_hit", ret, -1, hw_write);
|
||||
i386_show_dr ("watchpoint_hit", addr, -1, hw_write);
|
||||
}
|
||||
}
|
||||
if (maint_show_dr && ret == 0)
|
||||
if (maint_show_dr && addr == 0)
|
||||
i386_show_dr ("stopped_data_addr", 0, 0, hw_write);
|
||||
|
||||
return ret;
|
||||
return addr;
|
||||
}
|
||||
|
||||
/* Return non-zero if the inferior has some break/watchpoint that
|
||||
triggered. */
|
||||
|
||||
int
|
||||
i386_stopped_by_hwbp (void)
|
||||
{
|
||||
|
@ -612,6 +633,7 @@ i386_insert_hw_breakpoint (CORE_ADDR addr, void *shadow)
|
|||
|
||||
/* Remove a hardware-assisted breakpoint at address ADDR. SHADOW is
|
||||
unused. Return 0 on success, -1 on failure. */
|
||||
|
||||
int
|
||||
i386_remove_hw_breakpoint (CORE_ADDR addr, void *shadow)
|
||||
{
|
||||
|
@ -625,8 +647,11 @@ i386_remove_hw_breakpoint (CORE_ADDR addr, void *shadow)
|
|||
}
|
||||
|
||||
#endif /* I386_USE_GENERIC_WATCHPOINTS */
|
||||
|
||||
|
||||
|
||||
/* Provide a prototype to silence -Wmissing-prototypes. */
|
||||
void _initialize_i386_nat (void);
|
||||
|
||||
void
|
||||
_initialize_i386_nat (void)
|
||||
{
|
||||
|
|
Loading…
Reference in a new issue