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Add DM (bit 4) to PSW. See 7-1 for more info.

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Test.
This commit is contained in:
Andrew Cagney 1997-12-04 07:01:30 +00:00
parent bbb9b83c5e
commit 7f48c9fe1d
7 changed files with 72 additions and 0 deletions
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7
sim/d10v/ChangeLog
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@ -1,3 +1,10 @@
Thu Dec 4 16:51:02 1997 Andrew Cagney <cagney@b1.cygnus.com>
* d10v_sim.h (struct _state): Add DM - PSW debug mask.
* simops.c (OP_5600): For "mvtc", save PSW.DM.
(OP_5200): Ditto for "mvfc".
Wed Dec 3 17:27:06 1997 Andrew Cagney <cagney@b1.cygnus.com> Wed Dec 3 17:27:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
* d10v_sim.h (SEXT56): Define. * d10v_sim.h (SEXT56): Define.

1
sim/d10v/d10v_sim.h
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@ -82,6 +82,7 @@ struct _state
uint8 SM; uint8 SM;
uint8 EA; uint8 EA;
uint8 DB; uint8 DB;
uint8 DM;
uint8 IE; uint8 IE;
uint8 RP; uint8 RP;
uint8 MD; uint8 MD;

2
sim/d10v/simops.c
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@ -1711,6 +1711,7 @@ OP_5200 ()
if (State.SM) PSW |= 0x8000; if (State.SM) PSW |= 0x8000;
if (State.EA) PSW |= 0x2000; if (State.EA) PSW |= 0x2000;
if (State.DB) PSW |= 0x1000; if (State.DB) PSW |= 0x1000;
if (State.DM) PSW |= 0x800;
if (State.IE) PSW |= 0x400; if (State.IE) PSW |= 0x400;
if (State.RP) PSW |= 0x200; if (State.RP) PSW |= 0x200;
if (State.MD) PSW |= 0x100; if (State.MD) PSW |= 0x100;
@ -1767,6 +1768,7 @@ OP_5600 ()
State.SM = (PSW & 0x8000) ? 1 : 0; State.SM = (PSW & 0x8000) ? 1 : 0;
State.EA = (PSW & 0x2000) ? 1 : 0; State.EA = (PSW & 0x2000) ? 1 : 0;
State.DB = (PSW & 0x1000) ? 1 : 0; State.DB = (PSW & 0x1000) ? 1 : 0;
State.DM = (PSW & 0x800) ? 1 : 0;
State.IE = (PSW & 0x400) ? 1 : 0; State.IE = (PSW & 0x400) ? 1 : 0;
State.RP = (PSW & 0x200) ? 1 : 0; State.RP = (PSW & 0x200) ? 1 : 0;
State.MD = (PSW & 0x100) ? 1 : 0; State.MD = (PSW & 0x100) ? 1 : 0;

1
sim/testsuite/d10v-elf/.Sanitize
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@ -20,6 +20,7 @@ t-sub.s
t-subi.s t-subi.s
t-sub2w.s t-sub2w.s
t-mvtac.s t-mvtac.s
t-mvtc.s
Things-to-lose: Things-to-lose:

7
sim/testsuite/d10v-elf/ChangeLog
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@ -1,3 +1,10 @@
Thu Dec 4 16:56:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
* t-macros.i: Add definitions for PSW bits.
* t-mvtc.s: New file.
* Makefile.in (TESTS): Update.
Wed Dec 3 16:35:24 1997 Andrew Cagney <cagney@b1.cygnus.com> Wed Dec 3 16:35:24 1997 Andrew Cagney <cagney@b1.cygnus.com>
* t-rac.s: New files. * t-rac.s: New files.

1
sim/testsuite/d10v-elf/Makefile.in
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@ -42,6 +42,7 @@ TESTS = \
hello.hi \ hello.hi \
t-mac.ok \ t-mac.ok \
t-mvtac.ok \ t-mvtac.ok \
t-mvtc.ok \
t-msbu.ok \ t-msbu.ok \
t-mulxu.ok \ t-mulxu.ok \
t-rac.ok \ t-rac.ok \

53
sim/testsuite/d10v-elf/t-mvtc.s Normal file
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@ -0,0 +1,53 @@
.include "t-macros.i"
start
loadpsw2 PSW_SM
checkpsw2 1 PSW_SM
loadpsw2 PSW_01
checkpsw2 2 0 ;; PSW_01
loadpsw2 PSW_EA
checkpsw2 3 PSW_EA
loadpsw2 PSW_DB
checkpsw2 4 PSW_DB
loadpsw2 PSW_DM
checkpsw2 5 PSW_DM
loadpsw2 PSW_IE
checkpsw2 6 PSW_IE
loadpsw2 PSW_RP
checkpsw2 7 PSW_RP
loadpsw2 PSW_MD
checkpsw2 8 PSW_MD
loadpsw2 PSW_FX|PSW_ST
checkpsw2 9 PSW_FX|PSW_ST
;; loadpsw2 PSW_ST
;; checkpsw2 10
loadpsw2 PSW_10
checkpsw2 11 0 ;; PSW_10
loadpsw2 PSW_11
checkpsw2 12 0 ;; PSW_11
loadpsw2 PSW_F0
checkpsw2 13 PSW_F0
loadpsw2 PSW_F1
checkpsw2 14 PSW_F1
loadpsw2 PSW_14
checkpsw2 15 0 ;; PSW_14
loadpsw2 PSW_C
checkpsw2 16 PSW_C
exit0