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Add new files for 29K and Ultracomputer support.

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This commit is contained in:
John Gilmore 1991-09-13 01:07:53 +00:00
parent 2b05a37a5f
commit 7c18a68f00
6 changed files with 4206 additions and 0 deletions
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562
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/* Definitions and macros for support of AMD's remote debugger, MiniMON.
Copyright (C) 1990, 1991 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
/*
* Some basic types. FIXME, this should be done by declaring bitfield
* sizes in the structs. We can't portably depend on a "long int" being
* 32 bits, etc.
*/
typedef long int INT32; /* 32 bit integer */
typedef unsigned long int UINT32; /* 32 bit integer (unsigned) */
typedef unsigned long int ADDR32; /* 32 bit address */
typedef unsigned long int INST32; /* 32 bit instruction */
typedef long int BOOLEAN; /* Boolean value (32 bit) */
typedef unsigned char BYTE; /* byte (8 bit) */
typedef short int INT16; /* 16 bit integer */
typedef unsigned short int UINT16; /* 16 bit integer (unsigned) */
/****************************************************************************/
/************************* Message Information ******************************/
/****************************************************************************/
/*
* Error codes
*/
/* General errors */
#define EMUSAGE 1 /* Bad args / flags */
#define EMFAIL 2 /* Unrecoverable error */
#define EMBADADDR 3 /* Illegal address */
#define EMBADREG 4 /* Illegal register */
#define EMSYNTAX 5 /* Illegal command syntax */
#define EMACCESS 6 /* Could not access memory */
#define EMALLOC 7 /* Could not allocate memory */
#define EMTARGET 8 /* Unknown target type */
#define EMHINIT 9 /* Could not initialize host */
#define EMCOMM 10 /* Could not open communication channel */
/* Message errors */
#define EMBADMSG 11 /* Unknown message type */
#define EMMSG2BIG 12 /* Message to large for buffer */
#define EMNOSEND 13 /* Could not send message */
#define EMNORECV 14 /* Could not receive message */
#define EMRESET 15 /* Could not RESET target */
#define EMCONFIG 16 /* Could not get target CONFIG */
#define EMSTATUS 17 /* Could not get target STATUS */
#define EMREAD 18 /* Could not READ target memory */
#define EMWRITE 19 /* Could not WRITE target memory */
#define EMBKPTSET 20 /* Could not set breakpoint */
#define EMBKPTRM 21 /* Could not remove breakpoint */
#define EMBKPTSTAT 22 /* Could not get breakpoint status */
#define EMBKPTNONE 23 /* All breakpoints in use */
#define EMBKPTUSED 24 /* Breakpoints already in use */
#define EMCOPY 25 /* Could not COPY target memory */
#define EMFILL 26 /* Could not FILL target memory */
#define EMINIT 27 /* Could not initialize target memory */
#define EMGO 28 /* Could not start execution */
#define EMSTEP 29 /* Could not single step */
#define EMBREAK 30 /* Could not BREAK */
#define EMHIF 31 /* Could not perform HIF service */
#define EMCHANNEL0 32 /* Could not read CHANNEL0 */
#define EMCHANNEL1 33 /* Could not write CHANNEL1 */
/* COFF file loader errors */
#define EMOPEN 34 /* Could not open COFF file */
#define EMHDR 35 /* Could not read COFF header */
#define EMMAGIC 36 /* Bad magic number */
#define EMAOUT 37 /* Could not read COFF a.out header */
#define EMSCNHDR 38 /* Could not read COFF section header */
#define EMSCN 39 /* Could not read COFF section */
#define EMCLOSE 40 /* Could not close COFF file */
/* Log file errors */
#define EMLOGOPEN 41 /* Could not open log file */
#define EMLOGREAD 42 /* Could not read log file */
#define EMLOGWRITE 43 /* Could not write to log file */
#define EMLOGCLOSE 44 /* Could not close log file */
/* Command file errors */
#define EMCMDOPEN 45 /* Could not open command file */
#define EMCMDREAD 46 /* Could not read command file */
#define EMCMDWRITE 47 /* Could not write to command file */
#define EMCMDCLOSE 48 /* Could not close comand file */
#define EMTIMEOUT 49 /* Host timed out waiting for a message */
#define EMCOMMTYPE 50 /* A '-t' flag must be specified */
#define EMCOMMERR 51 /* Communication error */
#define EMBAUD 52 /* Invalid baud rate specified */
/*
* Memory Spaces
*/
#define LOCAL_REG 0 /* Local processor register */
#define GLOBAL_REG 1 /* Global processor register */
#define SPECIAL_REG 2 /* Special processor register */
#define TLB_REG 3 /* Translation Lookaside Buffer */
#define COPROC_REG 4 /* Coprocessor register */
#define I_MEM 5 /* Instruction Memory */
#define D_MEM 6 /* Data Memory */
#define I_ROM 7 /* Instruction ROM */
#define D_ROM 8 /* Data ROM */
#define I_O 9 /* Input/Output */
#define I_CACHE 10 /* Instruction Cache */
#define D_CACHE 11 /* Data Cache */
/* To supress warnings for zero length array definitions */
#define DUMMY 1
/*
** Host to target definitions
*/
#define RESET 0
#define CONFIG_REQ 1
#define STATUS_REQ 2
#define READ_REQ 3
#define WRITE_REQ 4
#define BKPT_SET 5
#define BKPT_RM 6
#define BKPT_STAT 7
#define COPY 8
#define FILL 9
#define INIT 10
#define GO 11
#define STEP 12
#define BREAK 13
#define HIF_CALL_RTN 64
#define CHANNEL0 65
#define CHANNEL1_ACK 66
/*
** Target to host definitions
*/
#define RESET_ACK 32
#define CONFIG 33
#define STATUS 34
#define READ_ACK 35
#define WRITE_ACK 36
#define BKPT_SET_ACK 37
#define BKPT_RM_ACK 38
#define BKPT_STAT_ACK 39
#define COPY_ACK 40
#define FILL_ACK 41
#define INIT_ACK 42
#define HALT 43
#define ERROR 63
#define HIF_CALL 96
#define CHANNEL0_ACK 97
#define CHANNEL1 98
/* A "generic" message */
struct generic_msg_t {
INT32 code; /* generic */
INT32 length;
BYTE byte[DUMMY];
};
/* A "generic" message (with an INT32 array) */
struct generic_int32_msg_t {
INT32 code; /* generic */
INT32 length;
INT32 int32[DUMMY];
};
/*
** Host to target messages
*/
struct reset_msg_t {
INT32 code; /* 0 */
INT32 length;
};
struct config_req_msg_t {
INT32 code; /* 1 */
INT32 length;
};
struct status_req_msg_t {
INT32 code; /* 2 */
INT32 length;
};
struct read_req_msg_t {
INT32 code; /* 3 */
INT32 length;
INT32 memory_space;
ADDR32 address;
INT32 byte_count;
};
struct write_req_msg_t {
INT32 code; /* 4 */
INT32 length;
INT32 memory_space;
ADDR32 address;
INT32 byte_count;
BYTE data[DUMMY];
};
struct write_r_msg_t {
INT32 code; /* 4 */
INT32 length;
INT32 memory_space;
ADDR32 address;
INT32 byte_count;
INT32 data[DUMMY];
};
struct bkpt_set_msg_t {
INT32 code; /* 5 */
INT32 length;
INT32 memory_space;
ADDR32 bkpt_addr;
INT32 pass_count;
INT32 bkpt_type;
};
struct bkpt_rm_msg_t {
INT32 code; /* 6 */
INT32 length;
INT32 memory_space;
ADDR32 bkpt_addr;
};
struct bkpt_stat_msg_t {
INT32 code; /* 7 */
INT32 length;
INT32 memory_space;
ADDR32 bkpt_addr;
};
struct copy_msg_t {
INT32 code; /* 8 */
INT32 length;
INT32 source_space;
ADDR32 source_addr;
INT32 dest_space;
ADDR32 dest_addr;
INT32 byte_count;
};
struct fill_msg_t {
INT32 code; /* 9 */
INT32 length;
INT32 memory_space;
ADDR32 start_addr;
INT32 fill_count;
INT32 byte_count;
BYTE fill_data[DUMMY];
};
struct init_msg_t {
INT32 code; /* 10 */
INT32 length;
ADDR32 text_start;
ADDR32 text_end;
ADDR32 data_start;
ADDR32 data_end;
ADDR32 entry_point;
INT32 mem_stack_size;
INT32 reg_stack_size;
ADDR32 arg_start;
INT32 os_control;
};
struct go_msg_t {
INT32 code; /* 11 */
INT32 length;
};
struct step_msg_t {
INT32 code; /* 12 */
INT32 length;
INT32 count;
};
struct break_msg_t {
INT32 code; /* 13 */
INT32 length;
};
struct hif_call_rtn_msg_t {
INT32 code; /* 64 */
INT32 length;
INT32 service_number;
INT32 gr121;
INT32 gr96;
INT32 gr97;
};
struct channel0_msg_t {
INT32 code; /* 65 */
INT32 length;
BYTE data;
};
struct channel1_ack_msg_t {
INT32 code; /* 66 */
INT32 length;
};
/*
** Target to host messages
*/
struct reset_ack_msg_t {
INT32 code; /* 32 */
INT32 length;
};
struct config_msg_t {
INT32 code; /* 33 */
INT32 length;
INT32 processor_id;
INT32 version;
ADDR32 I_mem_start;
INT32 I_mem_size;
ADDR32 D_mem_start;
INT32 D_mem_size;
ADDR32 ROM_start;
INT32 ROM_size;
INT32 max_msg_size;
INT32 max_bkpts;
INT32 coprocessor;
INT32 reserved;
};
struct status_msg_t {
INT32 code; /* 34 */
INT32 length;
INT32 msgs_sent;
INT32 msgs_received;
INT32 errors;
INT32 bkpts_hit;
INT32 bkpts_free;
INT32 traps;
INT32 fills;
INT32 spills;
INT32 cycles;
INT32 reserved;
};
struct read_ack_msg_t {
INT32 code; /* 35 */
INT32 length;
INT32 memory_space;
ADDR32 address;
INT32 byte_count;
BYTE data[DUMMY];
};
struct read_r_ack_msg_t {
INT32 code; /* 35 */
INT32 length;
INT32 memory_space;
ADDR32 address;
INT32 byte_count;
INT32 data[DUMMY];
};
struct write_ack_msg_t {
INT32 code; /* 36 */
INT32 length;
INT32 memory_space;
ADDR32 address;
INT32 byte_count;
};
struct bkpt_set_ack_msg_t {
INT32 code; /* 37 */
INT32 length;
INT32 memory_space;
ADDR32 address;
INT32 pass_count;
INT32 bkpt_type;
};
struct bkpt_rm_ack_msg_t {
INT32 code; /* 38 */
INT32 length;
INT32 memory_space;
ADDR32 address;
};
struct bkpt_stat_ack_msg_t {
INT32 code; /* 39 */
INT32 length;
INT32 memory_space;
ADDR32 address;
INT32 pass_count;
INT32 bkpt_type;
};
struct copy_ack_msg_t {
INT32 code; /* 40 */
INT32 length;
INT32 source_space;
ADDR32 source_addr;
INT32 dest_space;
ADDR32 dest_addr;
INT32 byte_count;
};
struct fill_ack_msg_t {
INT32 code; /* 41 */
INT32 length;
INT32 memory_space;
ADDR32 start_addr;
INT32 fill_count;
INT32 byte_count;
};
struct init_ack_msg_t {
INT32 code; /* 42 */
INT32 length;
};
struct halt_msg_t {
INT32 code; /* 43 */
INT32 length;
INT32 memory_space;
ADDR32 pc0;
ADDR32 pc1;
INT32 trap_number;
};
struct error_msg_t {
INT32 code; /* 63 */
INT32 length;
INT32 error_code;
INT32 memory_space;
ADDR32 address;
};
struct hif_call_msg_t {
INT32 code; /* 96 */
INT32 length;
INT32 service_number;
INT32 lr2;
INT32 lr3;
INT32 lr4;
};
struct channel0_ack_msg_t {
INT32 code; /* 97 */
INT32 length;
};
struct channel1_msg_t {
INT32 code; /* 98 */
INT32 length;
BYTE data[DUMMY];
};
/*
** Union all of the message types together
*/
union msg_t {
struct generic_msg_t generic_msg;
struct generic_int32_msg_t generic_int32_msg;
struct reset_msg_t reset_msg;
struct config_req_msg_t config_req_msg;
struct status_req_msg_t status_req_msg;
struct read_req_msg_t read_req_msg;
struct write_req_msg_t write_req_msg;
struct write_r_msg_t write_r_msg;
struct bkpt_set_msg_t bkpt_set_msg;
struct bkpt_rm_msg_t bkpt_rm_msg;
struct bkpt_stat_msg_t bkpt_stat_msg;
struct copy_msg_t copy_msg;
struct fill_msg_t fill_msg;
struct init_msg_t init_msg;
struct go_msg_t go_msg;
struct step_msg_t step_msg;
struct break_msg_t break_msg;
struct hif_call_rtn_msg_t hif_call_rtn_msg;
struct channel0_msg_t channel0_msg;
struct channel1_ack_msg_t channel1_ack_msg;
struct reset_ack_msg_t reset_ack_msg;
struct config_msg_t config_msg;
struct status_msg_t status_msg;
struct read_ack_msg_t read_ack_msg;
struct read_r_ack_msg_t read_r_ack_msg;
struct write_ack_msg_t write_ack_msg;
struct bkpt_set_ack_msg_t bkpt_set_ack_msg;
struct bkpt_rm_ack_msg_t bkpt_rm_ack_msg;
struct bkpt_stat_ack_msg_t bkpt_stat_ack_msg;
struct copy_ack_msg_t copy_ack_msg;
struct fill_ack_msg_t fill_ack_msg;
struct init_ack_msg_t init_ack_msg;
struct halt_msg_t halt_msg;
struct error_msg_t error_msg;
struct hif_call_msg_t hif_call_msg;
struct channel0_ack_msg_t channel0_ack_msg;
struct channel1_msg_t channel1_msg;
};

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/* Host-dependent code for GDB, for NYU Ultra3 running Sym1 OS.
Copyright (C) 1988, 1989, 1991 Free Software Foundation, Inc.
Contributed by David Wood (wood@nyu.edu) at New York University.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#define DEBUG
#include <stdio.h>
#include "defs.h"
#include "param.h"
#include "frame.h"
#include "inferior.h"
#include "symtab.h"
#include "value.h"
#include <sys/types.h>
#include <sys/param.h>
#include <signal.h>
#include <sys/ioctl.h>
#include <fcntl.h>
#include "gdbcore.h"
#include <sys/file.h>
#include <sys/stat.h>
#include <sys/ptrace.h>
/* Assumes support for AMD's Binary Compatibility Standard
for ptrace(). If you define ULTRA3, the ultra3 extensions to
ptrace() are used allowing the reading of more than one register
at a time.
This file assumes KERNEL_DEBUGGING is turned off. This means
that if the user/gdb tries to read gr64-gr95 or any of the
protected special registers we silently return -1 (see the
CANNOT_STORE/FETCH_REGISTER macros). */
#define ULTRA3
#if !defined (offsetof)
# define offsetof(TYPE, MEMBER) ((unsigned long) &((TYPE *)0)->MEMBER)
#endif
extern int errno;
struct ptrace_user pt_struct;
/*
* Fetch an individual register (and supply it).
* return 0 on success, -1 on failure.
* NOTE: Assumes AMD's Binary Compatibility Standard for ptrace().
*/
static void
fetch_register (regno)
int regno;
{
char buf[128];
int val;
if (CANNOT_FETCH_REGISTER(regno)) {
val = -1;
supply_register (regno, &val);
} else {
errno = 0;
val = ptrace (PT_READ_U, inferior_pid, (int*)register_addr(regno,0), 0);
if (errno != 0) {
sprintf(buf,"reading register %s (#%d)",reg_names[regno],regno);
perror_with_name (buf);
} else {
supply_register (regno, &val);
}
}
}
/* Get all available registers from the inferior. Registers that are
* defined in REGISTER_NAMES, but not available to the user/gdb are
* supplied as -1. This may include gr64-gr95 and the protected special
* purpose registers.
*/
void
fetch_inferior_registers (regno)
int regno;
{
register int i,j,ret_val=0;
char buf[128];
if (regno != -1) {
fetch_register (regno);
return;
}
/* Global Registers */
#ifdef ULTRA3
errno = 0;
ptrace (PT_READ_STRUCT, inferior_pid, (int*)register_addr(GR96_REGNUM,0),
(int)&pt_struct.pt_gr[0], 32*4);
if (errno != 0) {
perror_with_name ("reading global registers");
ret_val = -1;
} else for (regno=GR96_REGNUM, j=0 ; j<32 ; regno++, j++) {
supply_register (regno, &pt_struct.pt_gr[j]);
}
#else
for (regno=GR96_REGNUM ; !ret_val && regno < GR96_REGNUM+32 ; regno++)
fetch_register(regno);
#endif
/* Local Registers */
#ifdef ULTRA3
errno = 0;
ptrace (PT_READ_STRUCT, inferior_pid, (int*)register_addr(LR0_REGNUM,0),
(int)&pt_struct.pt_lr[0], 128*4);
if (errno != 0) {
perror_with_name ("reading local registers");
ret_val = -1;
} else for (regno=LR0_REGNUM, j=0 ; j<128 ; regno++, j++) {
supply_register (regno, &pt_struct.pt_lr[j]);
}
#else
for (regno=LR0_REGNUM ; !ret_val && regno < LR0_REGNUM+128 ; regno++)
fetch_register(regno);
#endif
/* Special Registers */
fetch_register(GR1_REGNUM);
fetch_register(CPS_REGNUM);
fetch_register(PC_REGNUM);
fetch_register(NPC_REGNUM);
fetch_register(PC2_REGNUM);
fetch_register(IPC_REGNUM);
fetch_register(IPA_REGNUM);
fetch_register(IPB_REGNUM);
fetch_register(Q_REGNUM);
fetch_register(BP_REGNUM);
fetch_register(FC_REGNUM);
/* Fake any registers that are in REGISTER_NAMES, but not available to gdb */
registers_fetched();
}
/* Store our register values back into the inferior.
* If REGNO is -1, do this for all registers.
* Otherwise, REGNO specifies which register (so we can save time).
* NOTE: Assumes AMD's binary compatibility standard.
*/
int
store_inferior_registers (regno)
int regno;
{
register unsigned int regaddr;
char buf[80];
if (regno >= 0)
{
if (CANNOT_STORE_REGISTER(regno))
return 0; /* Pretend success */
regaddr = register_addr (regno, 0);
errno = 0;
ptrace (PT_WRITE_U, inferior_pid,(int*)regaddr,read_register(regno));
if (errno != 0)
{
sprintf (buf, "writing register %s (#%d)", reg_names[regno],regno);
perror_with_name (buf);
}
}
else
{
#ifdef ULTRA3
pt_struct.pt_gr1 = read_register(GR1_REGNUM);
for (regno = GR96_REGNUM; regno < GR96_REGNUM+32; regno++)
pt_struct.pt_gr[regno] = read_register(regno);
for (regno = LR0_REGNUM; regno < LR0_REGNUM+128; regno++)
pt_struct.pt_gr[regno] = read_register(regno);
errno = 0;
ptrace (PT_WRITE_STRUCT, inferior_pid, (int*)register_addr(GR1_REGNUM,0),
(int)&pt_struct.pt_gr1,(1*32*128)*4);
if (errno != 0)
{
sprintf (buf, "writing all local/global registers");
perror_with_name (buf);
}
pt_struct.pt_psr = read_register(CPS_REGNUM);
pt_struct.pt_pc0 = read_register(NPC_REGNUM);
pt_struct.pt_pc1 = read_register(PC_REGNUM);
pt_struct.pt_pc2 = read_register(PC2_REGNUM);
pt_struct.pt_ipc = read_register(IPC_REGNUM);
pt_struct.pt_ipa = read_register(IPA_REGNUM);
pt_struct.pt_ipb = read_register(IPB_REGNUM);
pt_struct.pt_q = read_register(Q_REGNUM);
pt_struct.pt_bp = read_register(BP_REGNUM);
pt_struct.pt_fc = read_register(FC_REGNUM);
errno = 0;
ptrace (PT_WRITE_STRUCT, inferior_pid, (int*)register_addr(CPS_REGNUM,0),
(int)&pt_struct.pt_psr,(10)*4);
if (errno != 0)
{
sprintf (buf, "writing all special registers");
perror_with_name (buf);
return -1;
}
#else
store_inferior_registers(GR1_REGNUM);
for (regno=GR96_REGNUM ; regno<GR96_REGNUM+32 ; regno++)
store_inferior_registers(regno);
for (regno=LR0_REGNUM ; regno<LR0_REGNUM+128 ; regno++)
store_inferior_registers(regno);
store_inferior_registers(CPS_REGNUM);
store_inferior_registers(PC_REGNUM);
store_inferior_registers(NPC_REGNUM);
store_inferior_registers(PC2_REGNUM);
store_inferior_registers(IPC_REGNUM);
store_inferior_registers(IPA_REGNUM);
store_inferior_registers(IPB_REGNUM);
store_inferior_registers(Q_REGNUM);
store_inferior_registers(BP_REGNUM);
store_inferior_registers(FC_REGNUM);
#endif /* ULTRA3 */
}
return 0;
}
/*
* Read AMD's Binary Compatibilty Standard conforming core file.
* struct ptrace_user is the first thing in the core file
*/
void
fetch_core_registers ()
{
register int regno;
int val;
char buf[4];
for (regno = 0 ; regno < NUM_REGS; regno++) {
if (!CANNOT_FETCH_REGISTER(regno)) {
val = bfd_seek (core_bfd, register_addr (regno, 0), 0);
if (val < 0 || (val = bfd_read (buf, sizeof buf, 1, core_bfd)) < 0) {
char * buffer = (char *) alloca (strlen (reg_names[regno]) + 35);
strcpy (buffer, "Reading core register ");
strcat (buffer, reg_names[regno]);
perror_with_name (buffer);
}
supply_register (regno, buf);
}
}
/* Fake any registers that are in REGISTER_NAMES, but not available to gdb */
registers_fetched();
}
/*
* Takes a register number as defined in tm.h via REGISTER_NAMES, and maps
* it to an offset in a struct ptrace_user defined by AMD's BCS.
* That is, it defines the mapping between gdb register numbers and items in
* a struct ptrace_user.
* A register protection scheme is set up here. If a register not
* available to the user is specified in 'regno', then an address that
* will cause ptrace() to fail is returned.
*/
unsigned int
register_addr (regno,blockend)
unsigned int regno;
char *blockend;
{
if ((regno >= LR0_REGNUM) && (regno < LR0_REGNUM + 128)) {
return(offsetof(struct ptrace_user,pt_lr[regno-LR0_REGNUM]));
} else if ((regno >= GR96_REGNUM) && (regno < GR96_REGNUM + 32)) {
return(offsetof(struct ptrace_user,pt_gr[regno-GR96_REGNUM]));
} else {
switch (regno) {
case GR1_REGNUM: return(offsetof(struct ptrace_user,pt_gr1));
case CPS_REGNUM: return(offsetof(struct ptrace_user,pt_psr));
case NPC_REGNUM: return(offsetof(struct ptrace_user,pt_pc0));
case PC_REGNUM: return(offsetof(struct ptrace_user,pt_pc1));
case PC2_REGNUM: return(offsetof(struct ptrace_user,pt_pc2));
case IPC_REGNUM: return(offsetof(struct ptrace_user,pt_ipc));
case IPA_REGNUM: return(offsetof(struct ptrace_user,pt_ipa));
case IPB_REGNUM: return(offsetof(struct ptrace_user,pt_ipb));
case Q_REGNUM: return(offsetof(struct ptrace_user,pt_q));
case BP_REGNUM: return(offsetof(struct ptrace_user,pt_bp));
case FC_REGNUM: return(offsetof(struct ptrace_user,pt_fc));
default:
fprintf_filtered(stderr,"register_addr():Bad register %s (%d)\n",
reg_names[regno],regno);
return(0xffffffff); /* Should make ptrace() fail */
}
}
}
/* Assorted operating system circumventions */
#ifdef SYM1
/* FIXME: Kludge this for now. It really should be system call. */
int
getpagesize()
{ return(8192); }
/* FIXME: Fake out the fcntl() call, which we don't have. */
fcntl(fd, cmd, arg)
int fd, cmd, arg;
{
switch (cmd) {
case F_GETFL: return(O_RDONLY); break;
default:
printf("Ultra3's fcntl() failing, cmd = %d.\n",cmd);
return(-1);
}
}
/*
* 4.2 Signal support, requires linking with libjobs.
*/
static int _SigMask;
#define sigbit(s) (1L << ((s)-1))
init_SigMask()
{
/* Taken from the sym1 kernel in machdep.c:startup() */
_SigMask = sigbit (SIGTSTP) | sigbit (SIGTTOU) | sigbit (SIGTTIN) |
sigbit (SIGCHLD) | sigbit (SIGTINT);
}
sigmask(signo)
int signo;
{
return (1 << (signo-1));
}
sigsetmask(sigmask)
unsigned int sigmask;
{
int i, mask = 1;
int lastmask = _SigMask;
for (i=0 ; i<NSIG ; i++) {
if (sigmask & mask) {
if (!(_SigMask & mask)) {
sighold(i+1);
_SigMask |= mask;
}
} else if (_SigMask & mask) {
sigrelse(i+1);
_SigMask &= ~mask;
}
mask <<= 1;
}
return (lastmask);
}
sigblock(sigmask)
unsigned int sigmask;
{
int i, mask = 1;
int lastmask = _SigMask;
for (i=0 ; i<NSIG ; i++) {
if ((sigmask & mask) && !(_SigMask & mask)) {
sighold(i+1);
_SigMask |= mask;
}
mask <<= 1;
}
return (lastmask);
}
#endif /* SYM1 */
/* Initialization code for this module. */
_initialize_ultra3 ()
{
#ifdef SYM1
init_SigMask();
#endif
}

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gdb/xm-rtbsd.h Normal file
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/* Definitions to host GDB on an IBM RT/PC running BSD Unix.
Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
Contributed by David Wood @ New York University (wood@lab.ultra.nyu.edu).
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
/* Get rid of any system-imposed stack limit if possible. */
#define SET_STACK_LIMIT_HUGE
/* This machine is most significant byte first */
#define HOST_BYTE_ORDER BIG_ENDIAN
/* This OS has the wait structure */
#define HAVE_WAIT_STRUCT
/* This unix does not have a libc with vprintf */
#define MISSING_VPRINTF
#ifdef HOSTING_ONLY
/*
* This next two defines are to get GDB up and running as a host to
* do remote debugging. I know there is a gdb for the RT, but there wasn't
* an xconfig/rt* file.
*/
#define KERNEL_U_ADDR_BSD /* This may be correct, but hasn't been tested */
#define REGISTER_U_ADDR(a,b,c) \
(printf("GDB can not debug IBM RT/PC BSD executables (yet)\n"),\
quit(),0)
#else
# include "GDB for the RT is not included in the distribution"
#endif

74
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/* Host definitions for GDB running on a 29k NYU Ultracomputer
Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
Contributed by David Wood (wood@lab.ultra.nyu.edu).
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
/* Here at NYU we have what we call an ULTRA3 PE board. So
ifdefs for ULTRA3 are my doing. At this point in time,
I don't know of any other Unixi running on the 29k. */
#define HOST_BYTE_ORDER BIG_ENDIAN
#define HAVE_WAIT_STRUCT
#ifndef L_SET
# define L_SET 0 /* set the seek pointer */
# define L_INCR 1 /* increment the seek pointer */
# define L_XTND 2 /* extend the file size */
#endif
#ifndef O_RDONLY
# define O_RDONLY 0
# define O_WRONLY 1
# define O_RDWR 2
#endif
#ifndef F_OK
# define R_OK 4
# define W_OK 2
# define X_OK 1
# define F_OK 0
#endif
/* For dirbuf[] in main.c */
#ifndef MAXPATHLEN
#define MAXPATHLEN (1024)
#endif
/* Get rid of any system-imposed stack limit if possible */
#define SET_STACK_LIMIT_HUGE
/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
#define FETCH_INFERIOR_REGISTERS
/* If we ever *do* end up using the standard fetch_inferior_registers,
this is the right value for U_REGS_OFFSET. */
#define U_REGS_OFFSET 0
/* System doesn't provide a list of signal names. */
#define SYS_SIGLIST_MISSING
/* System doesn't provide siginterrupt(). */
#define NO_SIGINTERRUPT
/* System uses a `short' to hold a process group ID. */
#define SHORT_PGRP
/* No vfork in this system. */
#define vfork() fork()