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opcodes: blackfin: mark push/pop insns with a P6/P7 range as illegal

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The push/pop multiple insn has a 3 bit field for the P register range,
but only values of 0...5 are valid (P0 - P5).  There is no such P6 or
P7 register, so mark these insns as illegal.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2010-09-22 21:53:14 +00:00
parent 0b7691fd6e
commit 775f1cf0c2
2 changed files with 7 additions and 0 deletions
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opcodes/ChangeLog
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@ -1,3 +1,7 @@
2010-09-22 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5.
2010-09-22 Robin Getz <robin.getz@analog.com>
* bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.

3
opcodes/bfin-dis.c
View file

@ -936,6 +936,9 @@ decode_PushPopMultiple_0 (TIword iw0, disassemble_info *outf)
int dr = ((iw0 >> PushPopMultiple_dr_bits) & PushPopMultiple_dr_mask);
int pr = ((iw0 >> PushPopMultiple_pr_bits) & PushPopMultiple_pr_mask);
if (pr > 5)
return 0;
if (W == 1 && d == 1 && p == 1)
{
OUTS (outf, "[--SP] = (R7:");