From 751197f2318c36444b47b55c1746bd708f86008f Mon Sep 17 00:00:00 2001 From: Doug Evans Date: Wed, 25 Feb 1998 07:36:23 +0000 Subject: [PATCH] (profile_print_core): Simplify by calling sim_core_map_to_str. * sim-core.h (sim_core_map_to_str): Declare. * sim-core.c (sim_core_map_to_str): Make non-static. --- sim/common/sim-core.c | 2 +- sim/common/sim-core.h | 78 +++++++++++++++++++++++++--------------- sim/common/sim-profile.c | 15 +------- 3 files changed, 51 insertions(+), 44 deletions(-) diff --git a/sim/common/sim-core.c b/sim/common/sim-core.c index 47f5d64e72..f6db47acf8 100644 --- a/sim/common/sim-core.c +++ b/sim/common/sim-core.c @@ -127,7 +127,7 @@ sim_core_signal (SIM_DESC sd, #endif -STATIC_INLINE_SIM_CORE\ +EXTERN_SIM_CORE\ (const char *) sim_core_map_to_str (sim_core_maps map) { diff --git a/sim/common/sim-core.h b/sim/common/sim-core.h index ef6b3f1818..5bd098469e 100644 --- a/sim/common/sim-core.h +++ b/sim/common/sim-core.h @@ -138,6 +138,13 @@ EXTERN_SIM_CORE\ void *optional_buffer); +/* Utility to return the name of a map. */ + +EXTERN_SIM_CORE\ +(const char *) sim_core_map_to_str +(sim_core_maps); + + /* Delete a memory space within the core. */ @@ -240,38 +247,45 @@ EXTERN_SIM_CORE\ order (including xor endian). Should the transfer fail, the operation shall abort (no return). - The aligned alternative makes the assumption that that the address - is N byte aligned (no alignment checks are made). + ALIGNED assumes yhat the specified ADDRESS is correctly alligned + for an N byte transfer (no alignment checks are made). Passing an + incorrectly aligned ADDRESS is erroneous. - The unaligned alternative checks the address for correct byte - alignment. Action, as defined by WITH_ALIGNMENT, being taken - should the check fail. + UNALIGNED checks/modifies the ADDRESS according to the requirements + of an N byte transfer. Action, as defined by WITH_ALIGNMENT, being + taken should the check fail. + + MISSALIGNED transfers the data regardless. Misaligned xor-endian accesses are broken into a sequence of transfers each <= WITH_XOR_ENDIAN bytes */ -#define DECLARE_SIM_CORE_WRITE_N(ALIGNMENT,N) \ +#define DECLARE_SIM_CORE_WRITE_N(ALIGNMENT,N,M) \ INLINE_SIM_CORE\ (void) sim_core_write_##ALIGNMENT##_##N \ (sim_cpu *cpu, \ sim_cia cia, \ sim_core_maps map, \ address_word addr, \ - unsigned_##N val); + unsigned_##M val); -DECLARE_SIM_CORE_WRITE_N(aligned,1) -DECLARE_SIM_CORE_WRITE_N(aligned,2) -DECLARE_SIM_CORE_WRITE_N(aligned,4) -DECLARE_SIM_CORE_WRITE_N(aligned,8) -DECLARE_SIM_CORE_WRITE_N(aligned,16) +DECLARE_SIM_CORE_WRITE_N(aligned,1,1) +DECLARE_SIM_CORE_WRITE_N(aligned,2,2) +DECLARE_SIM_CORE_WRITE_N(aligned,4,4) +DECLARE_SIM_CORE_WRITE_N(aligned,8,8) +DECLARE_SIM_CORE_WRITE_N(aligned,16,16) -DECLARE_SIM_CORE_WRITE_N(unaligned,1) -DECLARE_SIM_CORE_WRITE_N(unaligned,2) -DECLARE_SIM_CORE_WRITE_N(unaligned,4) -DECLARE_SIM_CORE_WRITE_N(unaligned,8) -DECLARE_SIM_CORE_WRITE_N(unaligned,16) +#define sim_core_write_unaligned_1 sim_core_write_aligned_1 +DECLARE_SIM_CORE_WRITE_N(unaligned,2,2) +DECLARE_SIM_CORE_WRITE_N(unaligned,4,4) +DECLARE_SIM_CORE_WRITE_N(unaligned,8,8) +DECLARE_SIM_CORE_WRITE_N(unaligned,16,16) +DECLARE_SIM_CORE_WRITE_N(misaligned,3,4) +DECLARE_SIM_CORE_WRITE_N(misaligned,5,8) +DECLARE_SIM_CORE_WRITE_N(misaligned,6,8) +DECLARE_SIM_CORE_WRITE_N(misaligned,7,8) #define sim_core_write_1 sim_core_write_aligned_1 #define sim_core_write_2 sim_core_write_aligned_2 @@ -286,25 +300,31 @@ DECLARE_SIM_CORE_WRITE_N(unaligned,16) #undef DECLARE_SIM_CORE_WRITE_N -#define DECLARE_SIM_CORE_READ_N(ALIGNMENT,N) \ +#define DECLARE_SIM_CORE_READ_N(ALIGNMENT,N,M) \ INLINE_SIM_CORE\ -(unsigned_##N) sim_core_read_##ALIGNMENT##_##N \ +(unsigned_##M) sim_core_read_##ALIGNMENT##_##N \ (sim_cpu *cpu, \ sim_cia cia, \ sim_core_maps map, \ address_word addr); -DECLARE_SIM_CORE_READ_N(aligned,1) -DECLARE_SIM_CORE_READ_N(aligned,2) -DECLARE_SIM_CORE_READ_N(aligned,4) -DECLARE_SIM_CORE_READ_N(aligned,8) -DECLARE_SIM_CORE_READ_N(aligned,16) +DECLARE_SIM_CORE_READ_N(aligned,1,1) +DECLARE_SIM_CORE_READ_N(aligned,2,2) +DECLARE_SIM_CORE_READ_N(aligned,4,4) +DECLARE_SIM_CORE_READ_N(aligned,8,8) +DECLARE_SIM_CORE_READ_N(aligned,16,16) + +#define sim_core_read_unaligned_1 sim_core_read_aligned_1 +DECLARE_SIM_CORE_READ_N(unaligned,2,2) +DECLARE_SIM_CORE_READ_N(unaligned,4,4) +DECLARE_SIM_CORE_READ_N(unaligned,8,8) +DECLARE_SIM_CORE_READ_N(unaligned,16,16) + +DECLARE_SIM_CORE_READ_N(misaligned,3,4) +DECLARE_SIM_CORE_READ_N(misaligned,5,8) +DECLARE_SIM_CORE_READ_N(misaligned,6,8) +DECLARE_SIM_CORE_READ_N(misaligned,7,8) -DECLARE_SIM_CORE_READ_N(unaligned,1) -DECLARE_SIM_CORE_READ_N(unaligned,2) -DECLARE_SIM_CORE_READ_N(unaligned,4) -DECLARE_SIM_CORE_READ_N(unaligned,8) -DECLARE_SIM_CORE_READ_N(unaligned,16) #define sim_core_read_1 sim_core_read_aligned_1 #define sim_core_read_2 sim_core_read_aligned_2 diff --git a/sim/common/sim-profile.c b/sim/common/sim-profile.c index ff882dfb3c..f9807da881 100644 --- a/sim/common/sim-profile.c +++ b/sim/common/sim-profile.c @@ -711,20 +711,7 @@ profile_print_core (sim_cpu *cpu, int verbose) { if (PROFILE_CORE_COUNT (data) [map] != 0) { - switch (map) - { - case sim_core_read_map: - sim_io_printf (sd, " read:"); - break; - case sim_core_write_map: - sim_io_printf (sd, " write:"); - break; - case sim_core_execute_map: - sim_io_printf (sd, " exec:"); - break; - case nr_sim_core_maps: - ; /* ignore */ - } + sim_io_printf (sd, "%10s:", sim_core_map_to_str (map)); sim_io_printf (sd, "%*s: ", max_val < 10000 ? 5 : 10, COMMAS (PROFILE_CORE_COUNT (data) [map]));