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* config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,

Browse source 
config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
	config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
	config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
	config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
This commit is contained in:
Kazu Hirata 2006-04-23 22:12:43 +00:00
parent d8006e0592
commit 708587a480
15 changed files with 37 additions and 29 deletions
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8
gas/ChangeLog
View file

@ -1,3 +1,11 @@
2006-04-23 Kazu Hirata <kazu@codesourcery.com>
* config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
2005-04-20 Paul Brook <paul@codesourcery.com> 2005-04-20 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for

4
gas/config/obj-coff.c
View file

@ -1026,7 +1026,7 @@ weak_name2altname (const char * name)
} }
/* Return the name of the weak symbol corresponding to an /* Return the name of the weak symbol corresponding to an
alterate symbol. */ alternate symbol. */
static const char * static const char *
weak_altname2name (const char * name) weak_altname2name (const char * name)
@ -1579,7 +1579,7 @@ obj_coff_section (int ignore ATTRIBUTE_UNUSED)
if (! load_removed) if (! load_removed)
flags |= SEC_LOAD; flags |= SEC_LOAD;
/* Note - the READONLY flag is set here, even for the 'x' /* Note - the READONLY flag is set here, even for the 'x'
attrbiute in order to be compatible with the MSVC attribute in order to be compatible with the MSVC
linker. */ linker. */
if (! readonly_removed) if (! readonly_removed)
flags |= SEC_READONLY; flags |= SEC_READONLY;

12
gas/config/tc-arm.c
View file

@ -2502,7 +2502,7 @@ s_arm_unwind_save_mmxwr (void)
demand_empty_rest_of_line (); demand_empty_rest_of_line ();
/* Generate any deferred opcodes becuuse we're going to be looking at /* Generate any deferred opcodes because we're going to be looking at
the list. */ the list. */
flush_pending_unwind (); flush_pending_unwind ();
@ -2635,7 +2635,7 @@ s_arm_unwind_save_mmxwcg (void)
demand_empty_rest_of_line (); demand_empty_rest_of_line ();
/* Generate any deferred opcodes becuuse we're going to be looking at /* Generate any deferred opcodes because we're going to be looking at
the list. */ the list. */
flush_pending_unwind (); flush_pending_unwind ();
@ -2818,7 +2818,7 @@ static void
s_arm_unwind_raw (int ignored ATTRIBUTE_UNUSED) s_arm_unwind_raw (int ignored ATTRIBUTE_UNUSED)
{ {
expressionS exp; expressionS exp;
/* This is an arbitary limit. */ /* This is an arbitrary limit. */
unsigned char op[16]; unsigned char op[16];
int count; int count;
@ -4570,7 +4570,7 @@ static void
do_rd_rm_rn (void) do_rd_rm_rn (void)
{ {
unsigned Rn = inst.operands[2].reg; unsigned Rn = inst.operands[2].reg;
/* Enforce resutrictions on SWP instruction. */ /* Enforce restrictions on SWP instruction. */
if ((inst.instruction & 0x0fbfffff) == 0x01000090) if ((inst.instruction & 0x0fbfffff) == 0x01000090)
constraint (Rn == inst.operands[0].reg || Rn == inst.operands[1].reg, constraint (Rn == inst.operands[0].reg || Rn == inst.operands[1].reg,
_("Rn must not overlap other operands")); _("Rn must not overlap other operands"));
@ -8432,7 +8432,7 @@ md_assemble (char *str)
ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used, ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used,
*opcode->tvariant); *opcode->tvariant);
/* Many Thumb-2 instructions also have Thumb-1 variants, so explicitly /* Many Thumb-2 instructions also have Thumb-1 variants, so explicitly
set those bits when Thumb-2 32-bit instuctions are seen. ie. set those bits when Thumb-2 32-bit instructions are seen. ie.
anything other than bl/blx. anything other than bl/blx.
This is overly pessimistic for relaxable instructions. */ This is overly pessimistic for relaxable instructions. */
if ((inst.size == 4 && (inst.instruction & 0xf800e800) != 0xf000e800) if ((inst.size == 4 && (inst.instruction & 0xf800e800) != 0xf000e800)
@ -10894,7 +10894,7 @@ finish_unwind_opcodes (void)
if (unwind.fp_used) if (unwind.fp_used)
{ {
/* Adjust sp as neccessary. */ /* Adjust sp as necessary. */
unwind.pending_offset += unwind.fp_offset - unwind.frame_size; unwind.pending_offset += unwind.fp_offset - unwind.frame_size;
flush_pending_unwind (); flush_pending_unwind ();

2
gas/config/tc-bfin.c
View file

@ -1054,7 +1054,7 @@ Expr_Node_Gen_Reloc (Expr_Node * head, int parent_reloc)
} }
switch (parent_reloc) switch (parent_reloc)
{ {
/* Some reloctions will need to allocate extra words. */ /* Some relocations will need to allocate extra words. */
case BFD_RELOC_BFIN_16_IMM: case BFD_RELOC_BFIN_16_IMM:
case BFD_RELOC_BFIN_16_LOW: case BFD_RELOC_BFIN_16_LOW:
case BFD_RELOC_BFIN_16_HIGH: case BFD_RELOC_BFIN_16_HIGH:

2
gas/config/tc-cris.c
View file

@ -991,7 +991,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT sec ATTRIBUTE_UNUSED,
break; break;
case ENCODE_RELAX (STATE_MUL, STATE_BYTE): case ENCODE_RELAX (STATE_MUL, STATE_BYTE):
/* This is the only time we check position and aligmnent of the /* This is the only time we check position and alignment of the
placement-tracking frag. */ placement-tracking frag. */
if (sec->alignment_power < 2) if (sec->alignment_power < 2)
as_bad_where (fragP->fr_file, fragP->fr_line, as_bad_where (fragP->fr_file, fragP->fr_line,

2
gas/config/tc-crx.c
View file

@ -1271,7 +1271,7 @@ print_constant (int nbits, int shift, argument *arg)
/* When instruction size is 3 and 'shift' is 16, a 16-bit constant is /* When instruction size is 3 and 'shift' is 16, a 16-bit constant is
always filling the upper part of output_opcode[1]. If we mistakenly always filling the upper part of output_opcode[1]. If we mistakenly
write it to output_opcode[0], the constant prefix (that is, 'match') write it to output_opcode[0], the constant prefix (that is, 'match')
will be overriden. will be overridden.
0 1 2 3 0 1 2 3
+---------+---------+---------+---------+ +---------+---------+---------+---------+
| 'match' | | X X X X | | | 'match' | | X X X X | |

2
gas/config/tc-i386.c
View file

@ -2310,7 +2310,7 @@ match_template ()
if (!MATCH (overlap0, i.types[0], t->operand_types[0]) if (!MATCH (overlap0, i.types[0], t->operand_types[0])
|| !MATCH (overlap1, i.types[1], t->operand_types[1]) || !MATCH (overlap1, i.types[1], t->operand_types[1])
/* monitor in SSE3 is a very special case. The first /* monitor in SSE3 is a very special case. The first
register and the second register may have differnet register and the second register may have different
sizes. */ sizes. */
|| !((t->base_opcode == 0x0f01 || !((t->base_opcode == 0x0f01
&& t->extension_opcode == 0xc8) && t->extension_opcode == 0xc8)

2
gas/config/tc-ia64.c
View file

@ -11862,7 +11862,7 @@ struct alias
{ {
char *file; /* The file where the directive is seen. */ char *file; /* The file where the directive is seen. */
unsigned int line; /* The line number the directive is at. */ unsigned int line; /* The line number the directive is at. */
const char *name; /* The orignale name of the symbol. */ const char *name; /* The original name of the symbol. */
}; };
/* Called for .alias and .secalias directives. If SECTION is 1, it is /* Called for .alias and .secalias directives. If SECTION is 1, it is

10
gas/config/tc-maxq.c
View file

@ -451,7 +451,7 @@ maxq20_cons_fix_new (fragS * frag, unsigned int off, unsigned int len,
} }
/* GAS will call this for every rs_machine_dependent fragment. The /* GAS will call this for every rs_machine_dependent fragment. The
instruction is compleated using the data from the relaxation pass. It may instruction is completed using the data from the relaxation pass. It may
also create any necessary relocations. */ also create any necessary relocations. */
void void
md_convert_frag (bfd * headers ATTRIBUTE_UNUSED, md_convert_frag (bfd * headers ATTRIBUTE_UNUSED,
@ -687,7 +687,7 @@ const pseudo_typeS md_pseudo_table[] =
#define SET_PFX_ARG(x) (PFX_INSN[1] = x) #define SET_PFX_ARG(x) (PFX_INSN[1] = x)
/* This function sets the PFX value coresponding to the specs. Source /* This function sets the PFX value corresponding to the specs. Source
Destination Index Selection ---------------------------------- Write To| Destination Index Selection ---------------------------------- Write To|
SourceRegRange | Dest Addr Range SourceRegRange | Dest Addr Range
------------------------------------------------------ PFX[0] | 0h-Fh | ------------------------------------------------------ PFX[0] | 0h-Fh |
@ -1150,7 +1150,7 @@ maxq20_immediate (char *imm_start)
return 1; return 1;
} }
/* Check For Sign Charcater. */ /* Check For Sign Character. */
sign_val = 0; sign_val = 0;
do do
@ -1600,7 +1600,7 @@ maxq20_operand (char *operand_string)
return 1; return 1;
} }
/* Get the origanal string. */ /* Get the original string. */
memcpy (op_string, operand_string, strlen (operand_string) + 1); memcpy (op_string, operand_string, strlen (operand_string) + 1);
ii = strlen (operand_string) + 1; ii = strlen (operand_string) + 1;
@ -3101,7 +3101,7 @@ md_assemble (char *line)
if (!match_filters ()) if (!match_filters ())
return; return;
/* Check for the approprate PFX register. */ /* Check for the appropriate PFX register. */
set_prefix (); set_prefix ();
pfx_for_imm_val (0); pfx_for_imm_val (0);

8
gas/config/tc-maxq.h
View file

@ -1,4 +1,4 @@
/* tc-maxq.h -- Header file for the asssembler(MAXQ) /* tc-maxq.h -- Header file for the assembler(MAXQ)
Copyright 2004, 2005 Free Software Foundation, Inc. Copyright 2004, 2005 Free Software Foundation, Inc.
@ -116,10 +116,10 @@ extern void maxq20_cons_fix_new (fragS *, unsigned int, unsigned int, expression
extern void maxq_number_to_chars (char *, valueT, int); extern void maxq_number_to_chars (char *, valueT, int);
/* If this macro is defined, it is a pointer to a NULL terminated list of /* If this macro is defined, it is a pointer to a NULL terminated list of
chracters which may appear in an operand. GAS already assumes that all characters which may appear in an operand. GAS already assumes that all
alphanumeric chracters, and '$', '.', and '_' may appear in an alphanumeric characters, and '$', '.', and '_' may appear in an
operand("symbol_char"in app.c). This macro may be defined to treat operand("symbol_char"in app.c). This macro may be defined to treat
additional chracters as appearing in an operand. This affects the way in additional characters as appearing in an operand. This affects the way in
which GAS removes whitespaces before passing the string to md_assemble. */ which GAS removes whitespaces before passing the string to md_assemble. */
#define tc_symbol_chars_extra_symbol_chars #define tc_symbol_chars_extra_symbol_chars

4
gas/config/tc-mips.c
View file

@ -150,7 +150,7 @@ struct mips_cl_insn
/* True if this entry cannot be moved from its current position. */ /* True if this entry cannot be moved from its current position. */
unsigned int fixed_p : 1; unsigned int fixed_p : 1;
/* True if this instruction occured in a .set noreorder block. */ /* True if this instruction occurred in a .set noreorder block. */
unsigned int noreorder_p : 1; unsigned int noreorder_p : 1;
/* True for mips16 instructions that jump to an absolute address. */ /* True for mips16 instructions that jump to an absolute address. */
@ -11809,7 +11809,7 @@ s_change_section (int ignore ATTRIBUTE_UNUSED)
There's nothing really harmful in this, since bfd will correct There's nothing really harmful in this, since bfd will correct
SHT_PROGBITS to SHT_MIPS_DWARF before writing out the file. But it SHT_PROGBITS to SHT_MIPS_DWARF before writing out the file. But it
means that, for backwards compatibiltiy, the special_section entries means that, for backwards compatibility, the special_section entries
for dwarf sections must use SHT_PROGBITS rather than SHT_MIPS_DWARF. for dwarf sections must use SHT_PROGBITS rather than SHT_MIPS_DWARF.
Even so, we shouldn't force users of the MIPS .section syntax to Even so, we shouldn't force users of the MIPS .section syntax to

4
gas/config/tc-msp430.c
View file

@ -34,7 +34,7 @@
/* /*
We will disable polymorphs by default because it is dangerous. We will disable polymorphs by default because it is dangerous.
The potencial problem here is the following: assume we got the The potential problem here is the following: assume we got the
following code: following code:
jump .l1 jump .l1
@ -487,7 +487,7 @@ skip_space (char * s)
return s; return s;
} }
/* Extract one word from FROM and copy it to TO. Delimeters are ",;\n" */ /* Extract one word from FROM and copy it to TO. Delimiters are ",;\n" */
static char * static char *
extract_operand (char * from, char * to, int limit) extract_operand (char * from, char * to, int limit)

2
gas/config/tc-sh.c
View file

@ -2798,7 +2798,7 @@ md_assemble (char *str)
if (opcode == NULL) if (opcode == NULL)
{ {
/* The opcode is not in the hash table. /* The opcode is not in the hash table.
This means we definately have an assembly failure, This means we definitely have an assembly failure,
but the instruction may be valid in another CPU variant. but the instruction may be valid in another CPU variant.
In this case emit something better than 'unknown opcode'. In this case emit something better than 'unknown opcode'.
Search the full table in sh-opc.h to check. */ Search the full table in sh-opc.h to check. */

2
gas/config/tc-tic4x.c
View file

@ -2640,7 +2640,7 @@ md_assemble (str)
if ((i = tic4x_operands_parse (s, insn->operands, 0)) < 0) if ((i = tic4x_operands_parse (s, insn->operands, 0)) < 0)
{ {
insn->inst = NULL; /* Flag that error occured. */ insn->inst = NULL; /* Flag that error occurred. */
insn->parallel = 0; insn->parallel = 0;
insn->in_use = 0; insn->in_use = 0;
return; return;

2
gas/config/tc-xtensa.c
View file

@ -8616,7 +8616,7 @@ future_alignment_required (fragS *fragP, long stretch ATTRIBUTE_UNUSED)
c 0 2 1 (case 5b makes this case unnecessary) c 0 2 1 (case 5b makes this case unnecessary)
6a 2 0 0 6a 2 0 0
b 1 0 3 b 1 0 3
c 0 1 4 (case 6b makes this case unneccesary) c 0 1 4 (case 6b makes this case unnecessary)
d 1 1 1 (case 6a makes this case unnecessary) d 1 1 1 (case 6a makes this case unnecessary)
e 0 2 2 (case 6a makes this case unnecessary) e 0 2 2 (case 6a makes this case unnecessary)
f 0 3 0 (case 6a makes this case unnecessary) f 0 3 0 (case 6a makes this case unnecessary)