diff --git a/bfd/ChangeLog b/bfd/ChangeLog index b552c9f918..ffb470f062 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,11 @@ +2015-07-16 Jiong Wang + + * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADR_PREL21): New entry. + * bfd-in2.h: Regenerate. + * libbfd.h: Regenerate. + * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for + BFD_RELOC_AARCH64_TLSLD_ADR_PREL21. + 2015-07-10 H.J. Lu PR binutils/18656 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index e963687d31..c27db8dc95 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -5794,6 +5794,9 @@ BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21. */ /* AArch64 TLS INITIAL EXEC relocation. */ BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19, +/* GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction. */ + BFD_RELOC_AARCH64_TLSLD_ADR_PREL21, + /* AArch64 TLS LOCAL EXEC relocation. */ BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2, diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c index b13f5db610..a1d926f4f7 100644 --- a/bfd/elfnn-aarch64.c +++ b/bfd/elfnn-aarch64.c @@ -1024,6 +1024,20 @@ static reloc_howto_type elfNN_aarch64_howto_table[] = 0x1ffffc, /* dst_mask */ FALSE), /* pcrel_offset */ + HOWTO (AARCH64_R (TLSLD_ADR_PREL21), /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 21, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + AARCH64_R_STR (TLSLD_ADR_PREL21), /* name */ + FALSE, /* partial_inplace */ + 0x1fffff, /* src_mask */ + 0x1fffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + HOWTO64 (AARCH64_R (TLSLE_MOVW_TPREL_G2), /* type */ 32, /* rightshift */ 2, /* size (0 = byte, 1 = short, 2 = long) */ diff --git a/bfd/libbfd.h b/bfd/libbfd.h index 39c5e71729..18e3c4025a 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -2759,6 +2759,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC", "BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC", "BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19", + "BFD_RELOC_AARCH64_TLSLD_ADR_PREL21", "BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2", "BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1", "BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC", diff --git a/bfd/reloc.c b/bfd/reloc.c index 1d16670c4f..34780068de 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -6843,6 +6843,10 @@ ENUM BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19 ENUMDOC AArch64 TLS INITIAL EXEC relocation. +ENUM + BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 +ENUMDOC + GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction. ENUM BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2 ENUMDOC diff --git a/gas/ChangeLog b/gas/ChangeLog index 09ee2cb2fb..d024f40132 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2015-07-16 Jiong Wang + + * config/tc-aarch64.c (reloc_table): New relocation modifiers. + (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21. + (aarch64_force_relocation): Ditto. + 2015-07-16 Matthew Wahab * config/tc-arm.c (arm_fpus): Add crypto-neon-fp-armv8.1. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 7d4ec29e4f..8d403f3bd6 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -2500,6 +2500,19 @@ static struct reloc_table_entry reloc_table[] = { BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, 0}, + /* Get to the page containing GOT TLS entry for a symbol. + The same as GD, we allocate two consecutive GOT slots + for module index and module offset, the only difference + with GD is the module offset should be intialized to + zero without any outstanding runtime relocation. */ + {"tlsldm", 0, + BFD_RELOC_AARCH64_TLSLD_ADR_PREL21, /* adr_type */ + 0, + 0, + 0, + 0, + 0}, + /* Get to the page containing GOT TLS entry for a symbol */ {"gottprel", 0, 0, /* adr_type */ @@ -6765,6 +6778,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg) case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19: + case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21: case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12: case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12: case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC: @@ -6974,6 +6988,7 @@ aarch64_force_relocation (struct fix *fixp) case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19: + case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21: case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12: case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12: case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC: diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index da6536b269..8b3d0158bd 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2015-07-16 Jiong Wang + + * gas/aarch64/reloc-tlsldm-1.s: New testcase. + * gas/aarch64/reloc-tlsldm-ilp32-1.s: Ditto. + * gas/aarch64/reloc-tlsldm-1.d: New expectation file. + * gas/aarch64/reloc-tlsldm-ilp32-1.d: Ditto. + 2015-07-16 James Greenhalgh * gas/arm/arch7em-bad.l: Update expected errors. diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm-1.d new file mode 100644 index 0000000000..30276d15de --- /dev/null +++ b/gas/testsuite/gas/aarch64/reloc-tlsldm-1.d @@ -0,0 +1,10 @@ +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0000000000000000 <.*>: + 0: 8b030041 add x1, x2, x3 + 4: 10000000 adr x0, 0 + 4: R_AARCH64_TLSLD_ADR_PREL21 dummy diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm-1.s b/gas/testsuite/gas/aarch64/reloc-tlsldm-1.s new file mode 100644 index 0000000000..80512b1f37 --- /dev/null +++ b/gas/testsuite/gas/aarch64/reloc-tlsldm-1.s @@ -0,0 +1,6 @@ +// Test file for AArch64 GAS -- tlsldm + +func: + add x1, x2, x3 + // BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 + adr x0, :tlsldm:dummy diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d new file mode 100644 index 0000000000..28686cd04e --- /dev/null +++ b/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d @@ -0,0 +1,11 @@ +#as: -mabi=ilp32 +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +00000000 <.*>: + 0: 8b030041 add x1, x2, x3 + 4: 10000000 adr x0, 0 + 4: R_AARCH64_P32_TLSLD_ADR_PREL21 dummy diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.s b/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.s new file mode 100644 index 0000000000..b0c5942362 --- /dev/null +++ b/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.s @@ -0,0 +1,6 @@ +// Test file for AArch64 GAS -- tlsldm ILP32 + +func: + add x1, x2, x3 + // BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 + adr x0, :tlsldm:dummy